JP4873332B2 - リードフレーム及びこの製造方法、この疲労特性の向上方法、これを用いた電子部品及び電子デバイス - Google Patents

リードフレーム及びこの製造方法、この疲労特性の向上方法、これを用いた電子部品及び電子デバイス Download PDF

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Publication number
JP4873332B2
JP4873332B2 JP2009120333A JP2009120333A JP4873332B2 JP 4873332 B2 JP4873332 B2 JP 4873332B2 JP 2009120333 A JP2009120333 A JP 2009120333A JP 2009120333 A JP2009120333 A JP 2009120333A JP 4873332 B2 JP4873332 B2 JP 4873332B2
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Japan
Prior art keywords
plating layer
tin
plating
lead frame
thickness
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JP2009120333A
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English (en)
Japanese (ja)
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JP2010265540A (ja
JP2010265540A5 (enExample
Inventor
欣也 杉江
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協和電線株式会社
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Priority to JP2009120333A priority Critical patent/JP4873332B2/ja
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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Electroplating Methods And Accessories (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP2009120333A 2009-05-18 2009-05-18 リードフレーム及びこの製造方法、この疲労特性の向上方法、これを用いた電子部品及び電子デバイス Active JP4873332B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009120333A JP4873332B2 (ja) 2009-05-18 2009-05-18 リードフレーム及びこの製造方法、この疲労特性の向上方法、これを用いた電子部品及び電子デバイス

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009120333A JP4873332B2 (ja) 2009-05-18 2009-05-18 リードフレーム及びこの製造方法、この疲労特性の向上方法、これを用いた電子部品及び電子デバイス

Publications (3)

Publication Number Publication Date
JP2010265540A JP2010265540A (ja) 2010-11-25
JP2010265540A5 JP2010265540A5 (enExample) 2011-06-02
JP4873332B2 true JP4873332B2 (ja) 2012-02-08

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JP2009120333A Active JP4873332B2 (ja) 2009-05-18 2009-05-18 リードフレーム及びこの製造方法、この疲労特性の向上方法、これを用いた電子部品及び電子デバイス

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Country Link
JP (1) JP4873332B2 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012140678A (ja) * 2010-12-28 2012-07-26 Kyowa Densen Kk 曲げ加工部のウィスカ発生を防止するめっき被膜部材、これを用いた電気電子部品、並びにめっき被膜部材の製造方法とめっき皮膜部材のウィスカ発生防止方法
JP5637965B2 (ja) * 2011-10-20 2014-12-10 株式会社神戸製鋼所 リードフレーム用アルミニウム板条及びリードフレーム板条
JP2013188888A (ja) * 2012-03-12 2013-09-26 Omron Corp シール性を有する金属インサート成形品、当該金属インサート成形品を備えたシール性を有する電子部品、およびシール性を有する金属インサート成形品の製造方法
JP5138827B1 (ja) * 2012-03-23 2013-02-06 Ｊｘ日鉱日石金属株式会社 電子部品用金属材料、それを用いたコネクタ端子、コネクタ及び電子部品
JP5980746B2 (ja) * 2013-08-27 2016-08-31 Ｊｘ金属株式会社 電子部品用金属材料及びその製造方法、それを用いたコネクタ端子、コネクタ及び電子部品
JP2015155571A (ja) * 2014-02-21 2015-08-27 株式会社Ｋａｎｚａｃｃ 複合金属材
JP7080942B2 (ja) * 2020-09-14 2022-06-06 Ｊｘ金属株式会社 電子部品用めっき材料及び電子部品
JP7155312B2 (ja) * 2021-02-22 2022-10-18 Ｊｘ金属株式会社 電子部品用めっき材料及び電子部品

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3108302B2 (ja) * 1994-12-28 2000-11-13 古河電気工業株式会社 電気接触特性および半田付性に優れたＳｎ合金めっき材の製造方法
JPH11279791A (ja) * 1998-03-27 1999-10-12 Nippon Mining & Metals Co Ltd 錫−インジウムはんだ合金めっき層の形成方法
JP4305699B2 (ja) * 1999-10-12 2009-07-29 協和電線株式会社 電子部品用錫系めっき条材とその製造法
JP2002317295A (ja) * 2001-04-19 2002-10-31 Furukawa Electric Co Ltd:The リフロー処理Ｓｎ合金めっき材料、それを用いた嵌合型接続端子
JP2008021501A (ja) * 2006-07-12 2008-01-31 Hitachi Cable Ltd 配線用電気部品及び端末接続部並びに配線用電気部品の製造方法
JP2010084228A (ja) * 2008-10-02 2010-04-15 Kyowa Densen Kk リードフレーム材、それを用いた半導体装置

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