JP4860494B2 - 電子装置の製造方法 - Google Patents
電子装置の製造方法 Download PDFInfo
- Publication number
- JP4860494B2 JP4860494B2 JP2007009264A JP2007009264A JP4860494B2 JP 4860494 B2 JP4860494 B2 JP 4860494B2 JP 2007009264 A JP2007009264 A JP 2007009264A JP 2007009264 A JP2007009264 A JP 2007009264A JP 4860494 B2 JP4860494 B2 JP 4860494B2
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- Japan
- Prior art keywords
- substrate
- film
- heating
- circuit chip
- thermosetting adhesive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 238000004519 manufacturing process Methods 0.000 title claims description 49
- 238000010438 heat treatment Methods 0.000 claims description 63
- 239000000758 substrate Substances 0.000 claims description 62
- 239000004020 conductor Substances 0.000 claims description 48
- 238000000034 method Methods 0.000 claims description 42
- 239000000853 adhesive Substances 0.000 claims description 39
- 230000001070 adhesive effect Effects 0.000 claims description 38
- 229920001187 thermosetting polymer Polymers 0.000 claims description 37
- 239000000463 material Substances 0.000 claims description 17
- 238000005520 cutting process Methods 0.000 claims description 12
- 239000011347 resin Substances 0.000 claims description 7
- 229920005989 resin Polymers 0.000 claims description 7
- 238000003825 pressing Methods 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims 2
- 230000008021 deposition Effects 0.000 claims 1
- 229920000139 polyethylene terephthalate Polymers 0.000 description 6
- 239000005020 polyethylene terephthalate Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000004891 communication Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 238000013021 overheating Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000005672 electromagnetic field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000009477 glass transition Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229920000515 polycarbonate Polymers 0.000 description 1
- 239000004417 polycarbonate Substances 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 229920000098 polyolefin Polymers 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
- H05K3/305—Affixing by adhesive
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
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- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
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- G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
- G06K19/07754—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna the connection being galvanic
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- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L2924/14—Integrated circuits
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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- H05K1/18—Printed circuits structurally associated with non-printed electric components
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- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
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- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
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- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
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- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
樹脂材料からなるフィルム上に導体パターンが形成されてなる基体のこの導体パターンが形成された側の面に熱硬化接着剤を付着させる付着工程と、
上記導体パターンに接続する回路チップを、上記熱硬化接着剤を介して上記基体に載せる搭載工程と、
上記基体の上記回路チップ側に当接する押さえ部と、この基体のフィルム側に当接してこの基体を支持する支持部とを有する、上記熱硬化接着剤を加熱する加熱装置によって、この基体を回路チップ側とフィルム側との両側から挟む挟持工程と、
上記回路チップが載せられた上記基体に、上記フィルムが広がる方向への張力を付与する張力付与工程と、
上記加熱装置によって上記熱硬化接着剤を加熱して硬化させることによって上記回路チップを上記導体パターンに固定する加熱工程とを備えたことを特徴とする。
上記張力付与工程が、上記係止突起の対を互いに遠ざける向きに引っ張る工程であることが好ましい。
上記付着工程が、上記基体上の複数の導体パターンそれぞれに対して熱硬化接着剤を付着させる工程であり、
上記搭載工程が、上記基体上の複数の導体パターンそれぞれに接続する複数の回路チップをこの基体に載せる工程であり、
上記挟持工程が、上記基体上で互いに隣り合う複数の導体パターンの間のフィルムが一部は挟まれずに残るようにこの基体のこの複数の導体パターンそれぞれの箇所を挟む工程であり、
上記張力付与工程が、上記挟持工程で複数の導体パターンの間に残ったフィルムの部分に治具を引っ掛けることによって上記基体に張力を付与する工程であり、
上記基体を切断することによって複数の電子装置を形成する切断工程をさらに有することが好ましい。
樹脂材料からなるフィルム上に導体パターンが形成されてなる基体の該導体パターンが形成された側の面に熱硬化接着剤を付着させる付着工程と、
前記導体パターンに接続する回路チップを、前記熱硬化接着剤を介して前記基体に載せる搭載工程と、
前記基体の前記回路チップ側に当接する押さえ部と、該基体のフィルム側に当接して該基体を支持する支持部とを有する、前記熱硬化接着剤を加熱する加熱装置によって、該基体を回路チップ側とフィルム側との両側から挟む挟持工程と、
前記回路チップが載せられた前記基体に、前記フィルムが広がる方向への張力を付与する張力付与工程と、
前記加熱装置によって前記熱硬化接着剤を加熱して硬化させることによって前記回路チップを前記導体パターンに固定する加熱工程とを備えたことを特徴とする電子装置の製造方法。
前記フィルムのうち、前記回路チップが載せられる搭載領域を挟んだ両側に少なくとも1対の係止突起を設ける突起敷設工程をさらに備え、
前記張力付与工程が、前記係止突起の対を互いに遠ざける向きに引っ張る工程であることを特徴とする付記1記載の電子装置の製造方法。
前記張力付与工程が、前記フィルムのうち、前記回路チップが載せられる搭載領域を挟んだ両側の部分を挟持して互いに遠ざける向きに引っ張る工程であることを特徴とする付記1記載の電子装置の製造方法。
前記基体が、1枚のフィルム上に前記導体パターンが複数並んで形成されてなるものであり、
前記付着工程が、前記基体上の複数の導体パターンそれぞれに対して熱硬化接着剤を付着させる工程であり、
前記搭載工程が、前記基体上の複数の導体パターンそれぞれに接続する複数の回路チップを該基体に載せる工程であり、
前記挟持工程が、前記基体上で互いに隣り合う複数の導体パターンの間のフィルムが一部は挟まれずに残るように該基体の該複数の導体パターンそれぞれの箇所を挟む工程であり、
前記張力付与工程が、前記挟持工程で複数の導体パターンの間に残ったフィルムの部分に治具を引っ掛けることによって前記基体に張力を付与する工程であり、
前記基体を切断することによって複数の電子装置を形成する切断工程をさらに有することを特徴とする付記1記載の電子装置の製造方法。
11,51,71 基体
11a 搭載面
111 フィルム
112 アンテナパターン(導体パターン)
12 ICチップ(回路チップ)
13p 熱硬化接着剤
16 係止ピン
2,6,60 加熱装置(製造装置)
21 加熱ヘッド(過熱部)
22 加熱ステージ(支持部)
23 引張り部
63 挟持部
67 ロール(治具)
Claims (2)
- 樹脂材料からなるフィルム上に導体パターンが形成されてなる基体の、回路チップが載せられる搭載領域を挟んだ両側に少なくとも1対の係止突起を設ける突起敷設工程と、
前記基体の前記導体パターンが形成された側の面に熱硬化接着剤を付着させる付着工程と、
前記導体パターンに接続する前記回路チップを、前記熱硬化接着剤を介して前記基体に載せる搭載工程と、
前記基体の前記回路チップ側に当接する押さえ部と、該基体のフィルム側に当接して該基体を支持する支持部とを有する、前記熱硬化接着剤を加熱する加熱装置によって、該基体を回路チップ側とフィルム側との両側から挟む挟持工程と、
前記回路チップが載せられた前記基体に、前記フィルムが広がる方向への張力を付与する張力付与工程と、
前記加熱装置によって前記熱硬化接着剤を加熱して硬化させることによって前記回路チップを前記導体パターンに固定する加熱工程とを備え、
前記張力付与工程が、前記係止突起の対を互いに遠ざける向きに引っ張る工程であることを特徴とする電子装置の製造方法。 - 樹脂材料からなる1枚のフィルム上に複数の導体パターンが並んで形成されてなる基体の該複数の導体パターンが形成された側の面に、該複数の導体パターンそれぞれに対して熱硬化接着剤を付着させる付着工程と、
前記複数の導体パターンそれぞれに接続する複数の回路チップを、前記熱硬化接着剤を介して前記基体に載せる搭載工程と、
前記基体の前記回路チップ側に当接する押さえ部と、該基体のフィルム側に当接して該基体を支持する支持部とを有する、前記熱硬化接着剤を加熱する加熱装置によって、該基体上で互いに隣り合う複数の導体パターンの間のフィルムが一部は挟まれずに残るように該基体の該複数の導体パターンそれぞれの箇所を回路チップ側とフィルム側との両側から挟む挟持工程と、
前記挟持工程で複数の導体パターンの間に残ったフィルムの部分に治具を引っ掛けることによって、前記回路チップが載せられた前記基体に、前記フィルムが広がる方向への張力を付与する張力付与工程と、
前記加熱装置によって前記熱硬化接着剤を加熱して硬化させることによって前記回路チップを前記導体パターンに固定する加熱工程と、
前記基体を切断することによって複数の電子装置を形成する切断工程とを備えたことを特徴とする電子装置の製造方法。
Priority Applications (7)
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JP2007009264A JP4860494B2 (ja) | 2007-01-18 | 2007-01-18 | 電子装置の製造方法 |
TW096142820A TWI351243B (en) | 2007-01-18 | 2007-11-13 | Manufacturing method of electronic device |
US11/983,867 US7605021B2 (en) | 2007-01-18 | 2007-11-13 | Manufacturing method of electronic device |
EP07121156A EP1947917B1 (en) | 2007-01-18 | 2007-11-20 | Manufacturing method of electronic device |
DE602007011881T DE602007011881D1 (de) | 2007-01-18 | 2007-11-20 | Herstellungsverfahren für eine elektronische Vorrichtung |
CN200710195964A CN100584152C (zh) | 2007-01-18 | 2007-12-07 | 电子器件的制造方法 |
KR1020070126914A KR100945771B1 (ko) | 2007-01-18 | 2007-12-07 | 전자 장치의 제조 방법 |
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JP2007009264A JP4860494B2 (ja) | 2007-01-18 | 2007-01-18 | 電子装置の製造方法 |
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JP4860494B2 true JP4860494B2 (ja) | 2012-01-25 |
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EP (1) | EP1947917B1 (ja) |
JP (1) | JP4860494B2 (ja) |
KR (1) | KR100945771B1 (ja) |
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CN102738055B (zh) * | 2011-04-13 | 2015-07-01 | 颀中科技(苏州)有限公司 | 一种覆晶封装系统及其挑高夹具 |
US9426914B2 (en) * | 2012-05-17 | 2016-08-23 | Intel Corporation | Film insert molding for device manufacture |
JP6679244B2 (ja) * | 2015-08-27 | 2020-04-15 | 富士通株式会社 | Rfidタグ |
CN111612118A (zh) * | 2019-02-26 | 2020-09-01 | 法国圣-戈班玻璃公司 | 具有改进的可读性的镀膜窗玻璃及其制造方法 |
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US5261155A (en) * | 1991-08-12 | 1993-11-16 | International Business Machines Corporation | Method for bonding flexible circuit to circuitized substrate to provide electrical connection therebetween using different solders |
JP3030201B2 (ja) * | 1994-04-26 | 2000-04-10 | 富士通株式会社 | 半導体装置の製造方法及び半導体装置の製造装置 |
US6870272B2 (en) * | 1994-09-20 | 2005-03-22 | Tessera, Inc. | Methods of making microelectronic assemblies including compliant interfaces |
US6099678A (en) * | 1995-12-26 | 2000-08-08 | Hitachi Chemical Company Ltd. | Laminating method of film-shaped organic die-bonding material, die-bonding method, laminating machine and die-bonding apparatus, semiconductor device, and fabrication process of semiconductor device |
JP3402232B2 (ja) | 1998-12-25 | 2003-05-06 | 株式会社デンソー | Icカード製造方法 |
JP3447602B2 (ja) * | 1999-02-05 | 2003-09-16 | シャープ株式会社 | 半導体装置の製造方法 |
JP2000357859A (ja) * | 1999-06-14 | 2000-12-26 | Seiko Epson Corp | 導電膜貼着装置及び導電膜貼着方法 |
JP2001044239A (ja) * | 1999-07-29 | 2001-02-16 | Matsushita Electric Ind Co Ltd | 電子部品の混載実装方法及びその混載実装工程に用いる部材 |
JP3451373B2 (ja) | 1999-11-24 | 2003-09-29 | オムロン株式会社 | 電磁波読み取り可能なデータキャリアの製造方法 |
JP4445624B2 (ja) * | 1999-12-28 | 2010-04-07 | パナソニック株式会社 | Icチップのフィルム状回路基板への接合方法及びicチップ接合体 |
JP3659133B2 (ja) * | 2000-06-23 | 2005-06-15 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
JP2004221334A (ja) * | 2003-01-15 | 2004-08-05 | Seiko Epson Corp | 金属素子形成方法、半導体装置の製造方法及び電子デバイスの製造方法、半導体装置及び電子デバイス、並びに電子機器 |
JP4010962B2 (ja) * | 2003-02-20 | 2007-11-21 | 三井金属鉱業株式会社 | 電子部品実装用フィルムキャリアテープの搬送装置および搬送方法 |
JP2006049591A (ja) * | 2004-08-05 | 2006-02-16 | Disco Abrasive Syst Ltd | ウエーハに貼着された接着フィルムの破断方法および破断装置 |
JP3992038B2 (ja) * | 2004-11-16 | 2007-10-17 | セイコーエプソン株式会社 | 電子素子の実装方法、電子装置の製造方法、回路基板、電子機器 |
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- 2007-11-13 US US11/983,867 patent/US7605021B2/en not_active Expired - Fee Related
- 2007-11-13 TW TW096142820A patent/TWI351243B/zh not_active IP Right Cessation
- 2007-11-20 EP EP07121156A patent/EP1947917B1/en not_active Not-in-force
- 2007-11-20 DE DE602007011881T patent/DE602007011881D1/de active Active
- 2007-12-07 KR KR1020070126914A patent/KR100945771B1/ko not_active IP Right Cessation
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Also Published As
Publication number | Publication date |
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EP1947917A3 (en) | 2009-11-11 |
CN100584152C (zh) | 2010-01-20 |
EP1947917A2 (en) | 2008-07-23 |
EP1947917B1 (en) | 2011-01-12 |
JP2008177352A (ja) | 2008-07-31 |
TW200833204A (en) | 2008-08-01 |
TWI351243B (en) | 2011-10-21 |
DE602007011881D1 (de) | 2011-02-24 |
US7605021B2 (en) | 2009-10-20 |
KR100945771B1 (ko) | 2010-03-08 |
US20080176361A1 (en) | 2008-07-24 |
KR20080068530A (ko) | 2008-07-23 |
CN101227797A (zh) | 2008-07-23 |
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