JP4849614B2 - 基板処理方法及び基板処理システム - Google Patents

基板処理方法及び基板処理システム Download PDF

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Publication number
JP4849614B2
JP4849614B2 JP2006298187A JP2006298187A JP4849614B2 JP 4849614 B2 JP4849614 B2 JP 4849614B2 JP 2006298187 A JP2006298187 A JP 2006298187A JP 2006298187 A JP2006298187 A JP 2006298187A JP 4849614 B2 JP4849614 B2 JP 4849614B2
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Japan
Prior art keywords
substrate
gas
chamber
film
substrate processing
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Active
Application number
JP2006298187A
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English (en)
Japanese (ja)
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JP2008117867A (ja
Inventor
大輔 林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
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Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to JP2006298187A priority Critical patent/JP4849614B2/ja
Priority to US11/869,151 priority patent/US8206605B2/en
Priority to TW096138507A priority patent/TWI431692B/zh
Priority to KR1020070110111A priority patent/KR100892542B1/ko
Priority to CNB2007101666683A priority patent/CN100547743C/zh
Publication of JP2008117867A publication Critical patent/JP2008117867A/ja
Application granted granted Critical
Publication of JP4849614B2 publication Critical patent/JP4849614B2/ja
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02057Cleaning during device manufacture
    • H01L21/0206Cleaning during device manufacture during, before or after processing of insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
JP2006298187A 2006-11-01 2006-11-01 基板処理方法及び基板処理システム Active JP4849614B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2006298187A JP4849614B2 (ja) 2006-11-01 2006-11-01 基板処理方法及び基板処理システム
US11/869,151 US8206605B2 (en) 2006-11-01 2007-10-09 Substrate processing method and substrate processing system
TW096138507A TWI431692B (zh) 2006-11-01 2007-10-15 基板處理方法及基板處理系統
KR1020070110111A KR100892542B1 (ko) 2006-11-01 2007-10-31 기판 처리 방법 및 기판 처리 시스템
CNB2007101666683A CN100547743C (zh) 2006-11-01 2007-11-01 基板处理方法和基板处理系统

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006298187A JP4849614B2 (ja) 2006-11-01 2006-11-01 基板処理方法及び基板処理システム

Publications (2)

Publication Number Publication Date
JP2008117867A JP2008117867A (ja) 2008-05-22
JP4849614B2 true JP4849614B2 (ja) 2012-01-11

Family

ID=39422963

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006298187A Active JP4849614B2 (ja) 2006-11-01 2006-11-01 基板処理方法及び基板処理システム

Country Status (4)

Country Link
JP (1) JP4849614B2 (zh)
KR (1) KR100892542B1 (zh)
CN (1) CN100547743C (zh)
TW (1) TWI431692B (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5406081B2 (ja) * 2010-03-15 2014-02-05 ラピスセミコンダクタ株式会社 半導体装置の製造方法
US8455286B2 (en) * 2010-10-29 2013-06-04 Freescale Semiconductor, Inc. Method of making a micro-electro-mechanical-systems (MEMS) device
JP5823160B2 (ja) 2011-05-11 2015-11-25 東京エレクトロン株式会社 堆積物除去方法
CN102412141A (zh) * 2011-11-14 2012-04-11 上海华虹Nec电子有限公司 一种去除深沟槽内氧化膜残留的方法
JP6017170B2 (ja) * 2012-04-18 2016-10-26 東京エレクトロン株式会社 堆積物除去方法及びガス処理装置
JP6502206B2 (ja) * 2015-08-07 2019-04-17 東京エレクトロン株式会社 基板処理装置及び基板処理方法
TWI700750B (zh) * 2017-01-24 2020-08-01 美商應用材料股份有限公司 用於介電薄膜的選擇性沉積之方法及設備
US10692730B1 (en) * 2019-08-30 2020-06-23 Mattson Technology, Inc. Silicon oxide selective dry etch process

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH088231B2 (ja) * 1989-10-02 1996-01-29 大日本スクリーン製造株式会社 絶縁膜の選択的除去方法
JP2853211B2 (ja) * 1989-11-01 1999-02-03 富士通株式会社 半導体装置の製造方法
JPH0715902B2 (ja) * 1991-10-28 1995-02-22 インターナショナル・ビジネス・マシーンズ・コーポレイション 二酸化シリコンをエッチングするための安全な方法
JPH07147273A (ja) * 1993-11-24 1995-06-06 Tokyo Electron Ltd エッチング処理方法
JP3629179B2 (ja) * 1999-03-19 2005-03-16 株式会社東芝 半導体装置の製造方法
US6284666B1 (en) * 2000-05-31 2001-09-04 International Business Machines Corporation Method of reducing RIE lag for deep trench silicon etching
JP2001351899A (ja) 2000-06-07 2001-12-21 Sharp Corp 半導体装置の製造方法
JP2002217414A (ja) * 2001-01-22 2002-08-02 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
JP4933763B2 (ja) * 2005-02-18 2012-05-16 東京エレクトロン株式会社 固体撮像素子の製造方法、薄膜デバイスの製造方法及びプログラム
EP1780779A3 (en) 2005-10-28 2008-06-11 Interuniversitair Microelektronica Centrum ( Imec) A plasma for patterning advanced gate stacks

Also Published As

Publication number Publication date
KR20080039809A (ko) 2008-05-07
TW200832555A (en) 2008-08-01
TWI431692B (zh) 2014-03-21
CN101174562A (zh) 2008-05-07
KR100892542B1 (ko) 2009-04-09
JP2008117867A (ja) 2008-05-22
CN100547743C (zh) 2009-10-07

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