JP4843144B2 - 集積デバイスを低電力状態からパワーアップする方法および装置 - Google Patents
集積デバイスを低電力状態からパワーアップする方法および装置 Download PDFInfo
- Publication number
- JP4843144B2 JP4843144B2 JP2000614107A JP2000614107A JP4843144B2 JP 4843144 B2 JP4843144 B2 JP 4843144B2 JP 2000614107 A JP2000614107 A JP 2000614107A JP 2000614107 A JP2000614107 A JP 2000614107A JP 4843144 B2 JP4843144 B2 JP 4843144B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- power
- power state
- state
- registers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3237—Power saving characterised by the action undertaken by disabling clock generation or distribution
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/325—Power saving in peripheral device
- G06F1/3265—Power saving in display device
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
- G06F3/1423—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
- G06F3/1438—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display using more than one graphics controller
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Computer Graphics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- Power Sources (AREA)
- Microcomputers (AREA)
- Logic Circuits (AREA)
- Controls And Circuits For Display Device (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/300,075 US6510525B1 (en) | 1999-04-26 | 1999-04-26 | Method and apparatus to power up an integrated device from a low power state |
| US09/300,075 | 1999-04-26 | ||
| PCT/US2000/011055 WO2000065428A1 (en) | 1999-04-26 | 2000-04-24 | A method and apparatus to power up an integrated device from a low power state |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2002543486A JP2002543486A (ja) | 2002-12-17 |
| JP2002543486A5 JP2002543486A5 (enExample) | 2007-06-28 |
| JP4843144B2 true JP4843144B2 (ja) | 2011-12-21 |
Family
ID=23157595
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000614107A Expired - Lifetime JP4843144B2 (ja) | 1999-04-26 | 2000-04-24 | 集積デバイスを低電力状態からパワーアップする方法および装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6510525B1 (enExample) |
| JP (1) | JP4843144B2 (enExample) |
| TW (1) | TW525051B (enExample) |
| WO (1) | WO2000065428A1 (enExample) |
Families Citing this family (71)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7100061B2 (en) | 2000-01-18 | 2006-08-29 | Transmeta Corporation | Adaptive power control |
| JP2002072990A (ja) * | 2000-06-12 | 2002-03-12 | Sharp Corp | 画像表示システム及び表示装置 |
| US6968469B1 (en) | 2000-06-16 | 2005-11-22 | Transmeta Corporation | System and method for preserving internal processor context when the processor is powered down and restoring the internal processor context when processor is restored |
| JP4383641B2 (ja) * | 2000-08-31 | 2009-12-16 | 株式会社東芝 | 表示制御装置およびコンピュータシステム並びにパワーマネージメント方法 |
| US7260731B1 (en) | 2000-10-23 | 2007-08-21 | Transmeta Corporation | Saving power when in or transitioning to a static mode of a processor |
| US7112978B1 (en) | 2002-04-16 | 2006-09-26 | Transmeta Corporation | Frequency specific closed loop feedback control of integrated circuits |
| US7336090B1 (en) | 2002-04-16 | 2008-02-26 | Transmeta Corporation | Frequency specific closed loop feedback control of integrated circuits |
| US7941675B2 (en) * | 2002-12-31 | 2011-05-10 | Burr James B | Adaptive power control |
| US7634668B2 (en) * | 2002-08-22 | 2009-12-15 | Nvidia Corporation | Method and apparatus for adaptive power consumption |
| US7205758B1 (en) * | 2004-02-02 | 2007-04-17 | Transmeta Corporation | Systems and methods for adjusting threshold voltage |
| US7953990B2 (en) * | 2002-12-31 | 2011-05-31 | Stewart Thomas E | Adaptive power control based on post package characterization of integrated circuits |
| US7786756B1 (en) | 2002-12-31 | 2010-08-31 | Vjekoslav Svilan | Method and system for latchup suppression |
| US7642835B1 (en) | 2003-11-12 | 2010-01-05 | Robert Fu | System for substrate potential regulation during power-up in integrated circuits |
| US7949864B1 (en) | 2002-12-31 | 2011-05-24 | Vjekoslav Svilan | Balanced adaptive body bias control |
| US7228242B2 (en) | 2002-12-31 | 2007-06-05 | Transmeta Corporation | Adaptive power control based on pre package characterization of integrated circuits |
| US7062668B2 (en) * | 2003-04-24 | 2006-06-13 | Dell Products L.P. | Method and system for information handling system component power management sequencing |
| EP1519257B1 (de) | 2003-09-26 | 2013-04-24 | Siemens Aktiengesellschaft | Datenverarbeitungseinheit mit Entkopplungseinheit |
| US7376852B2 (en) * | 2003-11-04 | 2008-05-20 | International Business Machines Corporation | Method for controlling power change for a semiconductor module |
| US7129771B1 (en) | 2003-12-23 | 2006-10-31 | Transmeta Corporation | Servo loop for well bias voltage source |
| US7012461B1 (en) | 2003-12-23 | 2006-03-14 | Transmeta Corporation | Stabilization component for a substrate potential regulation circuit |
| US7692477B1 (en) | 2003-12-23 | 2010-04-06 | Tien-Min Chen | Precise control component for a substrate potential regulation circuit |
| US7649402B1 (en) | 2003-12-23 | 2010-01-19 | Tien-Min Chen | Feedback-controlled body-bias voltage source |
| US7859062B1 (en) | 2004-02-02 | 2010-12-28 | Koniaris Kleanthes G | Systems and methods for integrated circuits comprising multiple body biasing domains |
| US7816742B1 (en) | 2004-09-30 | 2010-10-19 | Koniaris Kleanthes G | Systems and methods for integrated circuits comprising multiple body biasing domains |
| US7562233B1 (en) * | 2004-06-22 | 2009-07-14 | Transmeta Corporation | Adaptive control of operating and body bias voltages |
| US7774625B1 (en) | 2004-06-22 | 2010-08-10 | Eric Chien-Li Sheng | Adaptive voltage control by accessing information stored within and specific to a microprocessor |
| JP2006107127A (ja) * | 2004-10-05 | 2006-04-20 | Nec Electronics Corp | 半導体集積回路装置 |
| US7719405B2 (en) * | 2004-12-14 | 2010-05-18 | Analog Devices, Inc. | Crosspoint switch with low reconfiguration latency |
| US7337342B1 (en) * | 2005-04-28 | 2008-02-26 | Summit Microelectronics, Inc. | Power supply sequencing distributed among multiple devices with linked operation |
| EP1927042A2 (en) | 2005-09-12 | 2008-06-04 | Nxp B.V. | Power management for buses in cmos circuits |
| JP4621113B2 (ja) * | 2005-10-28 | 2011-01-26 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置 |
| KR100713278B1 (ko) | 2005-11-15 | 2007-05-04 | 엘지전자 주식회사 | 영상표시기기의 전원 제어장치 |
| US20070152993A1 (en) * | 2005-12-29 | 2007-07-05 | Intel Corporation | Method, display, graphics system and computer system for power efficient displays |
| JP2009110428A (ja) * | 2007-10-31 | 2009-05-21 | Toshiba Corp | 情報処理装置および制御方法 |
| US8028185B2 (en) * | 2008-03-11 | 2011-09-27 | Globalfoundries Inc. | Protocol for transitioning in and out of zero-power state |
| US8156362B2 (en) * | 2008-03-11 | 2012-04-10 | Globalfoundries Inc. | Hardware monitoring and decision making for transitioning in and out of low-power state |
| US8112648B2 (en) * | 2008-03-11 | 2012-02-07 | Globalfoundries Inc. | Enhanced control of CPU parking and thread rescheduling for maximizing the benefits of low-power state |
| US8112647B2 (en) * | 2008-08-27 | 2012-02-07 | Globalfoundries Inc. | Protocol for power state determination and demotion |
| CN101526845B (zh) * | 2009-04-24 | 2011-02-16 | 威盛电子股份有限公司 | 电源管理方法及其相关芯片组 |
| DE102009019891B3 (de) * | 2009-05-04 | 2010-11-25 | Texas Instruments Deutschland Gmbh | Mikrocontroller- oder Mikroprozessoreinheit und Verfahren zum Betreiben derselben |
| US8566628B2 (en) * | 2009-05-06 | 2013-10-22 | Advanced Micro Devices, Inc. | North-bridge to south-bridge protocol for placing processor in low power state |
| TWI395096B (zh) * | 2009-05-12 | 2013-05-01 | Via Tech Inc | 電源管理方法及其相關晶片組及電腦系統 |
| US8826048B2 (en) * | 2009-09-01 | 2014-09-02 | Nvidia Corporation | Regulating power within a shared budget |
| US8700925B2 (en) * | 2009-09-01 | 2014-04-15 | Nvidia Corporation | Regulating power using a fuzzy logic control system |
| US8943347B2 (en) | 2009-09-09 | 2015-01-27 | Advanced Micro Devices, Inc. | Controlling the power state of an idle processing device |
| US8316255B2 (en) * | 2009-09-09 | 2012-11-20 | Ati Technologies Ulc | Method and apparatus for responding to signals from a disabling device while in a disabled state |
| US20110112798A1 (en) * | 2009-11-06 | 2011-05-12 | Alexander Branover | Controlling performance/power by frequency control of the responding node |
| US20110131427A1 (en) * | 2009-12-02 | 2011-06-02 | Jorgenson Joel A | Power management states |
| US9256265B2 (en) | 2009-12-30 | 2016-02-09 | Nvidia Corporation | Method and system for artificially and dynamically limiting the framerate of a graphics processing unit |
| US9830889B2 (en) | 2009-12-31 | 2017-11-28 | Nvidia Corporation | Methods and system for artifically and dynamically limiting the display resolution of an application |
| US8271812B2 (en) * | 2010-04-07 | 2012-09-18 | Apple Inc. | Hardware automatic performance state transitions in system on processor sleep and wake events |
| US8504854B2 (en) | 2010-06-21 | 2013-08-06 | Advanced Micro Devices, Inc. | Managing multiple operating points for stable virtual frequencies |
| US8806232B2 (en) * | 2010-09-30 | 2014-08-12 | Apple Inc. | Systems and method for hardware dynamic cache power management via bridge and power manager |
| US9261949B2 (en) | 2010-10-29 | 2016-02-16 | Advanced Micro Devices, Inc. | Method for adaptive performance optimization of the soc |
| US8468373B2 (en) | 2011-01-14 | 2013-06-18 | Apple Inc. | Modifying performance parameters in multiple circuits according to a performance state table upon receiving a request to change a performance state |
| US8862906B2 (en) * | 2011-04-01 | 2014-10-14 | Intel Corporation | Control of platform power consumption using coordination of platform power management and display power management |
| US8862909B2 (en) | 2011-12-02 | 2014-10-14 | Advanced Micro Devices, Inc. | System and method for determining a power estimate for an I/O controller based on monitored activity levels and adjusting power limit of processing units by comparing the power estimate with an assigned power limit for the I/O controller |
| US8924758B2 (en) | 2011-12-13 | 2014-12-30 | Advanced Micro Devices, Inc. | Method for SOC performance and power optimization |
| US9395799B2 (en) | 2012-08-09 | 2016-07-19 | Nvidia Corporation | Power management techniques for USB interfaces |
| US9760150B2 (en) | 2012-11-27 | 2017-09-12 | Nvidia Corporation | Low-power states for a computer system with integrated baseband |
| US9436244B2 (en) * | 2013-03-15 | 2016-09-06 | Intel Corporation | Adaptive control loop protection for fast and robust recovery from low-power states in high speed serial I/O applications |
| US9177534B2 (en) | 2013-03-15 | 2015-11-03 | Intel Corporation | Data transmission for display partial update |
| KR101531038B1 (ko) * | 2013-12-05 | 2015-06-23 | 전자부품연구원 | Surf 하드웨어 장치 및 적분 이미지 메모리 관리 방법 |
| GB2537855B (en) | 2015-04-28 | 2018-10-24 | Advanced Risc Mach Ltd | Controlling transitions of devices between normal state and quiescent state |
| US9892058B2 (en) | 2015-12-16 | 2018-02-13 | Advanced Micro Devices, Inc. | Centrally managed unified shared virtual address space |
| JP6702790B2 (ja) * | 2016-04-28 | 2020-06-03 | キヤノン株式会社 | 代理応答機能を有するネットワークインターフェースを備える情報処理装置 |
| US10970118B2 (en) | 2017-08-02 | 2021-04-06 | Advanced Micro Devices, Inc. | Shareable FPGA compute engine |
| US10754413B2 (en) * | 2017-09-30 | 2020-08-25 | Intel Corporation | Mechanism to enter or exit retention level voltage while a system-on-a-chip is in low power mode |
| TWI697841B (zh) * | 2018-12-18 | 2020-07-01 | 新唐科技股份有限公司 | 控制電路及快速設定電源模式的方法 |
| US11422812B2 (en) | 2019-06-25 | 2022-08-23 | Advanced Micro Devices, Inc. | Method and apparatus for efficient programmable instructions in computer systems |
| CN110673712B (zh) * | 2019-09-24 | 2021-03-16 | 上海灵动微电子股份有限公司 | 一种用于mcu芯片的电源管理电路及方法 |
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| JPS58205226A (ja) * | 1982-05-25 | 1983-11-30 | Fujitsu Ltd | スタンバイ機能を内蔵したマイクロコンピユ−タ |
| JPS6267617A (ja) * | 1985-09-20 | 1987-03-27 | Hitachi Micro Comput Eng Ltd | 半導体集積回路装置 |
| JPH04134509A (ja) * | 1990-09-27 | 1992-05-08 | Toshiba Corp | パーソナルコンピュータ |
| GB9108599D0 (en) * | 1991-04-22 | 1991-06-05 | Pilkington Micro Electronics | Peripheral controller |
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| JPH0651727A (ja) * | 1992-06-04 | 1994-02-25 | Toshiba Corp | 表示制御方法及び表示制御装置 |
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-
1999
- 1999-04-26 US US09/300,075 patent/US6510525B1/en not_active Expired - Lifetime
-
2000
- 2000-04-24 WO PCT/US2000/011055 patent/WO2000065428A1/en not_active Ceased
- 2000-04-24 JP JP2000614107A patent/JP4843144B2/ja not_active Expired - Lifetime
- 2000-04-25 TW TW089107771A patent/TW525051B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| WO2000065428A1 (en) | 2000-11-02 |
| JP2002543486A (ja) | 2002-12-17 |
| TW525051B (en) | 2003-03-21 |
| US6510525B1 (en) | 2003-01-21 |
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