JP4833650B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- JP4833650B2 JP4833650B2 JP2005354495A JP2005354495A JP4833650B2 JP 4833650 B2 JP4833650 B2 JP 4833650B2 JP 2005354495 A JP2005354495 A JP 2005354495A JP 2005354495 A JP2005354495 A JP 2005354495A JP 4833650 B2 JP4833650 B2 JP 4833650B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/75—Electrodes comprising two or more layers, e.g. comprising a barrier layer and a metal layer
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02181—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing hafnium, e.g. HfO2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02189—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing zirconium, e.g. ZrO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31604—Deposition from a gas or vapour
- H01L21/31641—Deposition of Zirconium oxides, e.g. ZrO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31604—Deposition from a gas or vapour
- H01L21/31645—Deposition of Hafnium oxides, e.g. HfO2
Description
以下に、本発明の第1の実施形態に係る半導体装置の製造方法について、図面を参照しながら説明する。
以下に、本発明の第2の実施形態に係る半導体装置の製造方法について、図面を参照しながら説明する。第2の実施形態が第1の実施形態と異なっている点は、下部電極として、ALD法により形成されたTaN膜を用いていることである。
11 第1の層間絶縁膜
12 第1のホール
13 導体プラグ
14 第2の層間絶縁膜
15 第2のホール
16 下部電極
16A 窒化チタン膜
16B 窒化チタン膜
17 容量絶縁膜
18 上部電極材料膜
26 下部電極
26A 窒化タンタル膜
26B 窒化タンタル膜
Claims (11)
- 基板上に下部電極、容量絶縁膜及び上部電極を順次積層して形成したキャパシタを備えた半導体装置であって、
前記下部電極は、第1の導電層と、前記第1の導電層上に形成され且つ前記第1の導電層よりも抵抗率が高い第2の導電層とを有し、
前記容量絶縁膜は、Hf酸化物からなり且つ前記下部電極における前記第2の導電層に接して形成され、
前記下部電極における前記第1の導電層は、プラズマ処理による低抵抗化が行われており、
前記下部電極における前記第2の導電層は、非晶質であり且つプラズマ処理による低抵抗化が行われておらず、
前記下部電極における前記第1の導電層及び前記第2の導電層は、同じ導電材料からなり、
前記導電材料は窒化チタン又は窒化タンタルであることを特徴とする半導体装置。 - 請求項1に記載の半導体装置において、
前記容量絶縁膜は非晶質であることを特徴とする半導体装置。 - 請求項1又は2に記載の半導体装置において、
前記下部電極における前記第1の導電層及び前記第2の導電層はいずれも窒化チタン膜であることを特徴とする半導体装置。 - 請求項1又は2に記載の半導体装置において、
前記下部電極における前記第1の導電層及び前記第2の導電層はいずれも窒化タンタル膜であることを特徴とする半導体装置。 - 請求項1〜4のうちのいずれか1項に記載の半導体装置において、
前記下部電極における前記第1の導電層及び前記第2の導電層は、MOCVD法によって形成されていることを特徴とする半導体装置。 - 基板上に下部電極、容量絶縁膜及び上部電極を順次積層して形成したキャパシタを備えた半導体装置の製造方法であって、
前記基板上に、前記下部電極の一部となる第1の導電層を形成する工程(a)と、
前記第1の導電層上に、前記下部電極の一部となり且つ前記第1の導電層よりも抵抗率が高い非晶質の第2の導電層を形成する工程(b)と、
前記第2の導電層上に前記第2の導電層と接するように、Hf酸化物からなる前記容量絶縁膜を形成する工程(c)とを備え、
前記工程(a)では、前記第1の導電層を形成した後、前記第1の導電層に対して、水素イオンと窒素イオンとを含むプラズマによる処理を行って、前記第1の導電層の低抵抗化を行い、
前記工程(b)では、前記第2の導電層を形成した後、前記第2の導電層に対してプラズマ処理を行わず、
前記下部電極における前記第1の導電層及び前記第2の導電層は、同じ導電材料からなり、
前記導電材料は窒化チタン又は窒化タンタルであることを特徴とする半導体装置の製造方法。 - 請求項6に記載の半導体装置の製造方法において、
前記容量絶縁膜はALD法によって形成されることを特徴とする半導体装置の製造方法。 - 請求項6又は7に記載の半導体装置の製造方法において、
前記容量絶縁膜は、少なくともテトラエチルメチルアミノハフニウムガスとオゾンガスとを用いて形成されることを特徴とする半導体装置の製造方法。 - 請求項6〜8のうちのいずれか1項に記載の半導体装置の製造方法において、
前記下部電極における前記第1の導電層及び前記第2の導電層はいずれも、少なくともテトラジメチルアミノチタンガスと窒素ガスとを用いて形成された窒化チタンからなることを特徴とする半導体装置の製造方法。 - 請求項6〜8のうちのいずれか1項に記載の半導体装置の製造方法において、
前記下部電極における前記第1の導電層及び前記第2の導電層はいずれも、少なくともペンタジメチルアミノタンタルガスを用いて形成された窒化タンタルからなることを特徴とする半導体装置の製造方法。 - 請求項6〜10のうちのいずれか1項に記載の半導体装置の製造方法において、
前記工程(a)では、MOCVD法を用いて前記第1の導電層を形成し、
前記工程(b)では、MOCVD法を用いて前記第2の導電層を形成することを特徴とする半導体装置の製造方法。
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JP2005354495A JP4833650B2 (ja) | 2005-12-08 | 2005-12-08 | 半導体装置及びその製造方法 |
CNA2006101513626A CN1979870A (zh) | 2005-12-08 | 2006-09-07 | 半导体装置及其制造方法 |
US11/522,982 US7834419B2 (en) | 2005-12-08 | 2006-09-19 | Semiconductor device and method for fabricating the same |
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JP2005354495A JP4833650B2 (ja) | 2005-12-08 | 2005-12-08 | 半導体装置及びその製造方法 |
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JP2007158222A JP2007158222A (ja) | 2007-06-21 |
JP4833650B2 true JP4833650B2 (ja) | 2011-12-07 |
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JP (1) | JP4833650B2 (ja) |
CN (1) | CN1979870A (ja) |
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JP5576719B2 (ja) | 2010-06-10 | 2014-08-20 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
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JP2007158222A (ja) | 2007-06-21 |
CN1979870A (zh) | 2007-06-13 |
US20070131997A1 (en) | 2007-06-14 |
US7834419B2 (en) | 2010-11-16 |
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