JP4815572B2 - 補償された高速pll回路 - Google Patents

補償された高速pll回路 Download PDF

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Publication number
JP4815572B2
JP4815572B2 JP2007530809A JP2007530809A JP4815572B2 JP 4815572 B2 JP4815572 B2 JP 4815572B2 JP 2007530809 A JP2007530809 A JP 2007530809A JP 2007530809 A JP2007530809 A JP 2007530809A JP 4815572 B2 JP4815572 B2 JP 4815572B2
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JP
Japan
Prior art keywords
phase
frequency
input
vco
loop filter
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Expired - Fee Related
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JP2007530809A
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English (en)
Japanese (ja)
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JP2008512920A (ja
JP2008512920A5 (enExample
Inventor
ビンフリット、ビルト
Original Assignee
エスティー‐エリクソン、ソシエテ、アノニム
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Publication of JP2008512920A5 publication Critical patent/JP2008512920A5/ja
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/187Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03CMODULATION
    • H03C3/00Angle modulation
    • H03C3/02Details
    • H03C3/09Modifications of modulator for regulating the mean frequency
    • H03C3/0908Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0916Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop
    • H03C3/0925Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop applying frequency modulation at the divider in the feedback loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03CMODULATION
    • H03C3/00Angle modulation
    • H03C3/02Details
    • H03C3/09Modifications of modulator for regulating the mean frequency
    • H03C3/0908Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0916Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop
    • H03C3/0933Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop using fractional frequency division in the feedback loop of the phase locked loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03CMODULATION
    • H03C3/00Angle modulation
    • H03C3/02Details
    • H03C3/09Modifications of modulator for regulating the mean frequency
    • H03C3/0908Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0941Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation at more than one point in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03CMODULATION
    • H03C3/00Angle modulation
    • H03C3/02Details
    • H03C3/09Modifications of modulator for regulating the mean frequency
    • H03C3/0908Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0975Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation in the phase locked loop at components other than the divider, the voltage controlled oscillator or the reference clock
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Electronic Switches (AREA)
JP2007530809A 2004-09-13 2005-08-30 補償された高速pll回路 Expired - Fee Related JP4815572B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP04104413 2004-09-13
EP04104413.2 2004-09-13
PCT/IB2005/052840 WO2006030335A2 (en) 2004-09-13 2005-08-30 Compensated high-speed pll circuit

Publications (3)

Publication Number Publication Date
JP2008512920A JP2008512920A (ja) 2008-04-24
JP2008512920A5 JP2008512920A5 (enExample) 2008-10-16
JP4815572B2 true JP4815572B2 (ja) 2011-11-16

Family

ID=35355255

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007530809A Expired - Fee Related JP4815572B2 (ja) 2004-09-13 2005-08-30 補償された高速pll回路

Country Status (7)

Country Link
US (1) US8102215B2 (enExample)
EP (1) EP1792400B1 (enExample)
JP (1) JP4815572B2 (enExample)
CN (1) CN101019324B (enExample)
AT (1) ATE476015T1 (enExample)
DE (1) DE602005022599D1 (enExample)
WO (1) WO2006030335A2 (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102130702A (zh) * 2010-01-20 2011-07-20 北京迅光达通信技术有限公司 数字多信道无线收发信机

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0267822A (ja) * 1988-09-02 1990-03-07 Nippon Telegr & Teleph Corp <Ntt> 周波数シンセサイザ
JPH04196716A (ja) * 1990-11-28 1992-07-16 Hitachi Ltd 位相同期回路
JPH04252621A (ja) * 1991-01-29 1992-09-08 Fujitsu Ltd 電圧制御発振器に加えるオフセット制御電圧の設定方法及び該方法による無線通信装置
JPH07202638A (ja) * 1993-12-28 1995-08-04 Matsushita Electric Ind Co Ltd 電圧制御発振器
JP2000165459A (ja) * 1998-11-23 2000-06-16 Motorola Inc 位相同期ル―プおよびその方法
JP2001028541A (ja) * 1999-06-11 2001-01-30 Koninkl Philips Electronics Nv 位相検出器のオフセット電流を補償するための装置
JP2001339301A (ja) * 2000-05-30 2001-12-07 Matsushita Electric Ind Co Ltd 周波数シンセサイザ
JP2004080624A (ja) * 2002-08-21 2004-03-11 Matsushita Electric Ind Co Ltd 周波数シンセサイザ

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63267822A (ja) 1987-04-23 1988-11-04 Hitachi Heating Appliance Co Ltd 開放型燃焼器の安全装置
US6734749B2 (en) 2001-05-29 2004-05-11 Telefonaktiebolaget Lm Ericsson (Publ) Direct modulated phase-locked loop
US6680654B2 (en) * 2001-10-24 2004-01-20 Northrop Grumman Corporation Phase locked loop with offset cancellation
US7548122B1 (en) * 2005-03-01 2009-06-16 Sequoia Communications PLL with switched parameters

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0267822A (ja) * 1988-09-02 1990-03-07 Nippon Telegr & Teleph Corp <Ntt> 周波数シンセサイザ
JPH04196716A (ja) * 1990-11-28 1992-07-16 Hitachi Ltd 位相同期回路
JPH04252621A (ja) * 1991-01-29 1992-09-08 Fujitsu Ltd 電圧制御発振器に加えるオフセット制御電圧の設定方法及び該方法による無線通信装置
JPH07202638A (ja) * 1993-12-28 1995-08-04 Matsushita Electric Ind Co Ltd 電圧制御発振器
JP2000165459A (ja) * 1998-11-23 2000-06-16 Motorola Inc 位相同期ル―プおよびその方法
JP2001028541A (ja) * 1999-06-11 2001-01-30 Koninkl Philips Electronics Nv 位相検出器のオフセット電流を補償するための装置
JP2001339301A (ja) * 2000-05-30 2001-12-07 Matsushita Electric Ind Co Ltd 周波数シンセサイザ
JP2004080624A (ja) * 2002-08-21 2004-03-11 Matsushita Electric Ind Co Ltd 周波数シンセサイザ

Also Published As

Publication number Publication date
ATE476015T1 (de) 2010-08-15
JP2008512920A (ja) 2008-04-24
EP1792400A2 (en) 2007-06-06
DE602005022599D1 (de) 2010-09-09
US8102215B2 (en) 2012-01-24
CN101019324A (zh) 2007-08-15
WO2006030335A3 (en) 2006-05-11
WO2006030335A2 (en) 2006-03-23
CN101019324B (zh) 2012-05-30
EP1792400B1 (en) 2010-07-28
US20100026396A1 (en) 2010-02-04

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