CN101019324B - 锁相环电路及补偿锁相环电路的方法 - Google Patents

锁相环电路及补偿锁相环电路的方法 Download PDF

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Publication number
CN101019324B
CN101019324B CN200580030555XA CN200580030555A CN101019324B CN 101019324 B CN101019324 B CN 101019324B CN 200580030555X A CN200580030555X A CN 200580030555XA CN 200580030555 A CN200580030555 A CN 200580030555A CN 101019324 B CN101019324 B CN 101019324B
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CN
China
Prior art keywords
phase
circuit
voltage
frequency
locked loop
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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CN200580030555XA
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English (en)
Chinese (zh)
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CN101019324A (zh
Inventor
温弗里德·比尔斯
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Koninklijke Philips NV
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NXP BV
Koninklijke Philips Electronics NV
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Publication of CN101019324A publication Critical patent/CN101019324A/zh
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/187—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C3/00—Angle modulation
    • H03C3/02—Details
    • H03C3/09—Modifications of modulator for regulating the mean frequency
    • H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0916—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop
    • H03C3/0925—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop applying frequency modulation at the divider in the feedback loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C3/00—Angle modulation
    • H03C3/02—Details
    • H03C3/09—Modifications of modulator for regulating the mean frequency
    • H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0916—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop
    • H03C3/0933—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop using fractional frequency division in the feedback loop of the phase locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C3/00—Angle modulation
    • H03C3/02—Details
    • H03C3/09—Modifications of modulator for regulating the mean frequency
    • H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0941—Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation at more than one point in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C3/00—Angle modulation
    • H03C3/02—Details
    • H03C3/09—Modifications of modulator for regulating the mean frequency
    • H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0975—Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation in the phase locked loop at components other than the divider, the voltage controlled oscillator or the reference clock
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Electronic Switches (AREA)
CN200580030555XA 2004-09-13 2005-08-30 锁相环电路及补偿锁相环电路的方法 Expired - Fee Related CN101019324B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP04104413 2004-09-13
EP04104413.2 2004-09-13
PCT/IB2005/052840 WO2006030335A2 (en) 2004-09-13 2005-08-30 Compensated high-speed pll circuit

Publications (2)

Publication Number Publication Date
CN101019324A CN101019324A (zh) 2007-08-15
CN101019324B true CN101019324B (zh) 2012-05-30

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN200580030555XA Expired - Fee Related CN101019324B (zh) 2004-09-13 2005-08-30 锁相环电路及补偿锁相环电路的方法

Country Status (7)

Country Link
US (1) US8102215B2 (enExample)
EP (1) EP1792400B1 (enExample)
JP (1) JP4815572B2 (enExample)
CN (1) CN101019324B (enExample)
AT (1) ATE476015T1 (enExample)
DE (1) DE602005022599D1 (enExample)
WO (1) WO2006030335A2 (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102130702A (zh) * 2010-01-20 2011-07-20 北京迅光达通信技术有限公司 数字多信道无线收发信机

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6157271A (en) * 1998-11-23 2000-12-05 Motorola, Inc. Rapid tuning, low distortion digital direct modulation phase locked loop and method therefor
US6300808B1 (en) * 1999-06-11 2001-10-09 U.S. Philips Corporation Arrangement for offset current compensation of phase detector

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63267822A (ja) 1987-04-23 1988-11-04 Hitachi Heating Appliance Co Ltd 開放型燃焼器の安全装置
JPH082020B2 (ja) * 1988-09-02 1996-01-10 日本電信電話株式会社 周波数シンセサイザ
JPH04196716A (ja) 1990-11-28 1992-07-16 Hitachi Ltd 位相同期回路
JPH04252621A (ja) * 1991-01-29 1992-09-08 Fujitsu Ltd 電圧制御発振器に加えるオフセット制御電圧の設定方法及び該方法による無線通信装置
JPH07202638A (ja) 1993-12-28 1995-08-04 Matsushita Electric Ind Co Ltd 電圧制御発振器
JP3488180B2 (ja) 2000-05-30 2004-01-19 松下電器産業株式会社 周波数シンセサイザ
US6734749B2 (en) * 2001-05-29 2004-05-11 Telefonaktiebolaget Lm Ericsson (Publ) Direct modulated phase-locked loop
US6680654B2 (en) * 2001-10-24 2004-01-20 Northrop Grumman Corporation Phase locked loop with offset cancellation
JP2004080624A (ja) * 2002-08-21 2004-03-11 Matsushita Electric Ind Co Ltd 周波数シンセサイザ
US7548122B1 (en) * 2005-03-01 2009-06-16 Sequoia Communications PLL with switched parameters

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6157271A (en) * 1998-11-23 2000-12-05 Motorola, Inc. Rapid tuning, low distortion digital direct modulation phase locked loop and method therefor
US6300808B1 (en) * 1999-06-11 2001-10-09 U.S. Philips Corporation Arrangement for offset current compensation of phase detector

Also Published As

Publication number Publication date
US20100026396A1 (en) 2010-02-04
ATE476015T1 (de) 2010-08-15
JP4815572B2 (ja) 2011-11-16
WO2006030335A3 (en) 2006-05-11
US8102215B2 (en) 2012-01-24
EP1792400A2 (en) 2007-06-06
WO2006030335A2 (en) 2006-03-23
EP1792400B1 (en) 2010-07-28
JP2008512920A (ja) 2008-04-24
CN101019324A (zh) 2007-08-15
DE602005022599D1 (de) 2010-09-09

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PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
ASS Succession or assignment of patent right

Owner name: NXP CO., LTD.

Free format text: FORMER OWNER: KONINKLIJKE PHILIPS ELECTRONICS N.V.

Effective date: 20080404

C41 Transfer of patent application or patent right or utility model
TA01 Transfer of patent application right

Effective date of registration: 20080404

Address after: Holland Ian Deho Finn

Applicant after: Koninkl Philips Electronics NV

Address before: Holland Ian Deho Finn

Applicant before: Koninklijke Philips Electronics N.V.

C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20120530

Termination date: 20180830

CF01 Termination of patent right due to non-payment of annual fee