JP4776773B2 - Method for manufacturing semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor film having a crystal structure formed over a substrate having an insulating surface, and a method for manufacturing a semiconductor device using the semiconductor film as an active layer. In particular, the present invention relates to a semiconductor device using a crystalline semiconductor film as an active layer and an electronic device using the semiconductor device as a display portion.
[0002]
[Prior art]
In recent years, the mobility of low-temperature polysilicon has been improved. _off There is a movement to reduce the channel formation region to a single crystal with few defects for reduction. Therefore, an amorphous semiconductor film is formed over a light-transmitting substrate having an insulating surface, and a crystalline semiconductor film crystallized by a laser annealing method or a thermal annealing method is referred to as a thin film transistor (hereinafter referred to as TFT). The technology used for the active layer is being developed.
[0003]
The laser annealing method is known as a crystallization technique that does not raise the temperature of a glass substrate so much and can crystallize only an amorphous semiconductor film by applying high energy. In particular, an excimer laser that oscillates short-wavelength light having a wavelength of 400 nm or less is a typical laser that has been used since the development of this laser annealing method. In recent years, other technologies using a solid-state YAG laser have also been developed. In these laser annealing methods, a laser beam is processed by an optical system so as to be spot-like or linear on the irradiated surface, and the irradiated surface on the substrate is scanned with the processed laser light (laser light irradiation). The irradiation position is moved relative to the irradiated surface). For example, the excimer laser annealing method using linear laser light can also perform laser annealing of the entire irradiated surface by scanning only in the direction perpendicular to the longitudinal direction, and is excellent in productivity. It is becoming mainstream as a display device manufacturing technology. The technology enables a monolithic liquid crystal display device in which a TFT (pixel TFT) for forming a pixel portion on a single glass substrate and a TFT for a driving circuit provided around the pixel portion are formed.
[0004]
However, the crystalline semiconductor film produced by the laser annealing method is a collection of a plurality of crystal grains, and the position and size of the crystal grains are random. A TFT fabricated on a glass substrate is formed by separating a crystalline semiconductor film into island-like patterns for element isolation, and cannot be formed by specifying the position and size of crystal grains. It was. At the crystal grain interface (grain boundary), the current transport characteristics of the carrier deteriorate due to the influence of recombination centers, trap centers, and potential levels at the grain boundaries due to amorphous structures and crystal defects. It is known that there is.
[0005]
The crystallinity of the semiconductor film in the channel formation region has a significant effect on the characteristics of the TFT, but it is almost impossible to form the channel formation region with a single crystal semiconductor film by eliminating the influence of crystal grain boundaries. It was.
[0006]
In order to solve such problems, attempts have been made to grow crystal grains greatly. For example, "" High-Mobility Poly-Si Thin-Film Transistors Fabricated by a Novel Excimer Laser Crystallization Method ", K. Shimizu, O. Sugiura and M. Matumura, IEEE Transactions on Electron Devices vol.40, No.1, pp112 -117,1993 "includes Si / SiO2 on the substrate. ₂ There is a report on a laser annealing method in which a film having a three-layer structure of / Si is formed, and excimer laser light is irradiated from both the film side and the substrate side. According to the method, it is shown that the crystal grains can be enlarged by irradiating laser light with a certain predetermined energy intensity.
[0007]
[Problems to be solved by the invention]
The method of K. Shimizu et al. Is characterized in that the thermal characteristics of the base material of the amorphous silicon film are locally changed to control the flow of heat to the substrate to give a temperature gradient. However, for this purpose, a three-layer structure of a refractory metal layer / silicon oxide layer / semiconductor film is formed on a glass substrate. Although it is structurally possible to form a top gate TFT using this semiconductor film as an active layer, a parasitic capacitance is generated by the silicon oxide film provided between the semiconductor film and the refractory metal layer. As a result, power consumption increases and it is difficult to realize high-speed operation of the TFT.
[0008]
The method of making a phase difference in a laser and the step irradiation method have a problem that the laser apparatus becomes complicated. In addition, when an attempt is made to crystallize the drive element of a liquid crystal panel with a built-in drive circuit, the normal elements are arranged in various ways rather than at regular intervals, so that the entire channel formation region is surely made large in size and single. There was a possibility that it could not be crystallized.
[0009]
Dual beam method (a method of crystallizing an amorphous semiconductor film by irradiating a laser from both sides of the substrate or by irradiating a laser from one side of the substrate and reflecting the laser that has passed through the substrate with a mirror etc. and irradiating the laser from both sides of the substrate) .) And the method of combining the three-layer island structure can be used for crystallization of the driving element of a liquid crystal panel with a built-in driving circuit. This is difficult and is not suitable for a thin film transistor having a large channel width. In addition, parasitic capacitance is generated between the metal and Si, causing a signal delay. Further, depending on the metal material, there is a problem that peeling occurs because the temperature becomes high during irradiation.
[0010]
Furthermore, although the method of using the high thermal conductivity insulating film as a base has the merit that no parasitic capacitance is generated between the metal and Si, it is necessary to develop a stable high thermal conductivity insulating film.
[0011]
The present invention is a technique for solving such problems. A crystalline semiconductor film in which the position and size of crystal grains are controlled is produced, and the crystalline semiconductor film is used as a channel formation region of a TFT. As a result, a TFT capable of high-speed operation is realized. It is another object of the present invention to provide a technique in which such a TFT can be applied to various semiconductor devices such as a transmissive liquid crystal display device and a display device using an electroluminescent material.
[0012]
[Means for Solving the Problems]
Instead of using a metal or high thermal conductivity insulating film on a substrate such as glass, a temperature gradient is created by using only a conventional insulating film to create a temperature gradient, and the amorphous semiconductor layer is formed using this temperature gradient. Laser annealing is used as a method for crystallization. In the laser annealing method of the present invention, a pulse oscillation type or continuous oscillation type excimer laser, YAG laser, or argon laser is used as a light source, and laser light formed in a linear or rectangular shape by an optical system is used as an island-shaped semiconductor layer. On the other hand, from the surface of the substrate on which the island-shaped semiconductor layer is formed (defined as a surface on which the island-shaped semiconductor layer is formed in this specification) or from the front and back surfaces (in this specification, the island-shaped semiconductor is formed) The surface on which the layer is formed and the opposite surface).
[0013]
According to the present invention, a thermal analysis simulation of crystallization performed by patterning the base insulating film into an island shape and using a step due to the island-shaped insulating film to generate a temperature gradient is as shown in FIG. Results were obtained. Note that in this specification, the level difference means a convex portion provided in the base insulating film as shown in FIG. 4 or the highest portion of the unevenness on the surface of the semiconductor film caused by the island-shaped insulating film (FIG. 1C ) Is the difference between the lowest part (the part corresponding to the area B in FIG. 1C).
[0014]
As a reason why such a result is obtained, generation of a temperature gradient can be considered. The area B in FIG. 5A cools faster than other places because (1) the underlying insulating film directly under (1) and the underlying insulating film exist next to each other as a place for heat to escape. On the contrary, the temperature of the C region is difficult to decrease because of the heat escaping from the B region. Therefore, a temperature gradient occurs between the B region and the C region.
[0015]
Next, how the semiconductor film is completely melted and crystallized by laser light irradiation will be described. First, for the reasons described above, solid phase starts from the B region where the temperature first falls, and crystal nuclei are generated. This nucleus becomes the center of crystal growth, and crystal growth proceeds toward the C region or A region in a molten state at a high temperature.
Even when the semiconductor film is not completely melted by laser light irradiation and a solid phase remains, this solid phase (micro solid phase) becomes the center of crystal growth, and crystal growth proceeds from there using a temperature gradient, For this reason, a crystal with a large grain size can be formed by controlling the location.
[0016]
For this reason, a TFT fabricated on a conventional glass substrate can be used without using a base oxide film as a heat storage layer or a heat capacity gradient at a desired position or providing high thermal conductivity on the substrate. By using the semiconductor film / underlying insulating film / substrate used to pattern the underlying insulating film into a desired shape and providing a step, the temperature distribution inside the semiconductor film generated corresponding to this step shape is utilized, The location and direction of lateral growth can be controlled.
[0017]
DETAILED DESCRIPTION OF THE INVENTION
[Embodiment 1]
An embodiment of the present invention will be described with reference to FIGS. In FIG. 1A, an alkali-free glass substrate such as barium borosilicate glass or alumino borosilicate glass is used for the substrate 101. For example, Corning 7059 glass or 1737 glass can be suitably used.
[0018]
An insulating film having a light-transmitting property and an insulating property is formed on the surface of the substrate 101 on which the TFT is formed, and is patterned to obtain the island-shaped insulating film 102. This island-like insulating film may be formed of a material having excellent thermal conductivity. In that case, the thermal conductivity is 10 Wm ^-1 K ^-1 The above is desirable. For example, aluminum oxide (aluminum oxide (Al ₂ O _Three ) Is translucent in visible light and has a thermal conductivity of 20 Wm ^-1 K ^-1 It is suitable. Aluminum oxide is not limited to the stoichiometric ratio, and other elements may be added in order to control characteristics such as thermal conductivity characteristics and internal stress. For example, when aluminum oxide is mixed with nitrogen, aluminum oxynitride (AlN _x O _1-x : 0.02 ≦ x ≦ 0.5) or aluminum nitride (AlN) _x ) Can also be used. Alternatively, a compound containing silicon (Si), oxygen (O), nitrogen (N), and M (M is at least one selected from aluminum (Al) or a rare earth element) can be used. For example, AlSiON or LaSiON can be suitably used. In addition, boron nitride or the like can also be applied.
[0019]
Any of the above oxides, nitrides, and compounds can be formed by sputtering or plasma CVD. In the case of sputtering, a target having a desired composition can be used, and sputtering can be performed using an inert gas such as argon (Ar) or nitrogen. Also, the thermal conductivity is 1000Wm ^-1 K ^-1 A thin diamond layer or a DLC (Diamond Like Carbon) layer may be provided. In any case, by forming the insulating film 102 with a thickness of 50 to 500 nm (preferably 200 nm) using such a material, an increase in temperature due to laser light irradiation can be suppressed. Further, the side wall angle at the end face of the insulating film 102 is tapered so as to be 5 ° or more and less than 50 ° with respect to the main surface of the glass substrate 101, and the step coverage of the film stacked on this is ensured. To do.
[0020]
Over this, a base insulating film 103 is formed using a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or the like. The silicon oxynitride film is made of SiH by plasma CVD. _Four , N ₂ O is produced as a source gas. O in this source gas ₂ May be added. Although the manufacturing conditions are not limited, the silicon oxynitride film as the base insulating film has a film thickness of 50 to 500 nm, an oxygen concentration of 55 to 70 atomic%, and a nitrogen concentration of 1 to 20 atomic%. To be. With such a composition, the internal stress of the silicon oxynitride film is reduced and the fixed charge density is reduced.
[0021]
The island-shaped semiconductor film 104 illustrated in FIG. 1B is formed to a thickness of 25 to 2000 nm (preferably 30 to 100 nm). In this method, a semiconductor film having an amorphous structure is formed by a known method such as a plasma CVD method or a sputtering method, and then unnecessary portions are removed by an etching process. FIG. 1C is a top view thereof. The island-shaped semiconductor film is formed above an island-shaped base insulating film formed in a rectangular or strip-shaped pattern, and intersects the island-shaped base insulating film perpendicularly. The end portions of the island-like semiconductor film and the end portion of the short side of the base insulating film were arranged so as not to overlap. As a semiconductor film having an amorphous structure for forming an island-shaped semiconductor film, there are an amorphous semiconductor film and a microcrystalline semiconductor film, and a compound semiconductor film having an amorphous structure such as an amorphous silicon germanium film. May be applied.
[0022]
In FIG. 2, the crystallization process by the laser annealing method of the present invention will be described. In the crystallization step, it is desirable to first release hydrogen contained in the amorphous semiconductor film, and heat treatment is performed at 400 to 500 ° C. for about 1 hour so that the amount of hydrogen contained is 5 atomic% or less. .
[0023]
When crystallization is performed by laser annealing, a pulse oscillation type or continuous oscillation type excimer laser, YAG laser, or argon laser is used as the light source.
[0024]
FIG. 2A illustrates a state where the laser light 110 is irradiated onto the island-shaped semiconductor film. The island-shaped semiconductor film 104 is formed along the island-shaped insulating film 102, the region A 105 is a step region formed by the island-shaped insulating film 102, and the region 106 is an outer region B. In any case, the island-shaped semiconductor film is heated by laser light irradiation and is once melted. Crystal nuclei are presumed to be generated during the cooling process from the molten state to the solid state, but the nucleation density has a correlation with the temperature of the molten state and the cooling rate. The tendency to increase the nucleation density has been obtained as empirical knowledge.
[0025]
In the structure of FIG. 1A, the region where the island-shaped insulating film 102 is formed has a larger volume and a larger heat capacity, so that a rise in temperature due to laser light irradiation is suppressed. When the dual beam laser annealing method is used, laser light is irradiated from the substrate-side surface of the island-shaped semiconductor film 104 and the opposite surface, and the both surfaces are heated, so the cooling rate is the conventional single-beam laser. Relatively slow compared to the annealing method. As a result, lateral growth due to the temperature gradient inside the step is suppressed, and radial lateral growth is obtained with the crystal nucleus centering on the region of the island-shaped semiconductor film overlapping the island-shaped insulating film 102.
[0026]
As a result, a crystal having a large grain shape grows around the island-shaped insulating film 102, and a large-grained crystal is obtained in the region A formed along the island-shaped insulating film 102 indicated by 105. Then, it becomes a relatively small crystal grain. FIG. 2B is a top view showing the state. When the TFT is manufactured, this step region becomes the width of the channel formation region. Further, such an effect becomes prominent when the number of repeated pulses of the pulse laser beam to be irradiated is increased.
[0027]
Thereafter, the island-like semiconductor film remains by heat treatment at 300 to 450 ° C. in an atmosphere containing 3 to 100% hydrogen, or heat treatment at 200 to 450 ° C. in an atmosphere containing hydrogen generated by plasma. Defects can be neutralized. By producing the TFT active layer using the region A105 of the island-like semiconductor film 104 thus produced as a channel formation region, the characteristics of the TFT can be improved.
[0028]
[Embodiment 2]
The method for producing an island-like semiconductor film having a crystal structure as an active layer of a TFT is not produced only from the laser annealing method, and the laser annealing method and the thermal annealing method according to the present invention may be used in combination. In particular, crystallization by thermal annealing can be realized at a temperature of 600 ° C. or lower when applied to the crystallization method using a catalytic element disclosed in Japanese Patent Application Laid-Open No. 7-130652. When the processed crystalline semiconductor film is processed by the laser annealing method according to the present invention, a high-quality crystalline semiconductor film can be obtained. Such an embodiment will be described with reference to FIG.
[0029]
In FIG. 3A, the glass substrate described in Embodiment 1 can be preferably used as the substrate 150. In addition, the island-shaped insulating film 151, the base insulating film 152, and the amorphous semiconductor film 153 are manufactured in the same manner as in the first embodiment. Then, an aqueous solution containing a catalytic element of 5 to 100 ppm in terms of weight is applied by a spin coating method to form a layer 154 containing the catalytic element. Alternatively, the layer 154 containing a catalytic element may be formed by a sputtering method, a vapor deposition method, or the like. In that case, the thickness of the layer 154 containing the catalytic element is 0.5 to 2 nm. Catalyst elements include nickel (Ni), germanium (Ge), iron (Fe), palladium (Pd), tin (Sn), lead (Pb), cobalt (Co), platinum (Pt), copper (Cu), gold (Au).
[0030]
Thereafter, heat treatment is first performed at 400 to 500 ° C. for about 1 hour, so that the hydrogen content of the amorphous semiconductor film is set to 5 atomic% or less. Then, using a furnace annealing furnace, thermal annealing is performed in a nitrogen atmosphere at 550 to 600 ° C. for 1 to 8 hours, preferably at 550 ° C. for 4 hours. Through the above steps, a crystalline semiconductor film 155 made of a crystalline silicon film can be obtained (FIG. 3B).
[0031]
As shown in FIG. 3C, an island-shaped semiconductor film 160 is formed from the crystalline semiconductor film 155. Single-beam laser annealing is performed on the substrate in this state as shown in FIG. (Dual beam laser annealing may be used. If the dual beam method is used, a light-transmitting substrate may be used.) As a result, the island-shaped semiconductor having a new crystal structure once melted by the laser beam 156 A film 160 is formed. The island-shaped semiconductor film 160 manufactured in this manner can be formed with a crystal grain having a grain size equal to or larger than that of the island-shaped semiconductor film 107 described in FIG. . However, in the island-shaped semiconductor film 560, the catalyst element is 1 × 10 ¹⁷ ~ 1x10 ¹⁹ atoms / cm ^Three Contained at a concentration of about.
[0032]
Therefore, by using the technique described in Japanese Patent Application Laid-Open No. 10-135468 or Japanese Patent Application Laid-Open No. 10-135469, the concentration of the catalyst element in the island-shaped semiconductor film is set to 1 × 10. ¹⁷ atoms / cm ^Three Or less, preferably 1 × 10 ¹⁶ atoms / cm ^Three It can be reduced to the following.
[0033]
An impurity element belonging to Group 15 of the periodic table having gettering action, typically phosphorus, is selectively added to the island-like semiconductor film, and heat treatment is performed in a nitrogen atmosphere at 550 to 800 ° C. for 5 to 24 hours. If it carries out, the catalyst element which remained in the island-like semiconductor film can be moved to the area | region where phosphorus was added. Thereafter, the phosphorus-added region to which the catalytic element has moved is removed by etching, so that the catalytic element concentration becomes 1 × 10 6. ¹⁷ atoms / cm ^Three An island-like semiconductor film reduced to the following can be obtained.
[0034]
[Embodiment 3]
In the same manner as in Embodiment Mode 1, an insulating film is formed on the substrate. Thereafter, the insulating film is patterned to form an island-shaped insulating film. Various shapes can be adopted for the island-shaped insulating film. In this embodiment, an example is shown in FIG. FIG. 6 is a view as seen from above, and the shaded area is a stepped region formed by the base insulating film.
[0035]
In FIG. 6A, the insulating film is patterned to be a rectangle having a width (a portion corresponding to a channel formation region) of 2 to 5 μm for the purpose of lateral growth inside the step region.
In FIG. 6A, in addition to lateral growth in the channel length direction using a temperature gradient generated by an island-shaped insulating film provided so as to intersect the semiconductor film, the semiconductor film is formed in an island shape. And lateral growth in the channel width direction using the temperature gradient generated at the edge. As a result, it was possible to increase the particle size at an arbitrary location.
FIG. 7 shows the result of observing the crystallization state by SEM when the island-like insulating film is formed into a rectangular shape having a width of 5 μm and crystallized. It can be seen that crystal growth proceeds from the edge of the step due to the island-shaped insulating film and the edge of the island-shaped semiconductor film.
[0036]
In addition, when an opening is formed inside the rectangular base insulating film as shown in FIG. 6B, crystal growth from the opening to the outside can also occur, and better crystallization can be achieved. Conceivable.
[0037]
FIG. 6C shows an attempt to obtain radial lateral growth with the step as the center of crystal grain growth, in which the insulating film is patterned into a circle having a diameter of 1.0 to 2.0 μm. When the diameter is about 1 μm, lateral growth due to the temperature gradient inside the step can be suppressed.
FIG. 8 shows the result of observation of a cylindrical step region (diameter design value 2 μm) with an SEM. It can be seen that radial lateral growth was obtained centering on the circular step. In addition, when an insulating film is patterned into a columnar shape and crystallized as shown in FIG. 6C to produce a TFT, a TFT as shown in FIG. 6D is produced.
[0038]
FIG. 6 (E) shows a strip shape in order to avoid a collision during the lateral growth from the inner edge of the step by the pair of island-like insulating films toward the other island-like insulating film. This is an example in which a part of the island-shaped insulating film is provided so as to overlap with the island-shaped semiconductor film.
[0039]
As shown in FIG. 6F, an organic resin having a low thermal conductivity is used as a step material in order to increase the crystal growth by extending the cooling rate without changing the temperature distribution using the step formed by the island-like insulating film. It is also conceivable to use a membrane such as BCB (benzocyclobutene).
[0040]
FIG. 6G illustrates an example in which a step is formed in the vicinity of the edge of the long side of the semiconductor film so as not to protrude from the edge of the semiconductor film or slightly over the semiconductor film. The practitioner may appropriately determine the interval between the pair of island-like insulating films. As a result, the temperature of the edge portion of the semiconductor film is lowered faster than usual, so that the temperature difference from the inside of the semiconductor film becomes steep and lateral growth is promoted.
[0041]
The pattern of the island-like insulating film shown above can be used for either Embodiment 1 or Embodiment 2.
[0042]
[Example 1]
The present invention will be described with reference to FIGS. Here, a method for simultaneously manufacturing an n-channel TFT (hereinafter referred to as a pixel TFT) and a storage capacitor in a pixel portion, and an n-channel TFT and a p-channel TFT in a driver circuit provided in the periphery of the pixel portion, according to steps. explain.
[0043]
In FIG. 9, Corning 1737 glass was used for the substrate 201. A base insulating film is formed on the surface of the substrate 201 on which the TFT is formed. This film is formed of silicon oxide, silicon nitride, silicon oxynitride, or the like.
[0044]
In the case where a silicon oxide film is used, tetraethyl orthosilicate (TEOS) and O2 are formed by plasma CVD. ₂ The reaction pressure is 40 Pa, the substrate temperature is 300 to 400 ° C., and the high frequency (13.56 MHz) power density is 0.5 to 0.8 W / cm. ² And can be formed by discharging. When using a silicon oxynitride film, SiH is formed by plasma CVD. _Four , N ₂ O, NH _Three Silicon oxynitride film manufactured from SiH or SiH _Four , N ₂ A silicon oxynitride film formed from O may be used. The production conditions in this case are a reaction pressure of 20 to 200 Pa, a substrate temperature of 300 to 400 ° C., and a high frequency (60 MHz) power density of 0.1 to 1.0 W / cm. ² Can be formed. SiH _Four , N ₂ O, H ₂ Alternatively, a silicon oxynitride silicon film manufactured from the above may be used. Similarly, the silicon nitride film is made of SiH by plasma CVD. _Four , NH _Three It is possible to make from.
[0045]
A base insulating film typified by the above is formed on the entire surface of the substrate 201 to a thickness of 20 to 200 nm (preferably 30 to 60 nm), and then a resist mask is formed using a photolithography technique to remove unnecessary portions. Is etched and the insulating film is patterned into a rectangular shape to form island-shaped insulating films 202 to 206. For the insulating film, a dry etching method using a fluorine-based gas may be used, or a wet etching method using a fluorine-based aqueous solution may be used. When the latter method is selected, for example, ammonium hydrogen fluoride (NH _Four HF ₂ ) 7.13% and ammonium fluoride (NH _Four F) may be etched with a mixed solution containing 15.4% (product name: LAL500, manufactured by Stella Chemifa).
[0046]
The pattern dimensions of the island-like insulating films 202 to 206 are appropriately determined by the practitioner, but in actuality, the pattern dimensions may be determined in consideration of the size (channel length and channel width) of the TFT to be manufactured. In this example, an island-like insulating film having a width of 5 μm was formed as shown in FIG. 6A in Embodiment 3. However, the island-like insulating film may adopt various shapes as shown in Embodiment 3. Is possible.
[0047]
Next, a base insulating film 207 is formed to cover the island-shaped insulating film. This film is formed with a thickness of 50 to 300 nm (preferably 100 to 200 nm) using a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or the like, like the island-shaped insulating film.
[0048]
Next, a semiconductor film 208 having an amorphous structure with a thickness of 25 to 2000 nm (preferably 30 to 100 nm) is formed by a known method such as a plasma CVD method or a sputtering method. In this embodiment, an amorphous silicon film is formed to a thickness of 55 nm by plasma CVD. As the semiconductor film having an amorphous structure, there are an amorphous semiconductor film and a microcrystalline semiconductor film, and a compound semiconductor film having an amorphous structure such as an amorphous silicon germanium film may be applied. Further, since the base insulating film 207 and the amorphous silicon film 208 can be formed by a plasma CVD method, both may be continuously formed in a reduced-pressure atmosphere. After the base insulating film 207 is formed, exposure to the air atmosphere prevents the surface from being contaminated, and variations in characteristics of TFTs to be manufactured and variations in threshold voltage can be reduced.
[0049]
Then, as shown in FIG. 9B, unnecessary portions of the amorphous semiconductor film 208 are removed by etching to form island-shaped semiconductor films 209 to 212. The practitioner may determine the shape and size of the island-like semiconductor film appropriately.
[0050]
The island-shaped semiconductor films 209 to 212 are crystallized by a single beam laser annealing method. Any of the methods shown in the first and second embodiments may be applied. For example, using a XeCl excimer laser (wavelength 308 nm) as a laser beam generator, a linear beam is formed by an optical system, an oscillation frequency of 5 to 50 Hz, and an energy density of 100 to 500 mJ / cm. ² Irradiation is performed with a linear beam overlap ratio of 80 to 98%. In this way, the island-shaped semiconductor films 209 to 212 could be crystallized.
[0051]
Thereafter, a mask layer 213 made of a silicon oxide film having a thickness of 50 to 100 nm is formed by plasma CVD, low pressure CVD, or sputtering. For example, SiH by the low pressure CVD method _Four And O ₂ A silicon oxide film is formed by heating to 400 ° C. at 266 Pa (FIG. 9C).
[0052]
In the channel doping process, a photoresist mask 215 is provided, and 1 × 10 6 is formed on the entire surface of the island-shaped semiconductor films 209 to 212 for forming the n-channel TFT. ¹⁶ ~ 5x10 ¹⁷ atoms / cm ^Three Boron (B) is added as an impurity element imparting p-type at a moderate concentration. Boron (B) may be added by an ion doping method, or may be added simultaneously with the formation of an amorphous silicon film. Channel doping is performed for the purpose of controlling the threshold voltage and is not an essential process for manufacturing a TFT, but is formed to keep the threshold voltage of an n-channel TFT within a predetermined range. It is preferable to do this (FIG. 9D).
[0053]
Then, an impurity element imparting n-type conductivity is selectively added to the island-shaped semiconductor films 210 and 211 in order to form an LDD region of the n-channel TFT of the driver circuit. Photoresist masks 215 to 218 are formed in advance. In this process, phosphine (PH) is added to add phosphorus (P). _Three The ion doping method using) is applied. Impurity region (n ^- ) The phosphorus (P) concentration of 219, 220, 221 is 5 × 10 ¹⁷ ~ 5x10 ¹⁸ atoms / cm ^Three (FIG. 10A). The impurity region 221 is a semiconductor film for forming a storage capacitor of the pixel portion, and it is preferable that phosphorus (P) is added to this region at the same concentration to improve conductivity.
[0054]
Next, the mask layer 213 is removed with hydrofluoric acid or the like, and a step of activating the impurity element added in FIGS. 9D and 10A is performed. The activation can be performed by a method of thermal annealing or laser annealing at 500 to 600 ° C. for 1 to 4 hours in a nitrogen atmosphere. Moreover, you may carry out using both together. In this embodiment, a laser activation method is used, a KrF excimer laser beam (wavelength 248 nm) is used to form a linear beam, an oscillation frequency of 5 to 50 Hz, and an energy density of 100 to 500 mJ / cm. ² As a result, the entire surface of the substrate on which the island-shaped semiconductor film is formed is processed by scanning the linear beam with an overlap ratio of 80 to 98%. Note that there are no particular limitations on the laser light irradiation conditions, and the practitioner may make a proper decision.
[0055]
Then, the gate insulating film 222 is formed with an insulating film containing silicon with a thickness of 40 to 150 nm by plasma CVD or sputtering. For example, SiH _Four , N ₂ O, O ₂ A silicon oxynitride film formed by a plasma CVD method using as a raw material (FIG. 10B).
[0056]
Next, first conductive layers 223 and 224 for forming a gate electrode and a capacitor wiring are formed. Although this conductive layer may be formed as a single layer, it may have a laminated structure of two layers or three layers as required. In this embodiment, a conductive layer (A) 223 made of a conductive nitride metal film and a conductive layer (B) 224 made of a metal film are stacked. The conductive layer (B) 224 is an element selected from tantalum (Ta), titanium (Ti), molybdenum (Mo), and tungsten (W), an alloy containing the element as a main component, or an alloy film in which the elements are combined. (Typically, the conductive layer (A) 223 may be formed of tantalum nitride (TaN), tungsten nitride (WN), titanium nitride (TiN) film, or nitride). It is made of molybdenum (MoN) or the like. Alternatively, tungsten silicide, titanium silicide, or molybdenum silicide may be used for the conductive layer (A) 223. In order to reduce the resistance of the conductive layer (B) 224, the concentration of impurities contained in the conductive layer (B) 224 is preferably reduced. In particular, the oxygen concentration is preferably 30 ppm or less. For example, tungsten (W) can realize a specific resistance value of 20 μΩcm or less by setting the oxygen concentration to 30 ppm or less.
[0057]
The conductive layer (A) 223 may be 10 to 50 nm (preferably 20 to 30 nm), and the conductive layer (B) 224 may be 200 to 400 nm (preferably 250 to 350 nm). In this embodiment, a 30 nm thick TaN film is used for the conductive layer (A) 223 and a 350 nm Ta film is used for the conductive layer (B) 224, both of which are formed by sputtering. The TaN film is formed by using Ta as a target and using a mixed gas of Ar and nitrogen as a sputtering gas. Ta uses Ar as the sputtering gas. In addition, when an appropriate amount of Xe or Kr is added to these sputtering gases, the internal stress of the film to be formed can be relaxed and the film can be prevented from peeling. The resistivity of the α-phase Ta film is about 20 μΩcm and can be used as a gate electrode, but the resistivity of the β-phase Ta film is about 180 μΩcm and is not suitable for a gate electrode. Since the TaN film has a crystal structure close to an α phase, an α phase Ta film can be easily obtained by forming a Ta film thereon. Although not shown, it is effective to form a silicon film doped with phosphorus (P) with a thickness of about 2 to 20 nm under the conductive layer (A) 223. This improves adhesion and prevents oxidation of the conductive film formed thereon, and at the same time, an alkali metal element contained in a trace amount in the conductive layer (A) 223 or the conductive layer (B) 224 is added to the gate insulating film 222. It can be prevented from spreading. In any case, the conductive layer (B) 224 preferably has a resistivity in the range of 10 to 500 μΩcm (FIG. 10C).
[0058]
Next, photoresist masks 225 to 230 are formed, and the conductive layer (A) 223 and the conductive layer (B) 224 are etched together to form the gate electrodes 231 to 234 and the capacitor wiring 235. For example, CF by dry etching _Four And O ₂ Mixed gas, or Cl ₂ At a reaction pressure of 1 to 20 Pa. The gate electrodes 231 to 234 and the capacitor wiring 235 are integrally formed of 231a to 235a made of the conductive layer (A) 223 and 231b to 235b made of the conductive layer (B) 224. At this time, the gate electrodes 232 and 233 provided in the n-channel TFT are formed so as to overlap with part of the impurity regions 219 and 220 (FIG. 10D). Alternatively, the gate electrode can be formed using only the conductive layer (B) 224.
[0059]
Next, in order to form a source region and a drain region of the p-channel TFT of the driver circuit, a step of adding an impurity element imparting p-type is performed. Here, impurity regions are formed in a self-aligning manner using the gate electrode 231 as a mask. A region where the n-channel TFT is formed is covered with a photoresist mask 236. And diborane (B ₂ H ₆ The impurity region (p ⁺ 237 to 1 × 10 ^{twenty one} atoms / cm ^Three (FIG. 11A).
[0060]
Next, in the n-channel TFT, an impurity region functioning as a source region or a drain region is formed. Resist masks 238 to 241 are formed, and an impurity element imparting n-type conductivity is added to form impurity regions 242-246. This is the phosphine (PH _Three The impurity region (n ⁺ ) (P) concentration of 242-246 is 5 × 10 ²⁰ atoms / cm ^Three (FIG. 11B). The impurity region 242 already contains boron (B) added in the previous step, but phosphorus (P) is only added at a concentration of 1/2 to 1/3 as compared with it. There is no need to consider the effect of phosphorus (P), and it does not affect the TFT characteristics.
[0061]
Then, in order to form an LDD region of the n-channel TFT in the pixel portion, an impurity addition step for imparting n-type is performed. Here, an impurity element imparting n-type is added by ion doping in a self-aligning manner using the gate electrode 234 as a mask. The concentration of phosphorus (P) to be added is 5 × 10 ¹⁶ atoms / cm ^Three 10A, FIG. 11A and FIG. 11B, the impurity region (n ^- Only 247 and 248 are formed (FIG. 11C).
[0062]
Thereafter, a heat treatment process is performed to activate the impurity element imparting n-type or p-type added at each concentration. This step can be performed by laser annealing. Here, the activation process is performed by furnace annealing. The heat treatment is performed at 400 to 700 ° C., typically 500 to 600 ° C. in a nitrogen atmosphere having an oxygen concentration of 1 ppm or less, preferably 0.1 ppm or less. In this embodiment, the heat treatment is performed at 550 ° C. for 4 hours. Do.
[0063]
In this thermal annealing, the Ta films 231b to 235b forming the gate electrodes 231 to 234 and the capacitor wiring 235 are formed with conductive layers (C) 231c to 235c made of TaN with a thickness of 5 to 80 nm from the surface. In addition, tungsten nitride (WN) can be formed when the conductive layers (B) 231b to 235b are tungsten (W), and titanium nitride (TiN) can be formed when the conductive layers (B) 231b to 235b are titanium (Ti). Alternatively, the gate electrodes 231 to 234 can be formed in the same manner by exposing them to a plasma atmosphere containing nitrogen using nitrogen or ammonia. Further, thermal annealing is performed at 300 to 450 ° C. for 1 to 12 hours in an atmosphere containing 3 to 100% hydrogen to perform a step of hydrogenating the island-shaped semiconductor film. This process is performed on the island-like semiconductor film 10 by thermally excited hydrogen. ¹⁶ -10 ¹⁸ /cm ^Three This is a step of terminating the dangling bond. As another means of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) may be performed.
[0064]
When a catalytic element that promotes crystallization of silicon is used in the crystallization process, and then the gettering process described in Embodiment 2 is not performed, a small amount (1 × 10 10) is contained in the island-shaped semiconductor film. ¹⁷ ~ 1x10 ¹⁹ atoms / cm ^Three Degree) catalyst element remains. Of course, it is possible to complete the TFT even in such a state, but it is more preferable to remove at least the remaining catalyst element from the channel formation region. One means for removing this catalytic element is a means that utilizes the gettering action of phosphorus (P). The concentration of phosphorus (P) necessary for gettering depends on the impurity region (n ⁺ The catalyst element can be segregated from the channel formation region of the n-channel TFT and the p-channel TFT to the impurity regions 242 to 246 by thermal annealing in the activation process performed here. . As a result, the impurity regions 242-246 are 1 × 10 ¹⁷ ~ 1x10 ¹⁹ atoms / cm ^Three About a catalytic element segregates (FIG. 11D).
[0065]
When the activation and hydrogenation steps are completed, a second conductive layer for forming a gate wiring is formed. This second conductive layer is formed of a conductive layer (D) whose main component is aluminum (Al) or copper (Cu), which is a low resistance material. In any case, the resistivity of the second conductive layer is about 0.1 to 10 μΩcm. Further, a conductive layer (E) made of titanium (Ti), tantalum (Ta), tungsten (W), or molybdenum (Mo) is preferably stacked. In this example, the conductive layer (D) 249 was formed using an aluminum (Al) film containing 0.1 to 2 wt% of titanium (Ti), and the titanium (Ti) film was formed as the conductive layer (E) 250. The conductive layer (D) 249 may be 200 to 400 nm (preferably 250 to 350 nm), and the conductive layer (E) 250 may be formed to 50 to 200 nm (preferably 100 to 150 nm) (FIG. 12A). ).
[0066]
Then, in order to form a gate wiring connected to the gate electrode, the conductive layer (E) 250 and the conductive layer (D) 249 are etched to form gate wirings 251 and 252 and a capacitor wiring 253. The etching process starts with SiCl _Four And BCl _Three By removing the conductive layer (D) from the surface of the conductive layer (E) by a dry etching method using a mixed gas, a gate wiring can be formed while maintaining selective processability with the base (FIG. 12 ( B)).
[0067]
The first interlayer insulating film 254 is formed of a silicon oxide film or a silicon oxynitride film with a thickness of 500 to 1500 nm. In this example, SiH _Four 27SCCM, N ₂ O is 900 SCCM, reaction pressure is 160 Pa, substrate temperature is 325 ° C., discharge power density is 0.15 W / cm ² Formed with. Thereafter, contact holes reaching the source region or the drain region formed in each island-shaped semiconductor film are formed, and source wirings 255 to 258 and drain wirings 259 to 262 are formed. Although not shown, in this embodiment, this electrode is a laminated film having a three-layer structure in which a Ti film is formed to 100 nm, an aluminum film containing Ti is formed to 300 nm, and a Ti film is formed to 150 nm by sputtering.
[0068]
Next, a silicon nitride film, a silicon oxide film, or a silicon oxynitride film is formed as the passivation film 263 with a thickness of 50 to 500 nm (typically 100 to 300 nm). When the hydrogenation treatment is performed in this state, a favorable result can be obtained for improving the characteristics of the TFT. For example, heat treatment may be performed at 300 to 450 ° C. for 1 to 12 hours in an atmosphere containing 3 to 100% hydrogen, or the same effect can be obtained by using a plasma hydrogenation method. Further, by such heat treatment, hydrogen existing in the first interlayer insulating film 254 can be diffused into the island-shaped semiconductor films 209 to 212 to be hydrogenated. In any case, the defect density of the island-shaped semiconductor films 209 to 212 is 10 ¹⁶ /cm ^Three It is desirable that the hydrogen content be as follows, and hydrogen may be added in an amount of about 0.01 to 0.1 atomic% (FIG. 12C). Note that an opening may be formed in the passivation film 263 at a position where a contact hole for connecting the pixel electrode and the drain wiring is formed later.
[0069]
Thereafter, as shown in FIG. 13, a second interlayer insulating film 264 made of an organic resin is formed to a thickness of 1.0 to 1.5 μm. As the organic resin, polyimide, acrylic, polyamide, polyimide amide, BCB (benzocyclobutene), or the like can be used. Here, after applying to the substrate, a thermal polymerization type polyimide is used and baked at 300 ° C. Then, a contact hole reaching the drain wiring 262 is formed in the second interlayer insulating film 264, and pixel electrodes 265 and 266 are formed. The pixel electrode may be a transparent conductive film in the case of a transmissive liquid crystal display device, and may be a metal film in the case of a reflective liquid crystal display device. In this embodiment, a transparent conductive film selected from an indium oxide / tin (ITO) film, a zinc oxide (ZnO) film, an indium oxide / tin / zinc oxide film, etc. The thickness is formed by sputtering.
[0070]
In this way, a substrate having the TFT of the driving circuit and the pixel TFT of the pixel portion on the same substrate was completed. A p-channel TFT 301, a first n-channel TFT 302, and a second n-channel TFT 303 are formed in the driver circuit, and a pixel TFT 304 and a storage capacitor 305 are formed in the pixel portion. In this specification, such a substrate is referred to as an active matrix substrate for convenience.
[0071]
The p-channel TFT 301 of the driver circuit includes a channel formation region 306, source regions 307a and 307b, and drain regions 308a and 308b in an island-shaped semiconductor film 209. The first n-channel TFT 302 includes a channel formation region 309, an LDD region (Lov) 310 that overlaps with the gate electrode 233, a source region 311, and a drain region 312 on the island-shaped semiconductor film 210. The length of the Lov region in the channel length direction is 0.5 to 3.0 μm, preferably 1.0 to 1.5 μm. In the second n-channel TFT 303, a channel formation region 313, a Lov region and an Loff region (an LDD region that does not overlap with the gate electrode, hereinafter referred to as an Loff region) are formed in the island-shaped semiconductor film 211. The length of the region in the channel length direction is 0.3 to 2.0 μm, preferably 0.5 to 1.5 μm. The pixel TFT 304 has channel formation regions 318 and 319, Loff regions 320 to 323, and source or drain regions 324 to 326 in the island-shaped semiconductor film 212. The length of the Loff region in the channel length direction is 0.5 to 3.0 μm, preferably 1.5 to 2.5 μm. Further, a storage capacitor 305 is formed from the capacitor wiring 253, an insulating film made of the same material as the gate insulating film, and a semiconductor film 327 connected to the drain region 326 of the pixel TFT 304 and doped with an impurity element imparting n-type conductivity. Has been. Although the pixel TFT 304 has a double gate structure in FIG. 13, it may have a single gate structure or a multi-gate structure provided with a plurality of gate electrodes.
[0072]
The configuration as described above makes it possible to optimize the structure of the TFT constituting each circuit according to the specifications required by the pixel TFT and the drive circuit, and to improve the operation performance and reliability of the semiconductor device. Furthermore, the LDD region, the source region, and the drain region can be easily activated by forming the gate electrode from a heat-resistant conductive material, and the wiring resistance can be sufficiently reduced by forming the gate electrode from a low-resistance material. Therefore, the present invention can be applied to a display device having a display area (screen size) of 4 inches class or more. A favorable TFT can be manufactured by using a crystalline silicon film having a single crystal structure that is selectively formed over the island-shaped insulating films 202 to 206 forming the base film.
[0073]
[Example 2]
In this embodiment, a process of manufacturing an active matrix liquid crystal display device from the active matrix substrate manufactured in Embodiment 1 will be described. An alignment film is formed on the active matrix substrate in the state of FIG. Usually, a polyimide resin is often used for the alignment film of the liquid crystal display element. A light shielding film 603, a transparent conductive film 604, and an alignment film 605 are formed on the counter substrate 602 on the counter side. After the alignment film was formed, rubbing treatment was performed so that the liquid crystal molecules were aligned with a certain pretilt angle. Then, the active matrix substrate on which the pixel portion and the CMOS circuit are formed and the counter substrate are bonded to each other through a sealing material, a spacer (both not shown) and the like by a known cell assembling process. Thereafter, a liquid crystal material 606 is injected between both substrates and completely sealed with a sealant (not shown). A known liquid crystal material may be used as the liquid crystal material. In this way, the active matrix liquid crystal display device shown in FIG. 14 is completed.
[0074]
Note that the active matrix liquid crystal display device of this example has been described with reference to the structure described in Example 1, but is not limited to the configuration of Example 1, and is described in Embodiments 1 to 3. An active matrix substrate completed by applying the configuration to the first embodiment may be used.
[0075]
[Example 3]
In this embodiment, drain current (ID) and gate voltage (n) of an n-channel TFT manufactured using a semiconductor film crystallized by laser annealing using an island-shaped insulating film as observed in FIG. VG) (hereinafter referred to as an ID-VG curve) and field effect mobility (μ _FE ) Is shown in FIG. At this time, the source voltage (VS) was 0V, and the drain voltage (VD) was 1V or 5V. The measured values were a channel length (L) of 2 μm and a channel width (W) of 4 μm. In FIG. 25A, the thickness of the semiconductor film is 55 nm and the base step is 50 nm. FIG. 25B is a graph showing the result of the same measurement performed on an n-channel TFT manufactured using a semiconductor film that was laser-crystallized without a step without using the present invention for comparison. It is.
[0076]
The S value (value indicating the reciprocal of the maximum slope at the rising portion of the ID-VG curve) of the n-channel TFT manufactured using the present invention is 0.2 to 0.4 (V / V) when VG = 5V. decade), field effect mobility (μ _FE ) Is 120 to 140 (cm when VG = 1V ² (/ V · sec).
[0077]
From the above, it has been found that by using the technique of the present invention, a crystalline semiconductor film in which the position and size of crystal grains are controlled can be produced.
[0078]
Example 4
In addition to the nematic liquid crystal, various liquid crystals can be used for the above-described liquid crystal display device of the present invention. For example, 1998, SID, "Characteristics and Driving Scheme of Polymer-Stabilized Monostable FLCD Exhibiting Fast Response Time and High Contrast Ratio with Gray-Scale Capability" by H. Furue et al., 1997, SID DIGEST, 841, "A Full -Color Thresholdless Antiferroelectric LCD Exhibiting Wide Viewing Angle with Fast Response Time "by T. Yoshida et al., 1996, J. Mater. Chem. 6 (4), 671-673," Thresholdless antiferroelectricity in liquid crystals and its application to The liquid crystal disclosed in "displays" by S. Inui et al. or US Pat. No. 5,945,569 can be used.
[0079]
Using a ferroelectric liquid crystal (FLC) exhibiting an isotropic phase-cholesteric phase-chiral smectic C phase transition series, a cholesteric phase-chiral smectic C phase transition is applied while applying a DC voltage, and the cone edge is substantially in the rubbing direction. FIG. 15 shows the electro-optical characteristics of the matched monostable FLC. The display mode using the ferroelectric liquid crystal as shown in FIG. 15 is called “Half-V-shaped switching mode”. The vertical axis of the graph shown in FIG. 15 is the transmittance (arbitrary unit), and the horizontal axis is the applied voltage. Regarding “Half-V-shaped switching mode”, Terada et al., “Half-V-shaped switching mode FLCD”, Proceedings of the 46th Joint Physics Related Conference, March 1999, p. 1316, and Yoshihara et al. "Time-division full-color LCD using ferroelectric liquid crystal", Liquid Crystal, Vol. 3, No. 3, page 190.
[0080]
As shown in FIG. 15, it can be seen that when such a ferroelectric mixed liquid crystal is used, low voltage driving and gradation display are possible. In the liquid crystal display device of the present invention, a ferroelectric liquid crystal exhibiting such electro-optical characteristics can also be used.
[0081]
A liquid crystal exhibiting an antiferroelectric phase in a certain temperature range is called an antiferroelectric liquid crystal (AFLC). Among mixed liquid crystals having antiferroelectric liquid crystals, there is a so-called thresholdless antiferroelectric mixed liquid crystal that exhibits electro-optic response characteristics in which transmittance continuously changes with respect to an electric field. This thresholdless antiferroelectric mixed liquid crystal has a so-called V-shaped electro-optic response characteristic, and a drive voltage of about ± 2.5 V (cell thickness of about 1 μm to 2 μm) is also found. Has been.
[0082]
In general, the thresholdless antiferroelectric mixed liquid crystal has a large spontaneous polarization, and the dielectric constant of the liquid crystal itself is high. For this reason, when a thresholdless antiferroelectric mixed liquid crystal is used in a liquid crystal display device, a relatively large storage capacitor is required for the pixel. Therefore, it is preferable to use a thresholdless antiferroelectric mixed liquid crystal having a small spontaneous polarization.
[0083]
In addition, since such a thresholdless antiferroelectric mixed liquid crystal is used for the liquid crystal display device of the present invention, low voltage driving is realized, so that low power consumption is realized.
[0084]
Example 5
The CMOS circuit and the pixel portion formed by implementing the present invention can be used for various electro-optical devices (active matrix liquid crystal display, active matrix EL display, active matrix EC display). That is, the present invention can be implemented in all electronic devices in which these electro-optical devices are incorporated in a display unit.
[0085]
Such electronic devices include video cameras, digital cameras, projectors (rear or front type), head mounted displays (goggles type displays), personal computers, personal digital assistants (mobile computers, mobile phones, electronic books, etc.), etc. Is mentioned. Examples of these are shown in FIGS. 16, 17 and 18.
[0086]
FIG. 16A illustrates a personal computer, which includes a main body 2001, an image input portion 2002, a display portion 2003, a keyboard 2004, and the like. The present invention can be applied to the image input unit 2002, the display unit 2003, and other signal control circuits.
[0087]
FIG. 16B illustrates a video camera, which includes a main body 2101, a display portion 2102, an audio input portion 2103, operation switches 2104, a battery 2105, an image receiving portion 2106, and the like. The present invention can be applied to the display portion 2102 and other signal control circuits.
[0088]
FIG. 16C illustrates a mobile computer, which includes a main body 2201, a camera unit 2202, an image receiving unit 2203, operation switches 2204, a display unit 2205, and the like. The present invention can be applied to the display portion 2205 and other signal control circuits.
[0089]
FIG. 16D illustrates a goggle type display including a main body 2301, a display portion 2302, an arm portion 2303, and the like. The present invention can be applied to the display portion 2302 and other signal control circuits.
[0090]
FIG. 16E shows a player using a recording medium (hereinafter referred to as a recording medium) on which a program is recorded, and includes a main body 2401, a display portion 2402, a speaker portion 2403, a recording medium 2404, an operation switch 2405, and the like. This player uses a DVD (Digital Versatile Disc), CD, or the like as a recording medium, and can perform music appreciation, movie appreciation, games, and the Internet. The present invention can be applied to the display portion 2402 and other signal control circuits.
[0091]
FIG. 16F illustrates a digital camera, which includes a main body 2501, a display portion 2502, an eyepiece portion 2503, operation switches 2504, an image receiving portion (not shown), and the like. The present invention can be applied to the display portion 2502 and other signal control circuits.
[0092]
FIG. 17A illustrates a front projector, which includes a projection device 2601, a screen 2602, and the like. The present invention can be applied to the liquid crystal display device 2808 constituting a part of the projection device 2601 and other signal control circuits.
[0093]
FIG. 17B shows a rear projector, which includes a main body 2701, a projection device 2702, a mirror 2703, a screen 2704, and the like. The present invention can be applied to the liquid crystal display device 2808 constituting a part of the projection device 2702 and other signal control circuits.
[0094]
Note that FIG. 17C is a diagram illustrating an example of the structure of the projection devices 2601 and 2702 in FIGS. 17A and 17B. The projection devices 2601 and 2702 include a light source optical system 2801, mirrors 2802 and 2804 to 2806, a dichroic mirror 2803, a prism 2807, a liquid crystal display device 2808, a phase difference plate 2809, and a projection optical system 2810. Projection optical system 2810 includes an optical system including a projection lens. Although the present embodiment shows a three-plate type example, it is not particularly limited, and for example, a single-plate type may be used. In addition, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarizing function, a film for adjusting a phase difference, or an IR film in the optical path indicated by an arrow in FIG. Good.
[0095]
FIG. 17D illustrates an example of the structure of the light source optical system 2801 in FIG. In this embodiment, the light source optical system 2801 includes a reflector 2811, a light source 2812, lens arrays 2813 and 2814, a polarization conversion element 2815, and a condenser lens 2816. Note that the light source optical system illustrated in FIG. 17D is an example and is not particularly limited. For example, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarization function, a film for adjusting a phase difference, or an IR film in the light source optical system.
[0096]
However, the projector shown in FIG. 17 shows a case where a transmissive electro-optical device is used, and an application example in a reflective electro-optical device and an EL display device is not shown.
[0097]
FIG. 18A shows a cellular phone, which includes a main body 2901, an audio output portion 2902, an audio input portion 2903, a display portion 2904, operation switches 2905, an antenna 2906, and the like. The present invention can be applied to the audio output unit 2902, the audio input unit 2903, the display unit 2904, and other signal control circuits.
[0098]
FIG. 18B illustrates a portable book (electronic book) which includes a main body 3001, display portions 3002 and 3003, a storage medium 3004, operation switches 3005, an antenna 3006, and the like. The present invention can be applied to the display portions 3002 and 3003 and other signal circuits.
[0099]
FIG. 18C illustrates a display, which includes a main body 3101, a support base 3102, a display portion 3103, and the like. The present invention can be applied to the display portion 3103. The display of the present invention is particularly advantageous when the screen is enlarged, and is advantageous for displays having a diagonal of 10 inches or more (particularly 30 inches or more).
[0100]
As described above, the applicable range of the present invention is extremely wide and can be applied to electronic devices in various fields. Further, the electronic apparatus of the present example can be realized by using any combination of Embodiments 1 to 4 and Examples 1 to 3.
[0101]
Example 6
In this example, an example in which an EL (electroluminescence) display device is manufactured using the present invention will be described.
[0102]
FIG. 19A is a top view of an EL display device using the present invention. In FIG. 19A, reference numeral 4010 denotes a substrate, 4011 denotes a pixel portion, 4012 denotes a source side driver circuit, 4013 denotes a gate side driver circuit, and each driver circuit reaches an FPC 4017 through wirings 4014 to 4016 to an external device. Connected.
[0103]
At this time, a cover material 6000, a sealing material (also referred to as a housing material) 7000, and a sealing material (second sealing material) 7001 are provided so as to surround at least the pixel portion, preferably the drive circuit and the pixel portion.
[0104]
FIG. 19B shows a cross-sectional structure of the EL display device of this embodiment. A driver circuit TFT (here, an n-channel TFT and a p-channel TFT are combined on a substrate 4010 and a base film 4021). And the pixel portion TFT 4023 (however, only the TFT for controlling the current to the EL element is shown here).
[0105]
The present invention can be used for the driver circuit TFT 4022 and the pixel portion TFT 4023.
[0106]
When the driving circuit TFT 4022 and the pixel portion TFT 4023 are completed using the present invention, a transparent conductive film electrically connected to the drain of the pixel portion TFT 4023 is formed on the interlayer insulating film (planarization film) 4026 made of a resin material. A pixel electrode 4027 is formed. As the transparent conductive film, a compound of indium oxide and tin oxide (referred to as ITO) or a compound of indium oxide and zinc oxide can be used. Then, after the pixel electrode 4027 is formed, an insulating film 4028 is formed, and an opening is formed over the pixel electrode 4027.
[0107]
Next, an EL layer 4029 is formed. The EL layer 4029 may have a stacked structure or a single-layer structure by freely combining known EL materials (a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, or an electron injection layer). A known technique may be used to determine the structure. EL materials include low-molecular materials and high-molecular (polymer) materials. When a low molecular material is used, a vapor deposition method is used. When a high molecular material is used, a simple method such as a spin coating method, a printing method, or an ink jet method can be used.
[0108]
In this embodiment, the EL layer is formed by vapor deposition using a shadow mask. Color display is possible by forming a light emitting layer (a red light emitting layer, a green light emitting layer, and a blue light emitting layer) capable of emitting light having different wavelengths for each pixel using a shadow mask. In addition, there are a method in which a color conversion layer (CCM) and a color filter are combined, and a method in which a white light emitting layer and a color filter are combined, but either method may be used. Needless to say, an EL display device emitting monochromatic light can also be used.
[0109]
After the EL layer 4029 is formed, a cathode 4030 is formed thereon. It is desirable to remove moisture and oxygen present at the interface between the cathode 4030 and the EL layer 4029 as much as possible. Therefore, it is necessary to devise such that the EL layer 4029 and the cathode 4030 are continuously formed in a vacuum, or the EL layer 4029 is formed in an inert atmosphere and the cathode 4030 is formed without being released to the atmosphere. In this embodiment, the above-described film formation is possible by using a multi-chamber type (cluster tool type) film formation apparatus.
[0110]
In this embodiment, a stacked structure of a LiF (lithium fluoride) film and an Al (aluminum) film is used as the cathode 4030. Specifically, a 1 nm-thick LiF (lithium fluoride) film is formed on the EL layer 4029 by evaporation, and a 300 nm-thick aluminum film is formed thereon. Of course, you may use the MgAg electrode which is a well-known cathode material. The cathode 4030 is connected to the wiring 4016 in the region indicated by 4031. A wiring 4016 is a power supply line for applying a predetermined voltage to the cathode 4030, and is connected to the FPC 4017 through a conductive paste material 4032.
[0111]
In order to electrically connect the cathode 4030 and the wiring 4016 in the region indicated by 4031, it is necessary to form contact holes in the interlayer insulating film 4026 and the insulating film 4028. These may be formed when the interlayer insulating film 4026 is etched (when the pixel electrode contact hole is formed) or when the insulating film 4028 is etched (when the opening before the EL layer is formed). In addition, when the insulating film 4028 is etched, the interlayer insulating film 4026 may be etched all at once. In this case, if the interlayer insulating film 4026 and the insulating film 4028 are the same resin material, the shape of the contact hole can be improved.
[0112]
A passivation film 6003, a filler 6004, and a cover material 6000 are formed so as to cover the surface of the EL element thus formed.
[0113]
Further, a sealing material is provided inside the cover material 6000 and the substrate 4010 so as to surround the EL element portion, and a sealing material (second sealing material) 7001 is formed outside the sealing material 7000.
[0114]
At this time, the filler 6004 also functions as an adhesive for bonding the cover material 6000. As the filler 6004, PVC (polyvinyl chloride), epoxy resin, silicon resin, PVB (polyvinyl butyral), or EVA (ethylene vinyl acetate) can be used. It is preferable to provide a desiccant inside the filler 6004 because the moisture absorption effect can be maintained.
[0115]
In addition, a spacer may be included in the filler 6004. At this time, the spacer may be a granular material made of BaO or the like, and the spacer itself may be hygroscopic.
[0116]
In the case where a spacer is provided, the passivation film 6003 can relieve the spacer pressure. In addition to the passivation film, a resin film for relaxing the spacer pressure may be provided.
[0117]
As the cover material 6000, a glass plate, an aluminum plate, a stainless steel plate, an FRP (Fiberglass-Reinforced Plastics) plate, a PVF (polyvinyl fluoride) film, a mylar film, a polyester film, or an acrylic film can be used. Note that when PVB or EVA is used as the filler 6004, it is preferable to use a sheet having a structure in which an aluminum foil of several tens of μm is sandwiched between PVF films or Mylar films.
[0118]
However, the cover material 6000 needs to have translucency depending on the light emission direction (light emission direction) from the EL element.
[0119]
The wiring 4016 is electrically connected to the FPC 4017 through a gap between the sealing material 7000 and the sealing material 7001 and the substrate 4010. Note that although the wiring 4016 has been described here, the other wirings 4014 and 4015 are electrically connected to the FPC 4017 through the sealing material 7000 and the sealing material 7001 in the same manner.
[0120]
[Example 7]
In this embodiment, an example of manufacturing an EL display device having a different form from that of Embodiment 6 using the present invention will be described with reference to FIGS. 20A and 20B. The same numbers as those in FIGS. 19A and 19B indicate the same parts, and the description thereof is omitted.
[0121]
FIG. 20A is a top view of the EL display device of this embodiment, and FIG. 20B is a cross-sectional view taken along line AA ′ of FIG.
[0122]
According to the sixth embodiment, a passivation film 6003 is formed so as to cover the surface of the EL element.
[0123]
Further, a filler 6004 is provided so as to cover the EL element. The filler 6004 also functions as an adhesive for bonding the cover material 6000. As the filler 6004, PVC (polyvinyl chloride), epoxy resin, silicone resin, PVB (polyvinyl butyral) or EVA (ethylene vinyl acetate) can be used. It is preferable to provide a desiccant inside the filler 6004 because the moisture absorption effect can be maintained.
[0124]
In addition, a spacer may be included in the filler 6004. At this time, the spacer may be a granular material made of BaO or the like, and the spacer itself may be hygroscopic.
[0125]
In the case where a spacer is provided, the passivation film 6003 can relieve the spacer pressure. In addition to the passivation film, a resin film for relaxing the spacer pressure may be provided.
[0126]
As the cover material 6000, a glass plate, an aluminum plate, a stainless steel plate, an FRP (Fiberglass-Reinforced Plastics) plate, a PVF (polyvinyl fluoride) film, a mylar film, a polyester film, or an acrylic film can be used. Note that when PVB or EVA is used as the filler 6004, it is preferable to use a sheet having a structure in which an aluminum foil of several tens of μm is sandwiched between PVF films or Mylar films.
[0127]
However, the cover material 6000 needs to have translucency depending on the light emission direction (light emission direction) from the EL element.
[0128]
Next, after the cover material 6000 is bonded using the filler 6004, the frame material 6001 is attached so as to cover the side surface (exposed surface) of the filler 6004. The frame material 6001 is bonded by a sealing material (functioning as an adhesive) 6002. At this time, a photocurable resin is preferably used as the sealing material 6002, but a thermosetting resin may be used if the heat resistance of the EL layer permits. Note that the sealing material 6002 is desirably a material that does not transmit moisture and oxygen as much as possible. Further, a desiccant may be added inside the sealing material 6002.
[0129]
The wiring 4016 is electrically connected to the FPC 4017 through a gap between the sealing material 6002 and the substrate 4010. Note that although the wiring 4016 has been described here, the other wirings 4014 and 4015 are also electrically connected to the FPC 4017 under the sealing material 6002 in the same manner.
[0130]
[Example 8]
Here, FIG. 21 shows a more detailed cross-sectional structure of the pixel portion in the EL display panel, FIG. 22A shows a top structure, and FIG. 22B shows a circuit diagram. In FIG. 21, FIG. 22 (A), (B), since a common code | symbol is used, it should just mutually refer.
[0131]
In FIG. 21, a switching TFT 3502 provided over a substrate 3501 is formed using the NTFT of the present invention (see Embodiments 1 to 3 and Examples 1 and 2). However, the double gate structure substantially has a structure in which two TFTs are connected in series, and there is an advantage that the off-current value can be reduced. A double gate structure, a single gate structure, a triple gate structure, or a multi-gate structure having more gates may be adopted.
[0132]
The current control TFT 3503 is formed using the NTFT of the present invention. At this time, the drain wiring 35 of the switching TFT 3502 is electrically connected to the gate electrode 37 of the current control TFT by the wiring 36. A wiring indicated by 38 is a gate wiring for electrically connecting the gate electrodes 39a and 39b of the switching TFT 3502.
[0133]
At this time, it is very important that the current control TFT 3503 has the structure of the present invention. Since the current control TFT is an element for controlling the amount of current flowing through the EL element, a large amount of current flows, and it is also an element with a high risk of deterioration due to heat or hot carriers. Therefore, the structure of the present invention in which the LDD region is provided on the drain side of the current control TFT so as to overlap the gate electrode through the gate insulating film is extremely effective.
[0134]
In this embodiment, the current control TFT 3503 is illustrated as a single gate structure, but a multi-gate structure in which a plurality of TFTs are connected in series may be used. Further, a structure may be employed in which a plurality of TFTs are connected in parallel to substantially divide the channel formation region into a plurality of portions so that heat can be emitted with high efficiency. Such a structure is effective as a countermeasure against deterioration due to heat.
[0135]
As shown in FIG. 22A, the wiring that becomes the gate electrode 37 of the current control TFT 3503 overlaps the drain wiring 40 of the current control TFT 3503 with an insulating film in the region indicated by 3504. At this time, a capacitor is formed in a region indicated by 3504. This capacitor 3504 functions as a capacitor for holding the voltage applied to the gate of the current control TFT 3503. The drain wiring 40 is connected to a current supply line (power supply line) 3506, and a constant voltage is always applied.
[0136]
A first passivation film 41 is provided on the switching TFT 3502 and the current control TFT 3503, and a planarizing film 42 made of a resin insulating film is formed thereon. It is very important to flatten the step due to the TFT using the flattening film 42. Since an EL layer to be formed later is very thin, a light emission defect may occur due to the presence of a step. Therefore, it is desirable to planarize the pixel electrode before forming the pixel electrode so that the EL layer can be formed as flat as possible.
[0137]
Reference numeral 43 denotes a pixel electrode (EL element cathode) made of a highly reflective conductive film, which is electrically connected to the drain of the current control TFT 3503. As the pixel electrode 43, it is preferable to use a low-resistance conductive film such as an aluminum alloy film, a copper alloy film, or a silver alloy film, or a laminated film thereof. Of course, a laminated structure with another conductive film may be used.
[0138]
A light emitting layer 45 is formed in a groove (corresponding to a pixel) formed by banks 44a and 44b formed of an insulating film (preferably resin). Although only one pixel is shown here, a light emitting layer corresponding to each color of R (red), G (green), and B (blue) may be formed separately. A π-conjugated polymer material is used as the organic EL material for the light emitting layer. Typical polymer materials include polyparaphenylene vinylene (PPV), polyvinyl carbazole (PVK), and polyfluorene.
[0139]
There are various types of PPV organic EL materials such as “H. Shenk, H. Becker, O. Gelsen, E. Kluge, W. Kreuder, and H. Spreitzer,“ Polymers for Light Emitting ”. Materials such as those described in “Diodes”, Euro Display, Proceedings, 1999, p. 33-37 ”and Japanese Patent Laid-Open No. 10-92576 may be used.
[0140]
As a specific light emitting layer, cyanopolyphenylene vinylene may be used for a light emitting layer that emits red light, polyphenylene vinylene may be used for a light emitting layer that emits green light, and polyphenylene vinylene or polyalkylphenylene may be used for a light emitting layer that emits blue light. The film thickness may be 30 to 150 nm (preferably 40 to 100 nm).
[0141]
However, the above example is an example of an organic EL material that can be used as a light emitting layer, and is not necessarily limited to this. An EL layer (a layer for emitting light and moving carriers therefor) may be formed by freely combining a light-emitting layer, a charge transport layer, or a charge injection layer.
[0142]
For example, in this embodiment, an example in which a polymer material is used as the light emitting layer is shown, but a low molecular weight organic EL material may be used. It is also possible to use an inorganic material such as silicon carbide for the charge transport layer or the charge injection layer. As these organic EL materials and inorganic materials, known materials can be used.
[0143]
In this embodiment, the EL layer has a laminated structure in which a hole injection layer 46 made of PEDOT (polythiophene) or PAni (polyaniline) is provided on the light emitting layer 45. An anode 47 made of a transparent conductive film is provided on the hole injection layer 46. In the case of the present embodiment, since the light generated in the light emitting layer 45 is emitted toward the upper surface side (upward of the TFT), the anode must be translucent. As the transparent conductive film, a compound of indium oxide and tin oxide or a compound of indium oxide and zinc oxide can be used, but it is possible to form after forming a light-emitting layer or hole injection layer with low heat resistance. What can form into a film at low temperature as much as possible is preferable.
[0144]
When the anode 47 is formed, the EL element 3505 is completed. Note that the EL element 3505 here refers to a capacitor formed by the pixel electrode (cathode) 43, the light emitting layer 45, the hole injection layer 46, and the anode 47. As shown in FIG. 22A, since the pixel electrode 43 substantially matches the area of the pixel, the entire pixel functions as an EL element. Therefore, the use efficiency of light emission is very high, and a bright image display is possible.
[0145]
By the way, in the present embodiment, a second passivation film 48 is further provided on the anode 47. The second passivation film 48 is preferably a silicon nitride film or a silicon nitride oxide film. This purpose is to cut off the EL element from the outside, and has both the meaning of preventing deterioration due to oxidation of the organic EL material and the meaning of suppressing degassing from the organic EL material. This increases the reliability of the EL display device.
[0146]
As described above, the EL display panel of the present invention has a pixel portion composed of pixels having a structure as shown in FIG. 21, and includes a switching TFT having a sufficiently low off-current value and a current control TFT resistant to hot carrier injection. Have. Therefore, an EL display panel having high reliability and capable of displaying a good image can be obtained.
[0147]
In addition, the structure of a present Example can be implemented combining freely the structure of Embodiment 1-3, and Examples 1-4. Further, it is effective to use the EL display panel of this embodiment as the display unit of the electronic device of Embodiment 4.
[0148]
Example 9
In this embodiment, a structure in which the structure of the EL element 3505 is inverted in the pixel portion described in Embodiment 8 will be described. FIG. 23 is used for the description. Note that the only difference from the structure of FIG. 21 is the EL element portion and the current control TFT, and other descriptions are omitted.
[0149]
In FIG. 23, a current control TFT 3503 is formed using the PTFT of the present invention. For the manufacturing process, Embodiments 1 to 3 and Examples 1 to 4 may be referred to.
[0150]
In this embodiment, a transparent conductive film is used as the pixel electrode (anode) 50. Specifically, a conductive film made of a compound of indium oxide and zinc oxide is used. Of course, a conductive film made of a compound of indium oxide and tin oxide may be used.
[0151]
Then, after banks 51a and 51b made of insulating films are formed, a light emitting layer 52 made of polyvinylcarbazole is formed by solution coating. An electron injection layer 53 made of potassium acetylacetonate (denoted as acacK) and a cathode 54 made of an aluminum alloy are formed thereon. In this case, the cathode 54 also functions as a passivation film. Thus, an EL element 3701 is formed.
[0152]
In the case of the present embodiment, the light generated in the light emitting layer 52 is emitted toward the substrate on which the TFT is formed, as indicated by the arrows.
[0153]
In addition, the structure of a present Example can be implemented combining freely with the structure of Embodiment 1-3, and Examples 1-4. In addition, it is effective to use the EL display panel of this embodiment as the display unit of the electronic device of Embodiment 5.
[0154]
Example 10
In this embodiment, FIGS. 24A to 24C show an example of a pixel having a structure different from the circuit diagram shown in FIG. In this embodiment, 3801 is a source wiring of the switching TFT 3802, 3803 is a gate wiring of the switching TFT 3802, 3804 is a current control TFT, 3805 is a capacitor, 3806 and 3808 are current supply lines, and 3807 is an EL element. .
[0155]
FIG. 24A shows an example in which the current supply line 3806 is shared between two pixels. In other words, the two pixels are formed so as to be symmetrical about the current supply line 3806. In this case, since the number of power supply lines can be reduced, the pixel portion can be further refined.
[0156]
FIG. 24B illustrates an example in which the current supply line 3808 is provided in parallel with the gate wiring 3803. Note that in FIG. 24B, the current supply line 3808 and the gate wiring 3803 are provided so as not to overlap with each other. However, if the wirings are formed in different layers, they overlap with each other through an insulating film. It can also be provided. In this case, since the exclusive area can be shared by the power supply line 3808 and the gate wiring 3803, the pixel portion can be further refined.
[0157]
In FIG. 24C, a current supply line 3808 is provided in parallel with the gate wiring 3803 as in the structure of FIG. 24B, and two pixels are symmetrical with respect to the current supply line 3808. It is characterized in that it is formed. It is also effective to provide the current supply line 3808 so as to overlap with any one of the gate wirings 3803. In this case, since the number of power supply lines can be reduced, the pixel portion can be further refined.
[0158]
In addition, the structure of a present Example can be implemented in combination freely with the structure of Embodiment 1-2, Example 1-4. Further, it is effective to use the EL display panel having the pixel structure of this embodiment as the display portion of the electronic device of Embodiment 5.
[0159]
[Example 11]
22A and 22B shown in Embodiment 8, the capacitor 3504 is provided to hold the voltage applied to the gate of the current control TFT 3503. However, the capacitor 3504 may be omitted. In the case of Example 7, since the NTFT of the present invention as shown in Embodiments 1 and 2 and Examples 1 to 4 is used as the current control TFT 3503, it is provided so as to overlap the gate electrode through the gate insulating film. LDD region. A parasitic capacitance generally called a gate capacitance is formed in the overlapped region, but this embodiment is characterized in that this parasitic capacitance is positively used in place of the capacitor 3504.
[0160]
Since the capacitance of the parasitic capacitance varies depending on the area where the gate electrode and the LDD region overlap, the capacitance of the parasitic capacitance is determined by the length of the LDD region included in the overlapping region.
[0161]
Similarly, in the structure of FIGS. 24A, 24B, and 24C shown in the tenth embodiment, the capacitor 3805 can be omitted.
[0162]
In addition, the structure of a present Example can be implemented in combination freely with the structure of Embodiment 1-2, Example 1-4. Further, it is effective to use the EL display panel having the pixel structure of this embodiment as the display portion of the electronic device of Embodiment 5.
[0163]
【The invention's effect】
By using the technique of the present invention, a crystalline semiconductor film in which the position and size of crystal grains are controlled can be manufactured. By forming the crystal grain position of such a crystalline semiconductor film in accordance with the channel formation region of the TFT, the static characteristics and dynamic characteristics of the TFT can be dramatically improved.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a crystallization process of the present invention.
FIG. 2 is a diagram illustrating a crystallization process of the present invention.
FIG. 3 is a diagram illustrating a crystallization process of the present invention.
FIG. 4 is a diagram showing an example of an embodiment of the present invention.
FIG. 5 is a diagram showing a result of thermal analysis simulation.
FIG. 6 is a top view showing the shape of an island-like insulating film.
FIG. 7 is a diagram showing an observation result of crystallization by SEM.
FIG. 8 is a diagram showing an observation result of crystallization by SEM.
FIGS. 9A and 9B illustrate a manufacturing process of a TFT in a pixel portion and a driver circuit portion. FIGS.
FIGS. 10A and 10B are diagrams illustrating a manufacturing process of a TFT in a pixel portion and a driver circuit portion. FIGS.
FIGS. 11A and 11B illustrate a manufacturing process of a TFT in a pixel portion and a driver circuit portion. FIGS.
FIGS. 12A and 12B illustrate a manufacturing process of a TFT in a pixel portion and a driver circuit portion. FIGS.
FIGS. 13A and 13B are diagrams illustrating a manufacturing process of a TFT in a pixel portion and a driver circuit portion. FIGS.
FIG 14 illustrates a structure of a liquid crystal display device.
FIG. 15 is a diagram showing an example of light transmittance characteristics of an antiferroelectric mixed liquid crystal.
FIG 16 illustrates an example of a semiconductor device.
FIG 17 illustrates an example of a semiconductor device.
FIG 18 illustrates an example of a semiconductor device.
FIG. 19 illustrates a structure of an EL display device.
FIG. 20 illustrates a structure of an EL display device.
FIG. 21 illustrates a structure of an EL display device.
FIG 22 illustrates a structure of an EL display device.
FIG 23 illustrates a structure of an EL display device.
FIG 24 illustrates a structure of an EL display device.
FIG. 25 is a graph showing characteristics of a TFT.
FIG. 26 is a diagram showing an observation result of crystallization by SEM.

Claims (11)

Forming an island-shaped insulating film having a side surface angle of 5 ° or more and less than 50 ° with respect to the surface of the substrate ;
Forming a base insulating film on the island-shaped insulating film;
Forming a semiconductor film on the base insulating film;
Etching the semiconductor film to cover the island-shaped insulating film to form an island- shaped semiconductor film ;
A step of crystallizing with a laser beam the island-shaped semiconductor film,
Forming a gate insulating film on the island-shaped semiconductor film;
And a step of forming a gate electrode over the gate insulating film. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the step of crystallizing with the laser light is performed by irradiating the front surface and the back surface of the island-shaped semiconductor film with laser light. Forming an island-shaped insulating film on the substrate;
Forming a base insulating film on the island-shaped insulating film;
Forming a semiconductor film on the base insulating film;
Etching the semiconductor film to cover the island-shaped insulating film to form an island- shaped semiconductor film ;
A step of crystallization by irradiating a laser beam on both sides of the front and back surfaces of the island-shaped semiconductor film,
Forming a gate insulating film on the island-shaped semiconductor film;
And a step of forming a gate electrode over the gate insulating film. 4. The method for manufacturing a semiconductor device according to claim 1, wherein the island-shaped insulating film and the base insulating film are formed using the same material. Forming an island-shaped insulating film on the substrate;
Forming a base insulating film of the same material as the island-shaped insulating film on the island-shaped insulating film ;
Forming a semiconductor film on the base insulating film;
Etching the semiconductor film to cover the island-shaped insulating film to form an island- shaped semiconductor film ;
A step of crystallizing with a laser beam the island-shaped semiconductor film,
Forming a gate insulating film on the island-shaped semiconductor film;
And a step of forming a gate electrode over the gate insulating film. Forming a base insulating film on the substrate;
Forming an island-shaped insulating film having an angle of a side surface of 5 ° or more and less than 50 ° with respect to the surface of the substrate on the base insulating film;
Forming a semiconductor film on the base insulating film and the island-shaped insulating film;
Etching the semiconductor film to cover the island-shaped insulating film to form an island-shaped semiconductor film;
Crystallization of the island-shaped semiconductor film with laser light;
Forming a gate insulating film on the island-shaped semiconductor film;
And a step of forming a gate electrode over the gate insulating film. 7. The method for manufacturing a semiconductor device according to claim 6, wherein the step of crystallizing with the laser light is performed by irradiating both the front surface and the back surface of the island-shaped semiconductor film with laser light. Forming a base insulating film on the substrate;
Forming an island-shaped insulating film on the base insulating film ;
Forming a semiconductor film on the base insulating film and the island-shaped insulating film ;
Etching the semiconductor film to cover the island-shaped insulating film to form an island- shaped semiconductor film ;
A step of crystallization by irradiating a laser beam on both sides of the front and back surfaces of the island-shaped semiconductor film,
Forming a gate insulating film on the island-shaped semiconductor film ;
And a step of forming a gate electrode over the gate insulating film . 9. The method for manufacturing a semiconductor device according to claim 6, wherein the island-shaped insulating film and the base insulating film are formed using the same material. Forming a base insulating film on the substrate;
Forming an island-shaped insulating film of the same material as the base insulating film on the base insulating film ;
Forming a semiconductor film on the base insulating film and the island-shaped insulating film ;
Etching the semiconductor film to cover the island-shaped insulating film to form an island- shaped semiconductor film ;
A step of crystallizing with a laser beam the island-shaped semiconductor film,
Forming a gate insulating film on the island-shaped semiconductor film ;
And a step of forming a gate electrode over the gate insulating film . In any one of claims 1 to 10, wherein the substrate is a method for manufacturing a semiconductor device, characterized in that a light-transmitting.

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