JP4666730B2 - 集積回路検査方法および装置 - Google Patents

集積回路検査方法および装置 Download PDF

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Publication number
JP4666730B2
JP4666730B2 JP2000232772A JP2000232772A JP4666730B2 JP 4666730 B2 JP4666730 B2 JP 4666730B2 JP 2000232772 A JP2000232772 A JP 2000232772A JP 2000232772 A JP2000232772 A JP 2000232772A JP 4666730 B2 JP4666730 B2 JP 4666730B2
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JP
Japan
Prior art keywords
conductive
electrical contact
fuse
conductive member
integrated circuit
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Expired - Fee Related
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JP2000232772A
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English (en)
Japanese (ja)
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JP2001093949A (ja
JP2001093949A5 (enExample
Inventor
マシュー・ブレディー・ヘンソン
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NXP USA Inc
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NXP USA Inc
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Publication date
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Publication of JP2001093949A publication Critical patent/JP2001093949A/ja
Publication of JP2001093949A5 publication Critical patent/JP2001093949A5/ja
Application granted granted Critical
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/2856—Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Environmental & Geological Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP2000232772A 1999-08-02 2000-08-01 集積回路検査方法および装置 Expired - Fee Related JP4666730B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/366,219 US6133054A (en) 1999-08-02 1999-08-02 Method and apparatus for testing an integrated circuit
US366219 2003-02-13

Publications (3)

Publication Number Publication Date
JP2001093949A JP2001093949A (ja) 2001-04-06
JP2001093949A5 JP2001093949A5 (enExample) 2007-09-13
JP4666730B2 true JP4666730B2 (ja) 2011-04-06

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Family Applications (1)

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JP2000232772A Expired - Fee Related JP4666730B2 (ja) 1999-08-02 2000-08-01 集積回路検査方法および装置

Country Status (2)

Country Link
US (1) US6133054A (enExample)
JP (1) JP4666730B2 (enExample)

Families Citing this family (36)

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US6552438B2 (en) * 1998-06-24 2003-04-22 Samsung Electronics Co. Integrated circuit bonding pads including conductive layers with arrays of unaligned spaced apart insulating islands therein and methods of forming same
US6340895B1 (en) * 1999-07-14 2002-01-22 Aehr Test Systems, Inc. Wafer-level burn-in and test cartridge
US6562636B1 (en) * 1999-07-14 2003-05-13 Aehr Test Systems Wafer level burn-in and electrical test system and method
US6580283B1 (en) 1999-07-14 2003-06-17 Aehr Test Systems Wafer level burn-in and test methods
US6437364B1 (en) * 2000-09-26 2002-08-20 United Microelectronics Corp. Internal probe pads for failure analysis
US6363852B1 (en) * 2000-11-06 2002-04-02 Delphi Technologies, Inc. Factory testable igniter module for a vehicle supplemental restraint system
JP2002164517A (ja) * 2000-11-28 2002-06-07 Mitsubishi Electric Corp テスト用素子を有する半導体装置およびその製造方法
JP2002217367A (ja) * 2001-01-15 2002-08-02 Mitsubishi Electric Corp 半導体チップ、半導体装置および半導体装置の製造方法
KR100385225B1 (ko) * 2001-03-23 2003-05-27 삼성전자주식회사 탐침 패드 및 범프 패드를 갖는 플립 칩형 반도체소자 및 그 제조방법
US6809378B2 (en) * 2001-08-30 2004-10-26 Micron Technology, Inc. Structure for temporarily isolating a die from a common conductor to facilitate wafer level testing
KR100429881B1 (ko) * 2001-11-02 2004-05-03 삼성전자주식회사 셀 영역 위에 퓨즈 회로부가 있는 반도체 소자 및 그제조방법
US7005727B2 (en) * 2001-12-28 2006-02-28 Intel Corporation Low cost programmable CPU package/substrate
US6639302B2 (en) * 2002-03-20 2003-10-28 International Business Machines Corporation Stress reduction in flip-chip PBGA packaging by utilizing segmented chip carries
US20060102385A1 (en) * 2002-06-21 2006-05-18 Andreas Heise Printed board for electronic devices controlling a motor vehicle
DE10234648A1 (de) * 2002-07-29 2004-02-12 Infineon Technologies Ag Halbleiterwafer mit elektrisch verbundenen Kontakt- und Prüfflächen
JP4258205B2 (ja) * 2002-11-11 2009-04-30 パナソニック株式会社 半導体装置
CN100472595C (zh) * 2002-11-21 2009-03-25 皇家飞利浦电子股份有限公司 改进显示器件的输出均匀性的方法
US7888672B2 (en) * 2002-11-23 2011-02-15 Infineon Technologies Ag Device for detecting stress migration properties
US7435990B2 (en) * 2003-01-15 2008-10-14 International Business Machines Corporation Arrangement for testing semiconductor chips while incorporated on a semiconductor wafer
US8274160B2 (en) 2003-08-21 2012-09-25 Intersil Americas Inc. Active area bonding compatible high current structures
US7005369B2 (en) * 2003-08-21 2006-02-28 Intersil American Inc. Active area bonding compatible high current structures
US7208776B2 (en) * 2004-01-30 2007-04-24 Broadcom Corporation Fuse corner pad for an integrated circuit
JP4515143B2 (ja) * 2004-05-10 2010-07-28 三菱電機株式会社 感熱式流量検出素子の製造方法
JP4570446B2 (ja) * 2004-11-16 2010-10-27 パナソニック株式会社 半導体ウェハーおよびその検査方法
US7667289B2 (en) * 2005-03-29 2010-02-23 Taiwan Semiconductor Manufacturing Co., Ltd. Fuse structure having a tortuous metal fuse line
CN101197348B (zh) * 2006-12-05 2010-04-21 中芯国际集成电路制造(上海)有限公司 多用途多晶硅边缘测试结构
US7679198B2 (en) * 2007-05-04 2010-03-16 Micron Technology, Inc. Circuit and method for interconnecting stacked integrated circuit dies
US7713861B2 (en) * 2007-10-13 2010-05-11 Wan-Ling Yu Method of forming metallic bump and seal for semiconductor device
JP4972063B2 (ja) * 2008-09-24 2012-07-11 パナソニック株式会社 半導体装置および半導体装置の製造方法
JP2010073791A (ja) * 2008-09-17 2010-04-02 Panasonic Corp 半導体装置および半導体装置の製造方法
WO2010032350A1 (ja) * 2008-09-17 2010-03-25 パナソニック株式会社 半導体装置及びその製造方法
ITMI20082344A1 (it) 2008-12-30 2010-06-30 St Microelectronics Srl Metodo per indicizzare piastrine comprendenti circuiti integrati
US9225323B1 (en) * 2014-06-19 2015-12-29 Nxp B.V. Signal crossing detection
TWI665771B (zh) * 2014-10-31 2019-07-11 矽品精密工業股份有限公司 不著檢出測試方法及其所用之基板
CN110890343B (zh) * 2018-09-07 2025-05-30 长鑫存储技术有限公司 集成电路芯片及熔断器的检测方法
CN110888048B (zh) * 2018-09-07 2025-03-28 长鑫存储技术有限公司 集成电路芯片及熔断器的测试方法

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US4288911A (en) * 1979-12-21 1981-09-15 Harris Corporation Method for qualifying biased integrated circuits on a wafer level
US4978923A (en) * 1989-04-26 1990-12-18 Ron Maltiel Electrical measurements of the profile of semiconductor devices during their manufacturing process
JP2523856Y2 (ja) * 1989-07-28 1997-01-29 シャープ株式会社 半導体装置
JPH05121502A (ja) * 1991-10-25 1993-05-18 Matsushita Electron Corp 半導体基板装置および半導体装置の検査方法
JPH065677A (ja) * 1992-06-18 1994-01-14 Nec Corp 半導体装置
US5399505A (en) * 1993-07-23 1995-03-21 Motorola, Inc. Method and apparatus for performing wafer level testing of integrated circuit dice
US5654588A (en) * 1993-07-23 1997-08-05 Motorola Inc. Apparatus for performing wafer-level testing of integrated circuits where the wafer uses a segmented conductive top-layer bus structure
JP3674052B2 (ja) * 1994-07-14 2005-07-20 株式会社デンソー Ｉｃウェハおよびそれを用いたバーンイン方法
US5593903A (en) * 1996-03-04 1997-01-14 Motorola, Inc. Method of forming contact pads for wafer level testing and burn-in of semiconductor dice
US5838161A (en) * 1996-05-01 1998-11-17 Micron Technology, Inc. Semiconductor interconnect having test structures for evaluating electrical characteristics of the interconnect

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Publication number Publication date
US6133054A (en) 2000-10-17
JP2001093949A (ja) 2001-04-06

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