JP4639445B2 - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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Publication number
JP4639445B2
JP4639445B2 JP2000260515A JP2000260515A JP4639445B2 JP 4639445 B2 JP4639445 B2 JP 4639445B2 JP 2000260515 A JP2000260515 A JP 2000260515A JP 2000260515 A JP2000260515 A JP 2000260515A JP 4639445 B2 JP4639445 B2 JP 4639445B2
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Prior art keywords
oxide film
thermal oxide
film
polysilicon film
resist
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JP2002075907A (en
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晴司 野口
紀之 須ヶ原
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Fuji Electric Co Ltd
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Fuji Electric Systems Co Ltd
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Description

【０００１】
【発明の属する技術分野】
この発明は、ＣＣＤ（Ｃｈａｒｇｅ Ｃｏｕｐｌｅｄ Ｄｅｖｉｃｅ）などの半導体装置およびその製造方法に関する。
【０００２】
【従来の技術】
ＣＣＤの電荷転送部の電極構造は、ゲート電極を形成するポリシリコン膜と層間絶縁膜である熱酸化膜と転送電極を形成するポリシリコン膜の積層構造をしている。
図３は、ＣＣＤの電荷転送部の要部断面図である。ｐ基板５１上にゲート酸化膜５２を形成し、このゲート酸化膜５２上に第１ポリシリコン膜５３でゲート電極を形成する。この第１ポリシリコン膜５３上に、層間絶縁膜となるＳｉ（シリコン）熱酸化膜５４を形成し、ゲート酸化膜５２上とＳｉ熱酸化膜５４上に第２ポリシリコン膜５５で転送電極を形成する。ＣＣＤの電極は円Ｃで示すように第１ポリシリコン膜５３／Ｓｉ熱酸化膜５４／第２ポリシリコン膜５５の積層構造となっている。尚、図中のＶ１、Ｖ３、Ｖ５はゲート電極に接続する端子、Ｖ２、Ｖ４、Ｖ６は転送電極に接続する端子である。
【０００３】
つぎに、動作について簡単に説明する。図示しない左側で、光などの信号が電子量に変換され、Ｖ１の下にその電子が送られてきたとする。Ｖ１、Ｖ３、Ｖ５に正電圧を印加すると、この電子はＶ１の下に保持される。つぎに、Ｖ１、Ｖ３、Ｖ５を０Ｖとして、Ｖ２、Ｖ４、Ｖ６に正電圧を印加すると、Ｖ１の下の電子はＶ２の下に移動する。Ｖ２、Ｖ４、Ｖ６を０Ｖとして、再びＶ１、Ｖ３、Ｖ５に正電圧を印加すると、Ｖ２の下の電子はＶ３の下に移動する。このことを繰り返すことで、電子をＶ１からＶ２へ、Ｖ２からＶ３へと移動させることができる。この電子の移動によって、信号を転送することができる。
【０００４】
図４は、従来のＣＣＤの電荷転送部の電極構造の製造方法で、同図（ａ）から同図（ｅ）は工程順に示した要部工程断面図である。
ｐ基板５１（Ｓｉ基板）上にゲート酸化膜５２を形成し、続いて減圧ＣＶＤ（Ｃｈｅｍｉｃａｌ Ｖａｐｏｒ Ｄｅｐｏｓｉｔｉｏｎ）法により、第１ポリシリコン膜５３を形成する（同図（ａ））。
【０００５】
つぎに、図示しないレジストを被覆し、このレジストをパターニングし、パターニングされたレジストをマスクに第１ポリシリコン膜５３をエッチングして、第１ポリシリコン膜５３からなるゲート電極を形成する（同図（ｂ））。
つぎに、レジスト５３を除去し、９００℃程度で熱酸化を行い、ｐ基板５１表面および第１ポリシリコン膜５３表面にＳｉ熱酸化膜５４（ＳｉＯ2 ）を形成する。このＳｉ熱酸化膜５４の厚みは、酸化速度（酸化レート）の違いから、第１ポリシリコン膜５３表面に形成されるＳｉ熱酸化膜５４の方が、ゲート酸化膜５２表面に形成されるＳｉ熱酸化膜より２倍から４倍程度厚くなる（同図（ｃ））。同図（ｃ）ではゲート酸化膜５２上に形成されたＳｉ熱酸化膜はゲート酸化膜５２の中に含めた。
【０００６】
つぎに、全面に、減圧ＣＶＤ法により、第２ポリシリコン膜５５を形成し、つぎに、レジスト５６を被覆し、このレジスト５６をパターニングし、パターニングされたレジスト５６をマスクに第２ポリシリコン膜５５をエッチングし、第２ポリシリコン膜５５からなる転送電極を形成する（同図（ｄ））。
つぎに、レジスト５６を除去することで、第１ポリシリコン膜５３／Ｓｉ熱酸化膜５４／第２ポリシリコン膜５５の積層構造がｐ基板５１上にゲート酸化膜５２を介して形成される（同図（ｅ））。尚、図５（ａ）は図４（ｂ）の拡大図、図５（ｂ）は図４（ｃ）の拡大図である。
【０００７】
【発明が解決しようとする課題】
しかし、前記の製造方法では、図５（ａ）の円Ｆに示すように、第１ポリシリコン膜５３のエッジ部は直角となり鋭い。さらに、９００℃程度の熱酸化工程後では、図５（ｂ）の円Ｇに示すように、このエッジ部の形状はさらに鋭角５７となる。これは、熱酸化工程では、応力開放が進まずエッジ部での酸化が遅くなるためである。また、このエッジ部が丸まった状態でなく、鋭角５７の状態では、Ｓｉ熱酸化膜５４の膜厚は、エッジ部で薄くなる。そのため、積層構造に電圧が印加されると、このエッジ部のＳｉ熱酸化膜５４に電界集中が起こり、また、この箇所のＳｉ熱酸化膜５４が薄いこともあって、Ｓｉ熱酸化膜５４の信頼性は低下し、半導体装置の信頼性も低下する。
この発明の目的は、前記の課題を解決して、エッジ部のＳｉ熱酸化膜内で電界集中が起こりにくい半導体装置を提供することにある。
【０００８】
【課題を解決するための手段】
前記目的を達成するために、絶縁膜上に選択的にポリシリコン膜を形成し、該ポリシリコン膜の表面にシリコン熱酸化膜を形成した半導体装置の製造方法において、半導体基板上に絶縁膜を形成する工程と、該絶縁膜上にポリシリコン膜を全面に形成する工程と、前記半導体基板を酸素雰囲気中で熱処理を行い、続いて、窒素雰囲気中において熱処理を行い第１シリコン熱酸化膜を前記ポリシリコン膜上に形成する工程と、全面にレジストを被覆する工程と、該レジストを選択的に除去する工程と、該レジストをマスクに前記第１シリコン熱酸化膜をエッチングし、前記レジスト外周端部近傍の前記第１シリコン熱酸化膜の端部の形状をテーパー状に加工する工程と、前記の第１シリコン熱酸化膜をマスクに、前記ポリシリコン膜を異方性エッチングし、該ポリシリコン膜の表面の外周端部をテーパー状に加工する工程と、該テーパー状に加工する工程に続いて、熱酸化処理を行い、前記ポリシリコン膜のテーパー部を丸め、該ポリシリコン膜上に第２シリコン熱酸化膜を形成する工程と、を含む製造方法とする。
【０００９】
また、絶縁膜上に選択的にポリシリコン膜を形成し、該ポリシリコン膜の表面にシリコン熱酸化膜を形成した半導体装置の製造方法において、半導体基板上に絶縁膜を形成する工程と、該絶縁膜上にポリシリコン膜を全面に形成する工程と、前記半導体基板を酸素雰囲気中で熱処理を行い、続いて、窒素雰囲気中において熱処理を行い第１シリコン熱酸化膜を前記ポリシリコン膜上に形成する工程と、全面にレジストを被覆する工程と、該レジストを選択的に除去する工程と、該レジストをマスクに前記第１シリコン熱酸化膜をエッチングし、前記レジスト外周端部近傍の前記第１シリコン熱酸化膜の端部の形状をテーパー状に加工する工程と、前記の第１シリコン熱酸化膜をマスクに、前記ポリシリコン膜を異方性エッチングし、該ポリシリコン膜の表面の外周端部をテーパー状に加工する工程と、該テーパー状に加工する工程に続いて、前記第１シリコン熱酸化膜を除去する工程と、熱酸化処理を行い、前記ポリシリコン膜のテーパー部を丸め、該ポリシリコン膜上に第２シリコン熱酸化膜を形成する工程と、を含む製造方法とする。
【００１１】
【発明の実施の形態】
図１は、この発明の一実施例の半導体装置の製造方法で、同図（ａ）から同図（ｃ）は工程順に示した要部工程断面図である。ここでは、積層構造の製造方法について説明する。
ｐ基板１上に、ゲート酸化膜２を形成し、続いて、第１ポリシリコン膜３を形成し、その後、８００℃から１１００℃程度の温度で、１分から２０分程度、数％の酸素雰囲気中で熱処理を行い、その後、８００℃から１１００℃程度の温度で、１分から２０分程度、窒素雰囲気中において熱処理を行う。前者の短時間で数％の酸素雰囲気中の熱酸化処理により、第１ポリシリコン膜３上に、数ｎｍから数十ｎｍ程度の第１Ｓｉ熱酸化膜１１が形成される（同図（ａ））。
【００１２】
つぎに、レジスト１３を被覆し、パターニングした後、このレジスト１３をマスクにドライエッチャーで、第１Ｓｉ熱酸化膜１１をエッチングする。このエッチングで、第１Ｓｉ熱酸化膜１１の形状はテーパー状１２になる（同図（ｂ））。
つぎに、第１ポリシリコン膜３を、前記のレジスト１３および第１Ｓｉ熱酸化膜１１をマスクに、ＥＣＲ（Ｅｌｅｃｔｒｏｎ Ｃｙｃｌｏｔｒｏｎ Ｒｅｓｏｎａｎｃｅ）エッチャーにて、異方性エッチングを行う。この異方性エッチングでは、ＳｉとＳｉＯ2 のエッチング選択比を所定の値に設定すると、テーパー状となった第１Ｓｉ熱酸化膜１１が、第１ポリシリコン膜３をエッチングするときのマスクとして機能し、ゲート電極となる第１ポリシリコン膜３のエッジ部をテーパー状１４に加工できる（同図（ｃ））。同図（ｃ）の円Ａの拡大図が図２（ａ）である。
【００１３】
つぎに、熱酸化工程を行うことで、第１ポリシリコン膜３のエッジ部は丸まった形状となり、この丸まった第１ポリシリコン膜３上に第２Ｓｉ熱酸化膜４が形成される（同図（ｄ））。丸まった第１ポリシリコン膜３上に第２Ｓｉ熱酸化膜４が形成されるので、第１ポリシリコン膜３のエッジ部の第２Ｓｉ熱酸化膜４が薄くなることがない。同図（ｄ）の円Ｂの拡大図が図２（ｂ）である。図２（ｂ）に丸まった状態１５に示される。尚、第２Ｓｉ熱酸化膜４を形成する前に第１Ｓｉ熱酸化膜１１を除去しても、除去しなくてもよい。
【００１４】
つぎに、転送電極となる第２ポリシリコン膜５を第１ポリシリコン膜３上に前記の第２Ｓｉ熱酸化膜４を介して形成すると、積層構造が形成される（同図（ｅ））。この積層構造は、第１ポリシリコン膜３のエッジ部が丸まっており、この箇所の第２Ｓｉ熱酸化膜４の厚みも薄くならないので、積層構造に電圧を印加したとき、第２Ｓｉ熱酸化膜中で電界集中が起こらず、半導体装置の信頼性が向上する。尚、図１（ｅ）が、図３に相当する半導体装置となる。
【００１５】
【発明の効果】
この発明において、第１ポリシリコン膜のエッジ部を丸くし、且つ、エッジ部でのＳｉ熱酸化膜の薄膜化を防止することで、エッジ部でのＳｉ熱酸化膜内の電界集中が起こらず、半導体装置の信頼性を向上させることができる。
【図面の簡単な説明】
【図１】この発明の一実施例の半導体装置の製造方法で、（ａ）から（ｅ）は工程順に示した要部工程断面図
【図２】図１（ｃ）、（ｄ）の拡大図
【図３】ＣＣＤの電荷転送部の要部断面図
【図４】従来のＣＣＤの電荷転送部の電極構造の製造方法で、（ａ）から（ｅ）は工程順に示した要部工程断面図
【図５】図４（ｂ）、（ｃ）の拡大図
【符号の説明】
１ ｐ基板
２ ゲート酸化膜
３ 第１ポリシリコン膜
４ 第２Ｓｉ熱酸化膜
５ 第２ポリシリコン膜
１１ 第１Ｓｉ熱酸化膜
１２、１４ テーパー状
１３ レジスト
１５ 丸まった状態
５１ ｐ基板
５２ ゲート酸化膜
５３ 第１ポリシリコン膜
５４ Ｓｉ熱酸化膜
５５ 第２ポリシリコン膜
５６ レジスト
５７ 鋭角[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device such as a CCD (Charge Coupled Device) and a method for manufacturing the same.
[0002]
[Prior art]
The electrode structure of the charge transfer portion of the CCD has a laminated structure of a polysilicon film that forms a gate electrode, a thermal oxide film that is an interlayer insulating film, and a polysilicon film that forms a transfer electrode.
FIG. 3 is a cross-sectional view of the main part of the charge transfer unit of the CCD. A gate oxide film 52 is formed on the p substrate 51, and a gate electrode is formed on the gate oxide film 52 with a first polysilicon film 53. A Si (silicon) thermal oxide film 54 to be an interlayer insulating film is formed on the first polysilicon film 53, and a transfer electrode is formed on the gate oxide film 52 and the Si thermal oxide film 54 with the second polysilicon film 55. Form. The electrode of the CCD has a laminated structure of a first polysilicon film 53 / Si thermal oxide film 54 / second polysilicon film 55 as indicated by a circle C. In the figure, V1, V3, and V5 are terminals connected to the gate electrode, and V2, V4, and V6 are terminals connected to the transfer electrode.
[0003]
Next, the operation will be briefly described. It is assumed that a signal such as light is converted into an amount of electrons on the left side (not shown), and the electrons are sent under V1. When a positive voltage is applied to V1, V3, and V5, the electrons are held under V1. Next, when V1, V3, and V5 are set to 0 V and a positive voltage is applied to V2, V4, and V6, electrons below V1 move below V2. When V2, V4, and V6 are set to 0 V and a positive voltage is applied to V1, V3, and V5 again, electrons below V2 move below V3. By repeating this, electrons can be moved from V1 to V2 and from V2 to V3. A signal can be transferred by this movement of electrons.
[0004]
FIG. 4 shows a conventional method for manufacturing an electrode structure of a charge transfer portion of a CCD. FIG. 4A to FIG.
A gate oxide film 52 is formed on a p substrate 51 (Si substrate), and then a first polysilicon film 53 is formed by a low pressure CVD (Chemical Vapor Deposition) method (FIG. 1A).
[0005]
Next, a resist (not shown) is coated, this resist is patterned, and the first polysilicon film 53 is etched using the patterned resist as a mask to form a gate electrode made of the first polysilicon film 53 (see FIG. (B)).
Next, the resist 53 is removed and thermal oxidation is performed at about 900 ° C. to form a Si thermal oxide film 54 (SiO 2 ) on the surface of the p substrate 51 and the surface of the first polysilicon film 53. The thickness of the Si thermal oxide film 54 is different from that of the oxidation rate (oxidation rate), so that the Si thermal oxide film 54 formed on the surface of the first polysilicon film 53 is formed on the surface of the gate oxide film 52. It is about 2 to 4 times thicker than the thermal oxide film ((c) in the figure). In FIG. 2C, the Si thermal oxide film formed on the gate oxide film 52 is included in the gate oxide film 52.
[0006]
Next, a second polysilicon film 55 is formed on the entire surface by a low pressure CVD method. Next, a resist 56 is coated, the resist 56 is patterned, and the second resist film 56 is patterned using the patterned resist 56 as a mask. 55 is etched to form a transfer electrode made of the second polysilicon film 55 (FIG. 4D).
Next, by removing the resist 56, a laminated structure of the first polysilicon film 53 / Si thermal oxide film 54 / second polysilicon film 55 is formed on the p substrate 51 via the gate oxide film 52 (see FIG. (E) in FIG. 5 (a) is an enlarged view of FIG. 4 (b), and FIG. 5 (b) is an enlarged view of FIG. 4 (c).
[0007]
[Problems to be solved by the invention]
However, in the above manufacturing method, as shown by a circle F in FIG. 5A, the edge portion of the first polysilicon film 53 is perpendicular and sharp. Further, after the thermal oxidation process at about 900 ° C., the shape of the edge portion becomes an acute angle 57 as shown by a circle G in FIG. This is because in the thermal oxidation process, stress release does not proceed and oxidation at the edge portion is delayed. In addition, when the edge portion is not rounded but at an acute angle 57, the thickness of the Si thermal oxide film 54 is reduced at the edge portion. Therefore, when a voltage is applied to the laminated structure, electric field concentration occurs in the Si thermal oxide film 54 at the edge portion, and the Si thermal oxide film 54 at this location may be thin. The reliability is lowered and the reliability of the semiconductor device is also lowered.
An object of the present invention is to solve the above-described problems and provide a semiconductor device in which electric field concentration is unlikely to occur in the Si thermal oxide film at the edge portion.
[0008]
[Means for Solving the Problems]
In order to achieve the above object, in a method of manufacturing a semiconductor device in which a polysilicon film is selectively formed on an insulating film and a silicon thermal oxide film is formed on the surface of the polysilicon film , the insulating film is formed on the semiconductor substrate. Forming a polysilicon film on the entire surface of the insulating film, and subjecting the semiconductor substrate to a heat treatment in an oxygen atmosphere, followed by a heat treatment in a nitrogen atmosphere to form a first silicon thermal oxide film. Forming on the polysilicon film, covering the entire surface with a resist, selectively removing the resist, etching the first silicon thermal oxide film using the resist as a mask, and The step of processing the shape of the end portion of the first silicon thermal oxide film in the vicinity of the end portion into a tapered shape, and the polysilicon film as an anisotropic energy using the first silicon thermal oxide film as a mask. Following the step of processing the outer peripheral edge of the surface of the polysilicon film into a taper shape and the step of processing into the taper shape, thermal oxidation treatment is performed to round the taper portion of the polysilicon film, Forming a second silicon thermal oxide film on the polysilicon film.
[0009]
Further, in a method of manufacturing a semiconductor device in which a polysilicon film is selectively formed on an insulating film, and a silicon thermal oxide film is formed on the surface of the polysilicon film, the step of forming the insulating film on the semiconductor substrate; Forming a polysilicon film on the entire surface of the insulating film; and subjecting the semiconductor substrate to a heat treatment in an oxygen atmosphere, followed by a heat treatment in a nitrogen atmosphere to form a first silicon thermal oxide film on the polysilicon film. Forming a resist; covering the entire surface with a resist; removing the resist selectively; etching the first silicon thermal oxide film using the resist as a mask; and (1) processing the shape of the end of the silicon thermal oxide film into a taper shape, and anisotropically etching the polysilicon film using the first silicon thermal oxide film as a mask, A step of processing the outer peripheral edge portion of the surface of the con membrane tapered, following the step of processing the said tapered, and removing the first silicon thermal oxide film, by thermal oxidation process, the polysilicon Rounding the taper portion of the film and forming a second silicon thermal oxide film on the polysilicon film .
[0011]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 shows a method of manufacturing a semiconductor device according to an embodiment of the present invention, wherein FIG. 1A to FIG. Here, the manufacturing method of a laminated structure is demonstrated.
A gate oxide film 2 is formed on the p substrate 1, followed by a first polysilicon film 3, and then an oxygen atmosphere of several percent at a temperature of about 800 ° C. to 1100 ° C. for about 1 to 20 minutes. Then, heat treatment is performed in a nitrogen atmosphere at a temperature of about 800 ° C. to 1100 ° C. for about 1 to 20 minutes. A first Si thermal oxide film 11 having a thickness of several nanometers to several tens of nanometers is formed on the first polysilicon film 3 by thermal oxidation treatment in an oxygen atmosphere of several percent in the former short time (FIG. 2A). ).
[0012]
Next, after the resist 13 is coated and patterned, the first Si thermal oxide film 11 is etched by a dry etcher using the resist 13 as a mask. By this etching, the shape of the first Si thermal oxide film 11 becomes a tapered shape 12 ((b) in the figure).
Next, anisotropic etching is performed on the first polysilicon film 3 by an ECR (Electron Cyclotron Resonance) etcher using the resist 13 and the first Si thermal oxide film 11 as a mask. In this anisotropic etching, when the etching selectivity of Si and SiO 2 is set to a predetermined value, the tapered first Si thermal oxide film 11 functions as a mask when the first polysilicon film 3 is etched. Then, the edge portion of the first polysilicon film 3 to be the gate electrode can be processed into a tapered shape 14 (FIG. 3C). FIG. 2A is an enlarged view of a circle A in FIG.
[0013]
Next, by performing a thermal oxidation process, the edge portion of the first polysilicon film 3 becomes rounded, and a second Si thermal oxide film 4 is formed on the rounded first polysilicon film 3 (see FIG. (D)). Since the second Si thermal oxide film 4 is formed on the rounded first polysilicon film 3, the second Si thermal oxide film 4 at the edge of the first polysilicon film 3 is not thinned. FIG. 2B is an enlarged view of a circle B in FIG. It is shown in a rounded state 15 in FIG. Note that the first Si thermal oxide film 11 may or may not be removed before the second Si thermal oxide film 4 is formed.
[0014]
Next, when a second polysilicon film 5 serving as a transfer electrode is formed on the first polysilicon film 3 via the second Si thermal oxide film 4, a laminated structure is formed (FIG. 5E). In this laminated structure, the edge portion of the first polysilicon film 3 is rounded, and the thickness of the second Si thermal oxide film 4 at this location does not become thin. Therefore, when a voltage is applied to the laminated structure, As a result, electric field concentration does not occur and the reliability of the semiconductor device is improved. FIG. 1E shows a semiconductor device corresponding to FIG.
[0015]
【The invention's effect】
In this invention, the edge portion of the first polysilicon film is rounded and the Si thermal oxide film is prevented from being thinned at the edge portion, so that electric field concentration in the Si thermal oxide film at the edge portion does not occur. The reliability of the semiconductor device can be improved.
[Brief description of the drawings]
FIGS. 1A to 1E are cross-sectional views of essential steps shown in the order of steps in a method of manufacturing a semiconductor device according to an embodiment of the present invention. FIGS. 2A and 2B are enlarged views of FIGS. FIG. 3 is a cross-sectional view of a main part of a charge transfer unit of a CCD. FIG. 4 is a conventional method for manufacturing an electrode structure of a charge transfer unit of a CCD. Fig. 5 is an enlarged view of Figs. 4 (b) and 4 (c).
1 p substrate 2 gate oxide film 3 first polysilicon film 4 second Si thermal oxide film 5 second polysilicon film 11 first Si thermal oxide film 12, 14 tapered 13 resist 15 curled state 51 p substrate 52 gate oxide film 53 First polysilicon film 54 Si thermal oxide film 55 second polysilicon film 56 resist 57 acute angle

Claims (2)

絶縁膜上に選択的にポリシリコン膜を形成し、該ポリシリコン膜の表面にシリコン熱酸化膜を形成した半導体装置の製造方法において、
半導体基板上に絶縁膜を形成する工程と、該絶縁膜上にポリシリコン膜を全面に形成する工程と、前記半導体基板を酸素雰囲気中で熱処理を行い、続いて、窒素雰囲気中において熱処理を行い第１シリコン熱酸化膜を前記ポリシリコン膜上に形成する工程と、全面にレジストを被覆する工程と、該レジストを選択的に除去する工程と、該レジストをマスクに前記第１シリコン熱酸化膜をエッチングし、前記レジスト外周端部近傍の前記第１シリコン熱酸化膜の端部の形状をテーパー状に加工する工程と、前記の第１シリコン熱酸化膜をマスクに、前記ポリシリコン膜を異方性エッチングし、該ポリシリコン膜の表面の外周端部をテーパー状に加工する工程と、該テーパー状に加工する工程に続いて、熱酸化処理を行い、前記ポリシリコン膜のテーパー部を丸め、該ポリシリコン膜上に第２シリコン熱酸化膜を形成する工程と、を含むことを特徴とする半導体装置の製造方法。In a method for manufacturing a semiconductor device in which a polysilicon film is selectively formed on an insulating film and a silicon thermal oxide film is formed on the surface of the polysilicon film,
A step of forming an insulating film on the semiconductor substrate; a step of forming a polysilicon film on the whole surface of the insulating film; and heat-treating the semiconductor substrate in an oxygen atmosphere, followed by a heat treatment in a nitrogen atmosphere. A step of forming a first silicon thermal oxide film on the polysilicon film, a step of covering the entire surface with a resist, a step of selectively removing the resist, and the first silicon thermal oxide film using the resist as a mask; And a step of processing the shape of the end portion of the first silicon thermal oxide film in the vicinity of the outer peripheral end portion of the resist into a taper shape, and the polysilicon film using the first silicon thermal oxide film as a mask. Following the steps of isotropic etching and processing the outer peripheral edge of the surface of the polysilicon film into a taper shape, and the step of processing into the taper shape, thermal oxidation treatment is performed to Rounded supermarkets portion, a method of manufacturing a semiconductor device which comprises a step of forming a second silicon thermal oxide film on the polysilicon film. 絶縁膜上に選択的にポリシリコン膜を形成し、該ポリシリコン膜の表面にシリコン熱酸化膜を形成した半導体装置の製造方法において、
半導体基板上に絶縁膜を形成する工程と、該絶縁膜上にポリシリコン膜を全面に形成する工程と、前記半導体基板を酸素雰囲気中で熱処理を行い、続いて、窒素雰囲気中において熱処理を行い第１シリコン熱酸化膜を前記ポリシリコン膜上に形成する工程と、全面にレジストを被覆する工程と、該レジストを選択的に除去する工程と、該レジストをマスクに前記第１シリコン熱酸化膜をエッチングし、前記レジスト外周端部近傍の前記第１シリコン熱酸化膜の端部の形状をテーパー状に加工する工程と、前記の第１シリコン熱酸化膜をマスクに、前記ポリシリコン膜を異方性エッチングし、該ポリシリコン膜の表面の外周端部をテーパー状に加工する工程と、該テーパー状に加工する工程に続いて、前記第１シリコン熱酸化膜を除去する工程と、熱酸化処理を行い、前記ポリシリコン膜のテーパー部を丸め、該ポリシリコン膜上に第２シリコン熱酸化膜を形成する工程と、を含むことを特徴とする半導体装置の製造方法。In a method for manufacturing a semiconductor device in which a polysilicon film is selectively formed on an insulating film and a silicon thermal oxide film is formed on the surface of the polysilicon film,
A step of forming an insulating film on the semiconductor substrate; a step of forming a polysilicon film on the whole surface of the insulating film; and heat-treating the semiconductor substrate in an oxygen atmosphere, followed by a heat treatment in a nitrogen atmosphere. A step of forming a first silicon thermal oxide film on the polysilicon film, a step of covering the entire surface with a resist, a step of selectively removing the resist, and the first silicon thermal oxide film using the resist as a mask; And a step of processing the shape of the end portion of the first silicon thermal oxide film in the vicinity of the outer peripheral end portion of the resist into a taper shape, and the polysilicon film using the first silicon thermal oxide film as a mask. and anisotropic etching, the step of processing the outer peripheral edge portion of the surface of the polysilicon film into a tapered shape, following the step of processing the said tapered removing the first silicon thermal oxide film process , By thermal oxidation process, the rounded tapered portion of the polysilicon film, a method of manufacturing a semiconductor device which comprises forming a first silicon thermal oxide film on the polysilicon film.
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JPH022634A (en) * 1988-06-17 1990-01-08 Fujitsu Ltd Semiconductor device
JPH03293724A (en) * 1990-04-12 1991-12-25 Oki Electric Ind Co Ltd Manufacture of semiconductor element
JPH0766421A (en) * 1993-08-31 1995-03-10 Ryoden Semiconductor Syst Eng Kk Thin-film transistor and its manufacture

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JPH022634A (en) * 1988-06-17 1990-01-08 Fujitsu Ltd Semiconductor device
JPH03293724A (en) * 1990-04-12 1991-12-25 Oki Electric Ind Co Ltd Manufacture of semiconductor element
JPH0766421A (en) * 1993-08-31 1995-03-10 Ryoden Semiconductor Syst Eng Kk Thin-film transistor and its manufacture

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