JPH10284716A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device which enables relaxation of the step-like shape of an element isolation region and easy formation of a transistor gate electrode, in field shield element isolation for forming a sidewall oxide film portion by thermal oxidation. SOLUTION: First, a shield gate-insulating film 2, a first polycrystaline silicon film 3a of a low phosphorus concentration, and a second polycrystalline silicon film 3b of a high phosphorus concentration are formed on a semiconductor substrate 1. Next, a chemical vapor deposition (CVD) oxide film 4 is formed. After that, the CVD oxide film 4 is worked into the shape of a cap-insulating film. Next, using the cap insulating film 4 as a mask, the first polycrystalline silicon film 3a and the second polycrystallinbe silicon film 3b are worked into the shape of a field shield gate electrode by anisotropic etching. After that, heat treatment is carried out to form a thermally oxidized sidewall 8 on the lateral surfaces of the first polycrystalline silicon film 3a and the second polycrystalline silicon film 3b.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for separating a field shield element.

[0002]

2. Description of the Related Art One of the conventionally known element isolation methods in a semiconductor device is a method of forming an area called a field shield electrode in an element isolation area and applying a fixed potential thereto to perform element isolation ( There is a so-called field shield element separation method.

A conventional manufacturing process of a field shield element isolation region will be described with reference to a step-by-step sectional view of FIG. As shown in FIG. 3A, after growing a shield gate oxide film 2 on a silicon semiconductor substrate 1, a polycrystalline silicon film 3 containing conductive impurities and a CVD oxide film 4 are sequentially deposited by a low pressure CVD method.

Next, as shown in FIG. 3B, the laminated film is patterned so that the shield gate oxide film 2 in the element active region 6 is exposed. Next, as shown in FIG. 3C, an etch-back process is performed with the silicon semiconductor substrate 1 as an end point, and the shield gate oxide film 2 in the element active region 6
Is removed.

[0005] Thereafter, the wafer surface is cleaned using a mixed solution of ammonia and hydrogen peroxide solution, and thermal oxidation is performed.
Utilizing that the oxidation rate of the polycrystalline silicon film is about 6 to 8 times that of the silicon semiconductor substrate, the gate oxide film 1 of the transistor is formed on the element active region 6 as shown in FIG.
1 and sidewall oxide film portions 8 are formed on both sides of the field shield electrode.

Next, as shown in FIGS. 3E and 3F, a polycrystalline silicon film 10 serving as a photoresist is deposited, and a predetermined lithography and dry etching process is performed to form a transistor gate electrode 12.

[0007]

However, in the conventional field shield element isolation in which the side wall oxide film portion 8 is formed by thermal oxidation, the step shape of the element isolation region 7 is abrupt. As shown in (f), when the polycrystalline silicon film 9 serving as the transistor gate electrode 12 is dry-etched, the etching residue 1
3 occurs, and as a result, there is a problem that a short circuit may occur between the field shield electrode and the wiring.

SUMMARY OF THE INVENTION In view of the above problems, it is an object of the present invention to provide a method for forming a field shield element isolation region in which an etching residue hardly occurs when forming a transistor gate electrode.

[0009]

A method of manufacturing a semiconductor device according to the present invention comprises a first step of forming a shield gate insulating film on a semiconductor substrate, and a step of forming a first conductive impurity concentration on the shield gate insulating film. A second step of forming a first polycrystalline silicon film having, and on the first polycrystalline silicon film,
A third step of forming a second polycrystalline silicon film having a second conductive impurity concentration higher than the first conductive impurity concentration, and on the second polycrystalline silicon film, A fourth step of forming a second insulating film, a fifth step of processing the second insulating film into a cap insulating film shape of a field shield gate electrode, and using the cap insulating film as a mask, A sixth step of processing the first polycrystalline silicon film and the second polycrystalline silicon film into a field shield gate electrode shape by anisotropic etching; and, after the sixth step, heat treating the semiconductor substrate. And a seventh step of forming a thermally oxidized side wall on the side surfaces of the first polycrystalline silicon film and the second polycrystalline silicon film.

Another feature of the present invention is that
A first step of forming a shield gate insulating film on a semiconductor substrate, and a second step of forming a polycrystalline silicon film on the shield gate insulating film, the conductive impurity concentration of which increases with distance from the semiconductor substrate. A fourth step of forming a second insulating film on the polycrystalline silicon film; and a fifth step of processing the second insulating film into a cap insulating film shape of a field shield gate electrode. Using the cap insulating film as a mask, a sixth step of processing the polycrystalline silicon film into a field shield gate electrode shape by anisotropic etching, and after the sixth step,
Performing a heat treatment on the semiconductor substrate to form a thermally oxidized sidewall on a side surface of the polycrystalline silicon film.

Another feature of the present invention is that the conductive impurity is phosphorus.

Another feature of the present invention is that the conductive impurity concentration is 1E18 cm ^{−3 to} 1E21 cm.
^-3 .

[0013]

FIG. 1 is a cross-sectional view showing a first embodiment of a method of manufacturing a semiconductor device according to the present invention. First, FIG.
As shown in FIG. 1A, a shield gate oxide film 2 of 500.degree.

Next, on this shield gate oxide film 2,
An 800 ° first polycrystalline silicon film 3a containing about 1E18 cm ⁻³ of phosphorus is deposited by a known low pressure CVD method (chemical vapor deposition method) under an atmosphere of a dopant gas such as PH3. On the first polycrystalline silicon film 3a containing phosphorus at a low concentration, a 1E21 cm
An 800 ° second polycrystalline silicon film 3b containing about ^-3 phosphorus is deposited by low pressure CVD.

Next, as shown in FIG. 1B, a 3000 ° CVD oxide film 4 is deposited. Next, a photoresist (not shown) is applied on the CVD oxide film 4 and patterned, and the CVD oxide film 4 in the element active region 6 is anisotropically etched. , Second
Polycrystalline silicon film 3b and first polycrystalline silicon film 3a
Is anisotropically etched under the same conditions using, for example, HBr.

Then, the etching rate of the polycrystalline silicon film becomes higher as the phosphorus concentration in the film becomes higher.
As shown in (c), the element isolation region has a structure in which the side-etched portion 5 is included in a layer of the second polycrystalline silicon film 3b containing phosphorus at a high concentration.

Next, a side wall oxide film portion 8 is formed on both sides of the field shield electrode by performing a thermal oxidation process. Then, the oxidation rate of the polycrystalline silicon containing a high concentration of phosphorus is about 5 to 6 times that of the low concentration polycrystalline silicon. The lower sidewall oxide film portion 8 is formed to be thin.

As a result, as shown in FIG. 1D, the overall shape of the element isolation region 7 has a gentle forward taper shape, and the step shape of the element isolation region 7 can be reduced. Thereafter, as shown in FIG. 1E, the shield gate oxide film 2 on the element active region 6 is etched back.
Is removed.

FIG. 2 is a sectional view in the order of steps showing a second embodiment of the method of manufacturing a semiconductor device according to the present invention. First, FIG.
As shown in FIG. 1A, a shield gate oxide film 2 of 500.degree. By gradually increasing the flow rate of the dopant gas such as PH3 on the shield gate oxide film 2 by the low pressure CVD method, the phosphorus concentration is gradually increased from about 1E18 cm ^{−3 to} about 1E21 cm ⁻³ . A polycrystalline silicon film 3 is deposited.

Next, as shown in FIG. 2B, a 3000 ° CVD oxide film 4 is deposited on the polycrystalline silicon film 3. Next, a photoresist (not shown) is applied on the CVD oxide film 4 and patterned, and the CV of the element active region 6 is formed.
After the D oxide film 4 is anisotropically etched, the polycrystalline silicon film 3 is anisotropically etched under the same conditions.

Then, since the etching rate of the polycrystalline silicon film increases as the phosphorus concentration in the film increases, the polycrystalline silicon film 3 serving as a field shield electrode is formed as shown in FIG.
As shown in (c), the structure has a forward tapered side etch.

Next, a thermal oxidation process is performed to form sidewall oxide film portions 8 on both sides of the field shield electrode. Then, the oxidation rate of the polycrystalline silicon containing a high concentration of phosphorus is about 5 to 6 times that of the polycrystalline silicon containing a low concentration. .

As a result, as shown in FIG. 2D, the overall shape of the element isolation region 7 has a gentle forward taper shape, and the step shape of the element isolation region 7 can be reduced. Then, as shown in FIG. 2E, the shield gate oxide film 2 on the element active region 6 is etched back.
Is removed.

[0024]

As described above, according to the present invention, a conductive polycrystalline silicon film serving as a field shield electrode is formed by P (phosphorus) by field shield element isolation for forming a side wall oxide film portion by thermal oxidation. Are formed so as to have a film structure of two or more layers including a polycrystalline silicon film having a low impurity concentration and a polycrystalline silicon film having a high impurity concentration, and the etching rate and oxidation rate of the polycrystalline silicon are Utilizing the fact that it depends on the impurity concentration, the field shield electrode is processed into a forward tapered shape, and the sidewall oxide film is formed by thermal oxidation so that the oxide film thickness at the top of the field shield electrode is large and the oxide film at the bottom is thin. By forming the portion, the step shape of the element isolation region can be reduced,
In the subsequent dry etching of the polycrystalline silicon film for forming the transistor gate electrode, generation of etching residues can be suppressed.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a first embodiment of a method of manufacturing a semiconductor device according to the present invention in steps (a) to (e).

FIGS. 2A to 2E are cross-sectional views illustrating a second embodiment of the method of manufacturing a semiconductor device according to the present invention in steps (a) to (e).

3A to 3F are cross-sectional views illustrating a method for manufacturing a semiconductor device employing a conventional technique, in steps (a) to (f).

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Silicon semiconductor substrate 2 Shield gate oxide film 3a Conductive polycrystalline silicon film (field shield electrode) 3b Conductive polycrystalline silicon film (field shield electrode) 4 CVD oxide film (cap oxide film) 5 Side etch portion 6 Element active area Reference Signs List 7 element isolation region 8 sidewall oxide film portion 9 polycrystalline silicon film 10 photoresist 11 gate oxide film 12 gate electrode 13 etching residue portion

Claims (4)

[Claims] A first step of forming a shield gate insulating film on a semiconductor substrate; and a second step of forming a first polycrystalline silicon film having a first conductive impurity concentration on the shield gate insulating film. A third step of forming a second polycrystalline silicon film having a second conductive impurity concentration higher than the first conductive impurity concentration on the first polycrystalline silicon film A fourth step of forming a second insulating film on the second polycrystalline silicon film; and a fifth step of processing the second insulating film into a cap insulating film shape of a field shield gate electrode. Using the cap insulating film as a mask, processing the first polycrystalline silicon film and the second polycrystalline silicon film into a field shield gate electrode shape by anisotropic etching; Sixth process Thereafter, performing a heat treatment on the semiconductor substrate to form a thermally oxidized sidewall on a side surface of the first polycrystalline silicon film and the second polycrystalline silicon film. Production method. 2. A first step of forming a shield gate insulating film on a semiconductor substrate, and a polycrystalline silicon film on the shield gate insulating film, the conductive impurity concentration of which increases as the distance from the semiconductor substrate increases A second step of forming a second insulating film on the polycrystalline silicon film; and a second step of processing the second insulating film into a cap insulating film shape of a field shield gate electrode. A fifth step, using the cap insulating film as a mask, a sixth step of processing the polycrystalline silicon film into a field shield gate electrode shape by anisotropic etching, and after the sixth step, Performing a heat treatment to form a thermally oxidized side wall on a side surface of the polycrystalline silicon film. 3. The method for manufacturing a semiconductor device according to claim 1, wherein said conductive impurity is phosphorus. 4. The method according to claim 2, wherein the conductive impurity concentration is 1E18 cm ^{−3 to} 1E21 cm ⁻³ .