JP4618639B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP4618639B2
JP4618639B2 JP2005045284A JP2005045284A JP4618639B2 JP 4618639 B2 JP4618639 B2 JP 4618639B2 JP 2005045284 A JP2005045284 A JP 2005045284A JP 2005045284 A JP2005045284 A JP 2005045284A JP 4618639 B2 JP4618639 B2 JP 4618639B2
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JP
Japan
Prior art keywords
imaging
light receiving
semiconductor device
protective film
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2005045284A
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English (en)
Japanese (ja)
Other versions
JP2006237051A5 (enrdf_load_stackoverflow
JP2006237051A (ja
Inventor
克彦 香西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Aoi Electronics Co Ltd
Original Assignee
Aoi Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Aoi Electronics Co Ltd filed Critical Aoi Electronics Co Ltd
Priority to JP2005045284A priority Critical patent/JP4618639B2/ja
Publication of JP2006237051A publication Critical patent/JP2006237051A/ja
Publication of JP2006237051A5 publication Critical patent/JP2006237051A5/ja
Application granted granted Critical
Publication of JP4618639B2 publication Critical patent/JP4618639B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
JP2005045284A 2005-02-22 2005-02-22 半導体装置の製造方法 Expired - Fee Related JP4618639B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005045284A JP4618639B2 (ja) 2005-02-22 2005-02-22 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005045284A JP4618639B2 (ja) 2005-02-22 2005-02-22 半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JP2006237051A JP2006237051A (ja) 2006-09-07
JP2006237051A5 JP2006237051A5 (enrdf_load_stackoverflow) 2008-04-03
JP4618639B2 true JP4618639B2 (ja) 2011-01-26

Family

ID=37044413

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005045284A Expired - Fee Related JP4618639B2 (ja) 2005-02-22 2005-02-22 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JP4618639B2 (enrdf_load_stackoverflow)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4200463B2 (ja) * 2006-07-07 2008-12-24 Ｔｄｋ株式会社 受光素子及びそれを用いた光ヘッド並びにそれを用いた光記録再生装置
US8270177B2 (en) * 2007-07-27 2012-09-18 Renesas Electronics Corporation Electronic device and method for manufacturing electronic device
JP2009047949A (ja) * 2007-08-21 2009-03-05 Alps Electric Co Ltd 光学素子の製造方法
KR100885505B1 (ko) 2007-09-28 2009-02-26 삼성전기주식회사 카메라 모듈 및 그 제조방법
JP4694602B2 (ja) * 2008-09-02 2011-06-08 シャープ株式会社 固体撮像装置およびそれを備えた電子機器
JP2010062232A (ja) 2008-09-02 2010-03-18 Nec Electronics Corp 素子の機能部を露出させた半導体装置の製造方法
KR20180056165A (ko) * 2016-11-18 2018-05-28 지투지솔루션(주) Ｃｉｓ 패키지 구조
DE102018210680A1 (de) * 2018-06-29 2020-01-02 Trumpf Laser Gmbh Optisches Element mit abziehbarer Schutzfolie
KR102248527B1 (ko) 2019-05-02 2021-05-06 삼성전기주식회사 이미지 센서 패키지
KR20200142366A (ko) * 2019-06-12 2020-12-22 삼성전기주식회사 이미지 센서 패키지
JP7328939B2 (ja) * 2020-07-15 2023-08-17 アオイ電子株式会社 半導体装置の製造方法およびウエハ
JP2022155336A (ja) 2021-03-30 2022-10-13 ミツミ電機株式会社 検出装置及び検出装置の製造方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6132535A (ja) * 1984-07-25 1986-02-15 Sanyo Electric Co Ltd センサの製造方法
KR970005706B1 (ko) * 1994-01-24 1997-04-19 금성일렉트론 주식회사 고체촬상소자 및 그 제조방법
JP4143304B2 (ja) * 2002-01-24 2008-09-03 富士通株式会社 カメラモジュールの製造方法
JP2003332542A (ja) * 2002-05-09 2003-11-21 Shinko Electric Ind Co Ltd 半導体装置およびその製造方法
JP3936365B2 (ja) * 2004-09-14 2007-06-27 ソニーケミカル＆インフォメーションデバイス株式会社 機能素子実装モジュール及びその製造方法

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Publication number Publication date
JP2006237051A (ja) 2006-09-07

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