JP4601365B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP4601365B2
JP4601365B2 JP2004273024A JP2004273024A JP4601365B2 JP 4601365 B2 JP4601365 B2 JP 4601365B2 JP 2004273024 A JP2004273024 A JP 2004273024A JP 2004273024 A JP2004273024 A JP 2004273024A JP 4601365 B2 JP4601365 B2 JP 4601365B2
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JP
Japan
Prior art keywords
semiconductor chip
main surface
wiring board
terminals
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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JP2004273024A
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English (en)
Japanese (ja)
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JP2006093189A (ja
JP2006093189A5 (enExample
Inventor
義成 林
智和 石川
孝之 星野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
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Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2004273024A priority Critical patent/JP4601365B2/ja
Priority to US11/221,904 priority patent/US7323773B2/en
Publication of JP2006093189A publication Critical patent/JP2006093189A/ja
Publication of JP2006093189A5 publication Critical patent/JP2006093189A5/ja
Priority to US11/946,581 priority patent/US7652368B2/en
Application granted granted Critical
Publication of JP4601365B2 publication Critical patent/JP4601365B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H10W90/701—
    • H10P74/273—
    • H10W70/65—
    • H10W90/00—
    • H10W72/29—
    • H10W72/5445—
    • H10W72/5449—
    • H10W72/5522—
    • H10W72/877—
    • H10W72/884—
    • H10W72/926—
    • H10W72/932—
    • H10W72/9445—
    • H10W74/00—
    • H10W74/15—
    • H10W90/284—
    • H10W90/291—
    • H10W90/724—
    • H10W90/732—
    • H10W90/734—
    • H10W90/754—

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  • Semiconductor Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)
JP2004273024A 2004-09-21 2004-09-21 半導体装置 Expired - Fee Related JP4601365B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2004273024A JP4601365B2 (ja) 2004-09-21 2004-09-21 半導体装置
US11/221,904 US7323773B2 (en) 2004-09-21 2005-09-09 Semiconductor device
US11/946,581 US7652368B2 (en) 2004-09-21 2007-11-28 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004273024A JP4601365B2 (ja) 2004-09-21 2004-09-21 半導体装置

Publications (3)

Publication Number Publication Date
JP2006093189A JP2006093189A (ja) 2006-04-06
JP2006093189A5 JP2006093189A5 (enExample) 2007-11-08
JP4601365B2 true JP4601365B2 (ja) 2010-12-22

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004273024A Expired - Fee Related JP4601365B2 (ja) 2004-09-21 2004-09-21 半導体装置

Country Status (2)

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US (2) US7323773B2 (enExample)
JP (1) JP4601365B2 (enExample)

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US20080023821A1 (en) * 2005-07-20 2008-01-31 Shih-Ping Hsu Substrate structure integrated with passive components
JP4743021B2 (ja) * 2006-06-27 2011-08-10 凸版印刷株式会社 スタックトｉｃパッケージ
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KR100837554B1 (ko) * 2006-09-28 2008-06-12 동부일렉트로닉스 주식회사 반도체 소자 및 그 제조 방법
TWI304719B (en) * 2006-10-25 2008-12-21 Phoenix Prec Technology Corp Circuit board structure having embedded compacitor and fabrication method thereof
US8124461B2 (en) 2006-12-27 2012-02-28 Mediatek Inc. Method for manufacturing leadframe, packaging method for using the leadframe and semiconductor package product
US7834435B2 (en) * 2006-12-27 2010-11-16 Mediatek Inc. Leadframe with extended pad segments between leads and die pad, and leadframe package using the same
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JP5056085B2 (ja) * 2007-03-09 2012-10-24 日本電気株式会社 電子部品の実装構造
JP5001903B2 (ja) 2008-05-28 2012-08-15 ルネサスエレクトロニクス株式会社 半導体装置及びその製造方法
US9110128B1 (en) * 2008-10-03 2015-08-18 Altera Corporation IC package for pin counts less than test requirements
JP5107959B2 (ja) * 2009-04-09 2012-12-26 ルネサスエレクトロニクス株式会社 基板
KR101070167B1 (ko) * 2009-08-19 2011-10-07 세미텍 주식회사 복합 듀얼 방식 ｑｆｎ 패키지 및 이의 생성 방법
JP5342422B2 (ja) * 2009-12-10 2013-11-13 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US8553420B2 (en) 2010-10-19 2013-10-08 Tessera, Inc. Enhanced stacked microelectronic assemblies with central contacts and improved thermal characteristics
US8928153B2 (en) * 2011-04-21 2015-01-06 Tessera, Inc. Flip-chip, face-up and face-down centerbond memory wirebond assemblies
US8970028B2 (en) 2011-12-29 2015-03-03 Invensas Corporation Embedded heat spreader for package with multiple microelectronic elements and face-down connection
US8952516B2 (en) 2011-04-21 2015-02-10 Tessera, Inc. Multiple die stacking for two or more die
US9013033B2 (en) 2011-04-21 2015-04-21 Tessera, Inc. Multiple die face-down stacking for two or more die
US8304881B1 (en) * 2011-04-21 2012-11-06 Tessera, Inc. Flip-chip, face-up and face-down wirebond combination package
US8633576B2 (en) 2011-04-21 2014-01-21 Tessera, Inc. Stacked chip-on-board module with edge connector
KR101739945B1 (ko) * 2011-05-02 2017-06-09 삼성전자주식회사 반도체 패키지 및 이를 제조하는 방법
US8519535B2 (en) * 2011-05-11 2013-08-27 Taiwan Semiconductor Manufacturing Co., Ltd. Method and structure for controlling package warpage
US9368477B2 (en) * 2012-08-27 2016-06-14 Invensas Corporation Co-support circuit panel and microelectronic packages
JP6058336B2 (ja) 2012-09-28 2017-01-11 ルネサスエレクトロニクス株式会社 半導体装置
KR102190382B1 (ko) 2012-12-20 2020-12-11 삼성전자주식회사 반도체 패키지
US9362187B2 (en) * 2013-01-18 2016-06-07 Infineon Technologies Ag Chip package having terminal pads of different form factors
CN109637995B (zh) * 2013-09-03 2022-11-22 日月光半导体制造股份有限公司 基板结构、封装结构及其制造方法
KR20150026644A (ko) * 2013-09-03 2015-03-11 에스케이하이닉스 주식회사 반도체칩, 반도체칩 패키지 및 이를 포함하는 반도체시스템
KR20150072846A (ko) * 2013-12-20 2015-06-30 삼성전기주식회사 반도체 패키지 모듈
KR20170009652A (ko) * 2015-07-17 2017-01-25 삼성전자주식회사 배선 기판 및 이를 포함하는 메모리 시스템
KR102371893B1 (ko) * 2017-05-18 2022-03-08 삼성전자주식회사 반도체 메모리 칩, 반도체 메모리 패키지, 및 이를 이용한 전자 시스템
WO2020180341A1 (en) * 2019-03-06 2020-09-10 Ttm Technologies, Inc. Methods for fabricating printed circuit board assemblies with high density via array

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JP2571023B2 (ja) * 1994-09-01 1997-01-16 日本電気株式会社 Ｂｇａ型半導体装置
US5696031A (en) * 1996-11-20 1997-12-09 Micron Technology, Inc. Device and method for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice
JP2907127B2 (ja) * 1996-06-25 1999-06-21 日本電気株式会社 マルチチップモジュール
JP3481444B2 (ja) * 1998-01-14 2003-12-22 シャープ株式会社 半導体装置及びその製造方法
JP2000058709A (ja) * 1998-08-17 2000-02-25 Nec Corp 突起電極構造および突起電極形成方法
JP3512657B2 (ja) * 1998-12-22 2004-03-31 シャープ株式会社 半導体装置
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US6294839B1 (en) * 1999-08-30 2001-09-25 Micron Technology, Inc. Apparatus and methods of packaging and testing die
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JP4790157B2 (ja) * 2001-06-07 2011-10-12 ルネサスエレクトロニクス株式会社 半導体装置
CN101303984B (zh) * 2001-06-07 2012-02-15 瑞萨电子株式会社 半导体装置的制造方法
US7332819B2 (en) * 2002-01-09 2008-02-19 Micron Technology, Inc. Stacked die in die BGA package
TWI268581B (en) * 2002-01-25 2006-12-11 Advanced Semiconductor Eng Stack type flip-chip package including a substrate board, a first chip, a second chip, multiple conductive wire, an underfill, and a packaging material
JP2003318361A (ja) * 2002-04-19 2003-11-07 Fujitsu Ltd 半導体装置及びその製造方法
JP2003332501A (ja) * 2002-05-10 2003-11-21 Konica Minolta Holdings Inc 半導体装置の製造方法及び半導体装置の実装方法
TW546794B (en) * 2002-05-17 2003-08-11 Advanced Semiconductor Eng Multichip wafer-level package and method for manufacturing the same
JP2004022664A (ja) 2002-06-13 2004-01-22 Matsushita Electric Ind Co Ltd 半導体装置のパッケージおよび検査回路
JP2004053276A (ja) * 2002-07-16 2004-02-19 Fujitsu Ltd 半導体装置および半導体集積回路
US20040036170A1 (en) * 2002-08-20 2004-02-26 Lee Teck Kheng Double bumping of flexible substrate for first and second level interconnects
JP2004179442A (ja) * 2002-11-28 2004-06-24 Renesas Technology Corp マルチチップモジュール
JP2004342988A (ja) * 2003-05-19 2004-12-02 Shinko Electric Ind Co Ltd 半導体パッケージの製造方法、及び半導体装置の製造方法
TWI245381B (en) * 2003-08-14 2005-12-11 Via Tech Inc Electrical package and process thereof
US20050173807A1 (en) * 2004-02-05 2005-08-11 Jianbai Zhu High density vertically stacked semiconductor device
US8476735B2 (en) * 2007-05-29 2013-07-02 Taiwan Semiconductor Manufacturing Company, Ltd. Programmable semiconductor interposer for electronic package and method of forming

Also Published As

Publication number Publication date
US20080083978A1 (en) 2008-04-10
US7652368B2 (en) 2010-01-26
JP2006093189A (ja) 2006-04-06
US7323773B2 (en) 2008-01-29
US20060060959A1 (en) 2006-03-23

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