JP4583529B2 - 半導体装置およびその作製方法 - Google Patents
半導体装置およびその作製方法 Download PDFInfo
- Publication number
- JP4583529B2 JP4583529B2 JP31771499A JP31771499A JP4583529B2 JP 4583529 B2 JP4583529 B2 JP 4583529B2 JP 31771499 A JP31771499 A JP 31771499A JP 31771499 A JP31771499 A JP 31771499A JP 4583529 B2 JP4583529 B2 JP 4583529B2
- Authority
- JP
- Japan
- Prior art keywords
- conductive layer
- layer
- region
- film
- pair
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/441—Interconnections, e.g. scanning lines
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
Landscapes
- Liquid Crystal (AREA)
- Electroluminescent Light Sources (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Thin Film Transistor (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP31771499A JP4583529B2 (ja) | 1998-11-09 | 1999-11-09 | 半導体装置およびその作製方法 |
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10-318197 | 1998-11-09 | ||
JP31819798 | 1998-11-09 | ||
JP34489398 | 1998-11-17 | ||
JP10-344893 | 1998-11-17 | ||
JP31771499A JP4583529B2 (ja) | 1998-11-09 | 1999-11-09 | 半導体装置およびその作製方法 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2000216396A JP2000216396A (ja) | 2000-08-04 |
JP2000216396A5 JP2000216396A5 (enrdf_load_stackoverflow) | 2006-12-07 |
JP4583529B2 true JP4583529B2 (ja) | 2010-11-17 |
Family
ID=27339609
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP31771499A Expired - Fee Related JP4583529B2 (ja) | 1998-11-09 | 1999-11-09 | 半導体装置およびその作製方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4583529B2 (enrdf_load_stackoverflow) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2021030038A1 (en) * | 2019-08-09 | 2021-02-18 | Micron Technology, Inc. | Transistor and methods of forming integrated circuitry |
US10964811B2 (en) | 2019-08-09 | 2021-03-30 | Micron Technology, Inc. | Transistor and methods of forming transistors |
US11417730B2 (en) | 2019-08-09 | 2022-08-16 | Micron Technology, Inc. | Vertical transistors with channel region having vertically elongated crystal grains that individually are directly against both of the top and bottom source/drain regions |
US11637175B2 (en) | 2020-12-09 | 2023-04-25 | Micron Technology, Inc. | Vertical transistors |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3403115B2 (ja) | 1999-04-02 | 2003-05-06 | シャープ株式会社 | 半導体装置の製造方法 |
JP2001257350A (ja) | 2000-03-08 | 2001-09-21 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
US6739931B2 (en) | 2000-09-18 | 2004-05-25 | Semiconductor Energy Laboratory Co., Ltd. | Display device and method of fabricating the display device |
CN100481159C (zh) * | 2000-09-29 | 2009-04-22 | 三洋电机株式会社 | 半导体器件以及显示装置 |
JP5046452B2 (ja) | 2000-10-26 | 2012-10-10 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
JP4954366B2 (ja) | 2000-11-28 | 2012-06-13 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
JP4780830B2 (ja) * | 2000-11-28 | 2011-09-28 | 株式会社半導体エネルギー研究所 | 電気光学装置およびその作製方法 |
JP4593256B2 (ja) * | 2001-02-28 | 2010-12-08 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
SG160191A1 (en) | 2001-02-28 | 2010-04-29 | Semiconductor Energy Lab | Semiconductor device and manufacturing method thereof |
JP4079655B2 (ja) * | 2001-02-28 | 2008-04-23 | 株式会社半導体エネルギー研究所 | 半導体装置およびその作製方法 |
JP4831885B2 (ja) | 2001-04-27 | 2011-12-07 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
JP4402396B2 (ja) * | 2003-08-07 | 2010-01-20 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
KR101086487B1 (ko) * | 2004-12-24 | 2011-11-25 | 엘지디스플레이 주식회사 | 폴리 박막 트랜지스터 기판 및 그 제조 방법 |
JP2007134730A (ja) * | 2006-12-01 | 2007-05-31 | Semiconductor Energy Lab Co Ltd | 表示装置 |
KR102580063B1 (ko) * | 2016-07-21 | 2023-09-19 | 삼성디스플레이 주식회사 | 표시 장치 및 이의 제조 방법 |
JP6412181B2 (ja) * | 2017-02-22 | 2018-10-24 | 株式会社半導体エネルギー研究所 | 半導体装置 |
US12089444B2 (en) | 2019-02-27 | 2024-09-10 | Sharp Kabushiki Kaisha | Display device and method for manufacturing same |
CN112701045B (zh) * | 2020-12-29 | 2023-07-18 | 北京大学深圳研究生院 | 双栅薄膜晶体管的结构及制造方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3452981B2 (ja) * | 1994-04-29 | 2003-10-06 | 株式会社半導体エネルギー研究所 | 半導体集積回路およびその作製方法 |
JP3762002B2 (ja) * | 1996-11-29 | 2006-03-29 | 株式会社東芝 | 薄膜トランジスタ、及び液晶表示装置 |
JPH1139241A (ja) * | 1997-07-18 | 1999-02-12 | Nec Corp | 通信制御構成情報転送方式 |
-
1999
- 1999-11-09 JP JP31771499A patent/JP4583529B2/ja not_active Expired - Fee Related
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2021030038A1 (en) * | 2019-08-09 | 2021-02-18 | Micron Technology, Inc. | Transistor and methods of forming integrated circuitry |
US10964811B2 (en) | 2019-08-09 | 2021-03-30 | Micron Technology, Inc. | Transistor and methods of forming transistors |
US11024736B2 (en) | 2019-08-09 | 2021-06-01 | Micron Technology, Inc. | Transistor and methods of forming integrated circuitry |
US11417730B2 (en) | 2019-08-09 | 2022-08-16 | Micron Technology, Inc. | Vertical transistors with channel region having vertically elongated crystal grains that individually are directly against both of the top and bottom source/drain regions |
US11688808B2 (en) | 2019-08-09 | 2023-06-27 | Micron Technology, Inc. | Transistor and methods of forming integrated circuitry |
US11637175B2 (en) | 2020-12-09 | 2023-04-25 | Micron Technology, Inc. | Vertical transistors |
Also Published As
Publication number | Publication date |
---|---|
JP2000216396A (ja) | 2000-08-04 |
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