JP4577250B2 - バリスタ及び発光装置 - Google Patents
バリスタ及び発光装置 Download PDFInfo
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- JP4577250B2 JP4577250B2 JP2006085941A JP2006085941A JP4577250B2 JP 4577250 B2 JP4577250 B2 JP 4577250B2 JP 2006085941 A JP2006085941 A JP 2006085941A JP 2006085941 A JP2006085941 A JP 2006085941A JP 4577250 B2 JP4577250 B2 JP 4577250B2
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- JP
- Japan
- Prior art keywords
- metal conductor
- element body
- varistor
- body portion
- external electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/10—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
- H01C7/102—Varistor boundary, e.g. surface layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
- H01C1/142—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals or tapping points being coated on the resistive element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/061—Disposition
- H01L2224/06102—Disposition the bonding areas being at different heights
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
- H01L2224/1701—Structure
- H01L2224/1703—Bump connectors having different sizes, e.g. different diameters, heights or widths
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Thermistors And Varistors (AREA)
- Led Devices (AREA)
- Led Device Packages (AREA)
- Semiconductor Memories (AREA)
Description
図6を参照して、第1変形例に係るバリスタV2について説明する。図6は、本実施形態の第1変形例に係るバリスタの断面構成を示す模式図である。第1変形例に係るバリスタV2と上記実施形態に係るバリスタV1との相違点は、バリスタV2が第3の素体部分25を含んでいない点である。
図7を参照して、第2変形例に係るバリスタV3について説明する。図7は、本実施形態の第2変形例に係るバリスタの断面構成を示す模式図である。第2変形例に係るバリスタV3と上記実施形態に係るバリスタV1との主な相違点は、バリスタV3が第2の素体部分23及び第3の素体部分25を含んでいない点である。
図8を参照して、第3変形例に係るバリスタV4について説明する。図8は、本実施形態の第3変形例に係るバリスタを示す概略斜視図である。第3変形例に係るバリスタV4と上記実施形態に係るバリスタV1との主な相違点は、素体の構成である。
Claims (8)
- 動作中に熱を発する電子素子が物理的且つ電気的に接続される六面体状のバリスタであって、
互いに対向する第1の面と第2の面とを有する部分を含み、複数のバリスタ層を積層することによって構成された素体と、
前記素体の前記第1の面に配置された2つの外部電極と、
前記素体より熱伝導率が高く前記素体の前記第2の面に配置された金属導体と、
を備え、
前記素体において少なくとも前記2つの外部電極と前記金属導体との間の領域が電圧非直線特性を発現し、
前記金属導体は、前記素体の前記第2の面に接する第1の面と、当該第1の面に対向する第2の面と、当該第1及び第2の面の間を連結するように伸びる第3の面とを有すると共に、一部が前記素体から露出し、
前記素体は、当該素体の前記第1及び前記第2の面を有する前記部分に連続すると共に前記金属導体の前記第3の面に接するように形成された部分を更に含み、
前記金属導体における前記金属導体と前記2つの外部電極とが対向する方向の厚みは、前記素体における前記2つの外部電極と前記金属導体との間の厚み以上であることを特徴とするバリスタ。 - 前記金属導体の前記第2の面が露出していることを特徴とする請求項1記載のバリスタ。
- 前記素体は、前記金属導体の前記第3の面に接するように形成された前記部分に連続すると共に前記金属導体の前記第2の面に接するように形成された部分を更に含むことを特徴とする請求項1に記載のバリスタ。
- 前記金属導体の前記第3の面の一部が露出することを特徴とする請求項3記載のバリスタ。
- 前記金属導体を通り前記金属導体と前記2つの外部電極とが対向する方向に垂直な断面において、前記金属導体と前記素体との合計面積を100%とした場合における前記金属導体の面積の割合は、20%以上99.7%以下であることを特徴とする請求項1〜4のいずれか1項に記載のバリスタ。
- 前記素体における前記2つの外部電極と前記金属導体との間の厚み寸法は、10μm以上200μm以下であることを特徴とする請求項1〜5のいずれか1項に記載のバリスタ。
- 前記素体と前記金属導体との合計体積を100%とした場合における前記金属導体の体積の割合は、10%以上99.7%以下であることを特徴とする請求項1〜6のいずれか1項に記載のバリスタ。
- 請求項1〜4のいずれか1項に記載のバリスタと、
前記バリスタに並列接続されるように前記2つの外部電極に物理的且つ電気的に接続された半導体発光素子と、
を備えることを特徴とする発光装置。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006085941A JP4577250B2 (ja) | 2006-03-27 | 2006-03-27 | バリスタ及び発光装置 |
US11/717,098 US7791449B2 (en) | 2006-03-27 | 2007-03-13 | Varistor and light-emitting apparatus |
DE102007013600A DE102007013600A1 (de) | 2006-03-27 | 2007-03-21 | Varistor und Licht emittierende Vorrichtung |
CN2007100915250A CN101047054B (zh) | 2006-03-27 | 2007-03-27 | 可变电阻和发光装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006085941A JP4577250B2 (ja) | 2006-03-27 | 2006-03-27 | バリスタ及び発光装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007266097A JP2007266097A (ja) | 2007-10-11 |
JP4577250B2 true JP4577250B2 (ja) | 2010-11-10 |
Family
ID=38514811
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006085941A Expired - Fee Related JP4577250B2 (ja) | 2006-03-27 | 2006-03-27 | バリスタ及び発光装置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7791449B2 (ja) |
JP (1) | JP4577250B2 (ja) |
CN (1) | CN101047054B (ja) |
DE (1) | DE102007013600A1 (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW200849395A (en) * | 2007-06-01 | 2008-12-16 | Univ Chang Gung | Thin-film ZnO varistor and manufacturing method and application thereof |
JP5233400B2 (ja) * | 2008-05-13 | 2013-07-10 | Tdk株式会社 | バリスタ |
USD847102S1 (en) * | 2013-02-08 | 2019-04-30 | Epistar Corporation | Light emitting diode |
USD778847S1 (en) * | 2014-12-15 | 2017-02-14 | Kingbright Electronics Co. Ltd. | LED component |
USD778846S1 (en) * | 2014-12-15 | 2017-02-14 | Kingbright Electronics Co. Ltd. | LED component |
JP7363585B2 (ja) * | 2020-03-04 | 2023-10-18 | Tdk株式会社 | 積層コイル部品 |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS595601A (ja) * | 1982-07-01 | 1984-01-12 | 松下電器産業株式会社 | 多電極電圧非直線抵抗器 |
JPS60260104A (ja) * | 1984-06-06 | 1985-12-23 | 日本電気株式会社 | 発熱体の実装構造 |
JPS61164002U (ja) * | 1985-03-29 | 1986-10-11 | ||
JPH05299209A (ja) * | 1992-04-16 | 1993-11-12 | Murata Mfg Co Ltd | 薄膜バリスタの製造方法及び薄膜バリスタ |
JP2001015815A (ja) * | 1999-04-28 | 2001-01-19 | Sanken Electric Co Ltd | 半導体発光装置 |
JP2004006519A (ja) * | 2002-05-31 | 2004-01-08 | Otowa Denki Kogyo Kk | 多端子バリスタ |
JP2005203479A (ja) * | 2004-01-14 | 2005-07-28 | Matsushita Electric Ind Co Ltd | 静電気対策部品 |
JP2005244220A (ja) * | 2004-02-25 | 2005-09-08 | Lumileds Lighting Us Llc | 基体にesd保護を組み入れた発光ダイオード用基体 |
JP2005340301A (ja) * | 2004-05-24 | 2005-12-08 | Tdk Corp | 電圧依存性非直線抵抗体 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3768058A (en) * | 1971-07-22 | 1973-10-23 | Gen Electric | Metal oxide varistor with laterally spaced electrodes |
US4400683A (en) * | 1981-09-18 | 1983-08-23 | Matsushita Electric Industrial Co., Ltd. | Voltage-dependent resistor |
JPS6466908A (en) * | 1987-09-07 | 1989-03-13 | Murata Manufacturing Co | Voltage-dependent nonlinear resistor |
JPH02302004A (ja) | 1989-05-16 | 1990-12-14 | Murata Mfg Co Ltd | 電圧非直線抵抗体 |
JPH05275958A (ja) * | 1992-03-25 | 1993-10-22 | Murata Mfg Co Ltd | ノイズフィルタ |
JP3631341B2 (ja) * | 1996-10-18 | 2005-03-23 | Tdk株式会社 | 積層型複合機能素子およびその製造方法 |
US6304166B1 (en) * | 1999-09-22 | 2001-10-16 | Harris Ireland Development Company, Ltd. | Low profile mount for metal oxide varistor package and method |
JP3822798B2 (ja) | 2001-02-16 | 2006-09-20 | 太陽誘電株式会社 | 電圧非直線抵抗体及び磁器組成物 |
-
2006
- 2006-03-27 JP JP2006085941A patent/JP4577250B2/ja not_active Expired - Fee Related
-
2007
- 2007-03-13 US US11/717,098 patent/US7791449B2/en not_active Expired - Fee Related
- 2007-03-21 DE DE102007013600A patent/DE102007013600A1/de not_active Withdrawn
- 2007-03-27 CN CN2007100915250A patent/CN101047054B/zh not_active Expired - Fee Related
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS595601A (ja) * | 1982-07-01 | 1984-01-12 | 松下電器産業株式会社 | 多電極電圧非直線抵抗器 |
JPS60260104A (ja) * | 1984-06-06 | 1985-12-23 | 日本電気株式会社 | 発熱体の実装構造 |
JPS61164002U (ja) * | 1985-03-29 | 1986-10-11 | ||
JPH05299209A (ja) * | 1992-04-16 | 1993-11-12 | Murata Mfg Co Ltd | 薄膜バリスタの製造方法及び薄膜バリスタ |
JP2001015815A (ja) * | 1999-04-28 | 2001-01-19 | Sanken Electric Co Ltd | 半導体発光装置 |
JP2004006519A (ja) * | 2002-05-31 | 2004-01-08 | Otowa Denki Kogyo Kk | 多端子バリスタ |
JP2005203479A (ja) * | 2004-01-14 | 2005-07-28 | Matsushita Electric Ind Co Ltd | 静電気対策部品 |
JP2005244220A (ja) * | 2004-02-25 | 2005-09-08 | Lumileds Lighting Us Llc | 基体にesd保護を組み入れた発光ダイオード用基体 |
JP2005340301A (ja) * | 2004-05-24 | 2005-12-08 | Tdk Corp | 電圧依存性非直線抵抗体 |
Also Published As
Publication number | Publication date |
---|---|
US7791449B2 (en) | 2010-09-07 |
JP2007266097A (ja) | 2007-10-11 |
US20070223170A1 (en) | 2007-09-27 |
CN101047054A (zh) | 2007-10-03 |
DE102007013600A1 (de) | 2007-10-18 |
CN101047054B (zh) | 2010-05-26 |
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