JP4531562B2 - フィルタ係数用のランダムアクセスメモリのための自動的なバンク切り替えを検出及び実行する方法及び装置 - Google Patents
フィルタ係数用のランダムアクセスメモリのための自動的なバンク切り替えを検出及び実行する方法及び装置 Download PDFInfo
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- JP4531562B2 JP4531562B2 JP2004517786A JP2004517786A JP4531562B2 JP 4531562 B2 JP4531562 B2 JP 4531562B2 JP 2004517786 A JP2004517786 A JP 2004517786A JP 2004517786 A JP2004517786 A JP 2004517786A JP 4531562 B2 JP4531562 B2 JP 4531562B2
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- Prior art keywords
- video
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- data
- bank
- filter coefficients
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/64—Circuits for processing colour signals
- H04N9/642—Multi-standard receivers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/435—Processing of additional data, e.g. decrypting of additional data, reconstructing software from modules extracted from the transport stream
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/443—OS processes, e.g. booting an STB, implementing a Java virtual machine in an STB or power management in an STB
- H04N21/4435—Memory management
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
- H04N5/21—Circuitry for suppressing or minimising disturbance, e.g. moiré or halo
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/46—Receiver circuitry for the reception of television signals according to analogue transmission standards for receiving on more than one standard at will
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/41—Structure of client; Structure of client peripherals
- H04N21/426—Internal components of the client ; Characteristics thereof
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Software Systems (AREA)
- Television Systems (AREA)
- Compression Or Coding Systems Of Tv Signals (AREA)
- Television Signal Processing For Recording (AREA)
Description
Claims (11)
- ビデオ信号処理装置でメモリを管理する方法であって、
第一のメモリに記憶されている第一のビデオフィルタ係数のバンクを使用してビデオ信号を処理するステップと、
前記ビデオ信号のビデオ表示フォーマットにおける変化を検出するステップと、
前記ビデオ表示フォーマットにおける前記変化に応答して、第二のビデオフィルタ係数のバンクに対応するビデオフィルタ係数のデータを第二のメモリに書き込むステップと、
前記第一のメモリと前記第二のメモリとをディスエーブルにするステップと、
前記書き込むステップ及びビデオ帰線消去期間に応答して前記第一のメモリから前記第二のメモリに出力を切り替えるステップと、
前記第一のメモリと前記第二のメモリとをイネーブルにするステップと、
前記第二のビデオフィルタ係数のバンクを使用して前記ビデオ信号を処理するステップと、
を含むメモリ管理方法。 - 前記ビデオ帰線消去期間は、垂直ビデオ帰線消去期間である、
請求項1記載のメモリ管理方法。 - 前記出力はビデオフィルタに接続される、
請求項1記載のメモリ管理方法。 - 前記第一のメモリと前記第二のメモリは、ビデオフィルタの係数データを記憶する、
請求項3記載のメモリ管理方法。 - 前記第一のメモリと前記第二のメモリをディスエーブルにするステップは、前記第一のメモリと前記第二のメモリの読取り及び書き込み機能をディスエーブルにするステップを含む、
請求項1記載のメモリ管理方法。 - 前記ビデオ信号の前記ビデオ表示フォーマットにおける変化を検出するステップと、
前記第一のメモリにビデオフィルタ係数のバンクの位置を示す少なくとも1つのアドレスを書き込むステップと、
を更に含む請求項1記載のメモリ管理方法。 - 複数のビデオフィルタの係数のうちの1つを選択する装置であって、
第一のビデオフィルタ係数のバンクに対応する第一の組のビデオフィルタのデータを記憶する第一のメモリと、
第二のビデオフィルタ係数のバンクに対応する第二の組のビデオフィルタのデータを記憶する第二のメモリと、
前記第一の組のビデオフィルタのデータを使用してビデオ信号を処理するプロセッサであって、前記ビデオ信号のビデオ表示フォーマットの変化を検出し、前記ビデオ表示フォーマットにおける前記変化に応答して前記第二の組のビデオフィルタのデータを前記第二のメモリに書込み、前記第二の組のビデオフィルタデータを使用して前記ビデオ信号を処理するプロセッサと、
前記第一のメモリと前記第二のメモリのいずれかを選択し、選択されたメモリを前記プロセッサに結合するスイッチと、
前記プロセッサによる前記第二の組のビデオフィルタのデータを書き込みを検出し、前記ビデオ信号のビデオ帰線消去期間を検出し、前記ビデオフィルタのデータの書込みの検出と該書き込みに続く前記ビデオ帰線消去期間の検出に応答して前記スイッチの状態を変えるバンク切り替え装置と、
を備える装置。 - 前記ビデオ帰線消去期間は、垂直ビデオ帰線消去期間である、
請求項7記載の装置。 - 前記第一の組のビデオフィルタデータと前記第二の組のビデオフィルタデータは、複数のビデオフィルタの係数である、
請求項7記載の装置。 - 前記スイッチはマルチプレクサである、
請求項7記載の装置。 - 当該装置は集積回路内に含まれる、
請求項7記載の装置。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US39229302P | 2002-06-27 | 2002-06-27 | |
PCT/US2003/019940 WO2004004318A1 (en) | 2002-06-27 | 2003-06-26 | Method and system for detecting and performing automatic bank switching for a filter coefficient ram |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2005531087A JP2005531087A (ja) | 2005-10-13 |
JP2005531087A5 JP2005531087A5 (ja) | 2006-08-10 |
JP4531562B2 true JP4531562B2 (ja) | 2010-08-25 |
Family
ID=30000838
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004517786A Expired - Fee Related JP4531562B2 (ja) | 2002-06-27 | 2003-06-26 | フィルタ係数用のランダムアクセスメモリのための自動的なバンク切り替えを検出及び実行する方法及び装置 |
Country Status (8)
Country | Link |
---|---|
US (1) | US7567296B2 (ja) |
EP (1) | EP1532810A1 (ja) |
JP (1) | JP4531562B2 (ja) |
KR (1) | KR100966912B1 (ja) |
CN (1) | CN1666500A (ja) |
AU (1) | AU2003253693A1 (ja) |
MX (1) | MXPA04013004A (ja) |
WO (1) | WO2004004318A1 (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7260369B2 (en) * | 2005-08-03 | 2007-08-21 | Kamilo Feher | Location finder, tracker, communication and remote control system |
US8365238B2 (en) | 2006-01-06 | 2013-01-29 | Amimon Ltd | Method and apparatus for using the video blanking period for the maintenance of a modem that is used for wireless transmission of video |
WO2011104582A1 (en) | 2010-02-25 | 2011-09-01 | Nokia Corporation | Apparatus, display module and methods for controlling the loading of frames to a display module |
CN103164166A (zh) * | 2011-12-13 | 2013-06-19 | 深圳市天方信安电子科技有限公司 | 一种通过记忆锁存的开关切换不同数据储存器的方法 |
JP6489203B2 (ja) * | 2015-03-02 | 2019-03-27 | 日本電気株式会社 | 受信機器、および復号・提示方法 |
US10194196B2 (en) | 2015-03-02 | 2019-01-29 | Nec Corporation | Decoding device, reception device, transmission device, transmission/reception system, decoding method, and storage medium having decoding program stored therein |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE69031865T2 (de) * | 1990-02-28 | 1998-08-06 | Texas Instruments Inc | Ein SIMD-Prozessor als digitales Filter |
KR950012664B1 (ko) * | 1993-08-18 | 1995-10-19 | 엘지전자주식회사 | 1050라인 비월주사식 모니터 디스플레이 영상포맷을 갖는 에치디티브이(hdtv)수신장치 |
US5883676A (en) * | 1994-11-28 | 1999-03-16 | Sanyo Electric Company, Ltd. | Image signal outputting apparatus |
JPH08250978A (ja) * | 1995-03-07 | 1996-09-27 | Mitsubishi Electric Corp | 音声用フィルタ装置 |
US6404458B1 (en) * | 1995-06-28 | 2002-06-11 | Lg Electronics Inc. | Apparatus for converting screen aspect ratio |
GB2307127B (en) * | 1995-11-09 | 2000-01-26 | Sony Uk Ltd | Controlling signal processing |
JP3119161B2 (ja) * | 1996-05-20 | 2000-12-18 | ヤマハ株式会社 | 音楽演奏装置 |
JP3617573B2 (ja) * | 1996-05-27 | 2005-02-09 | 三菱電機株式会社 | フォーマット変換回路並びに該フォーマット変換回路を備えたテレビジョン受像機 |
JP3085242B2 (ja) * | 1997-04-30 | 2000-09-04 | 日本電気株式会社 | ビデオデータ転送方式 |
JP3564961B2 (ja) * | 1997-08-21 | 2004-09-15 | 株式会社日立製作所 | ディジタル放送受信装置 |
US6313882B1 (en) * | 1998-01-13 | 2001-11-06 | Samsung Electronics Co., Ltd. | TV reception apparatus using same ghost-cancellation circuitry for receiving different types of TV signals |
DE19829289C2 (de) * | 1998-06-30 | 2001-12-06 | Siemens Ag | Verfahren zur Berechnung der Koeffizienten eines nichtrekursiven digitalen Filters |
US6411334B1 (en) * | 1999-03-05 | 2002-06-25 | Teralogic, Inc. | Aspect ratio correction using digital filtering |
JP4457276B2 (ja) * | 2000-04-13 | 2010-04-28 | ソニー株式会社 | 画像処理装置および画像処理方法、並びに記録媒体 |
US6411253B1 (en) | 2000-06-14 | 2002-06-25 | Raytheon Company | Equalization system using general purpose filter architecture |
US6963890B2 (en) * | 2001-05-31 | 2005-11-08 | Koninklijke Philips Electronics N.V. | Reconfigurable digital filter having multiple filtering modes |
-
2003
- 2003-06-26 AU AU2003253693A patent/AU2003253693A1/en not_active Abandoned
- 2003-06-26 WO PCT/US2003/019940 patent/WO2004004318A1/en active Application Filing
- 2003-06-26 CN CN038151111A patent/CN1666500A/zh active Pending
- 2003-06-26 MX MXPA04013004A patent/MXPA04013004A/es active IP Right Grant
- 2003-06-26 US US10/519,028 patent/US7567296B2/en not_active Expired - Fee Related
- 2003-06-26 KR KR1020047021260A patent/KR100966912B1/ko active IP Right Grant
- 2003-06-26 EP EP03762015A patent/EP1532810A1/en not_active Ceased
- 2003-06-26 JP JP2004517786A patent/JP4531562B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN1666500A (zh) | 2005-09-07 |
KR100966912B1 (ko) | 2010-06-30 |
WO2004004318A1 (en) | 2004-01-08 |
MXPA04013004A (es) | 2005-09-12 |
US7567296B2 (en) | 2009-07-28 |
JP2005531087A (ja) | 2005-10-13 |
US20050237430A1 (en) | 2005-10-27 |
KR20050013254A (ko) | 2005-02-03 |
EP1532810A1 (en) | 2005-05-25 |
AU2003253693A1 (en) | 2004-01-19 |
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