JP4478053B2 - 半導体ウエーハ処理方法 - Google Patents
半導体ウエーハ処理方法 Download PDFInfo
- Publication number
- JP4478053B2 JP4478053B2 JP2005095196A JP2005095196A JP4478053B2 JP 4478053 B2 JP4478053 B2 JP 4478053B2 JP 2005095196 A JP2005095196 A JP 2005095196A JP 2005095196 A JP2005095196 A JP 2005095196A JP 4478053 B2 JP4478053 B2 JP 4478053B2
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P54/00—Cutting or separating of wafers, substrates or parts of devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/7402—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/011—Apparatus therefor
- H10W72/0113—Apparatus for manufacturing die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/7416—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/7422—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
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- Dicing (AREA)
- Die Bonding (AREA)
Description
分断された該ストリートに沿って該粘着テープを分断するのに先立って、分断された該ストリートの状態を検出することを含み、分断された該ストリートの状態の検出は、分断された該ストリートにおいて、該ストリートの延在方向に間隔をおいた少なくとも3点のxy座標位置を検出し、該3点の座標位置に基づいて最小二乗法によって一次関数直線を算出して該一次関数直線の傾斜角度を算出し、そして更に該一次関数直線をx軸方向に平行に延びる状態とした時の該一次関数直線に関する該3点のy軸方向変位量を算出することを含み、
該粘着テープの分断は、該一次関数直線の片端と該3点のうちの該片端に最も近い点とを結ぶ直線に沿って該粘着テープにレーザ光線を照射して該粘着テープを分断し、次いで該最も近い点と該3点のうちの該片端に2番目に近い点とを結ぶ直線に沿ってレーザ光線を照射して該粘着テープを分断し、しかる後に該2番目に近い点と該片端に3番目に近い点とを結ぶ直線に沿ってレーザ光線を照射して該粘着テープを分断し、次いで該3番目に近い点と該一次関数直線の他端とを結ぶ直線に沿ってレーザ光線を照射して該粘着テープを分断することを含む、
ことを特徴とする半導体ウエーハ処理方法が提供される。
γ1=x1sinθ−y1cosθ+b′
γ2=x2sinθ−y2cosθ+b′
γ3=x3sinθ−y3cosθ+b′
ここでb′=bcosθである
を算出する。
y′=(γ1/L1)×x
に応じてy軸方向に補正してレーザ光線を相対的に移動せしめてレーザ光線を照射する。次いで、領域L2においては、点P1と点P2(3点のうち一次関数直線の片端に2番目に近い点)を結ぶ直線に沿って、従ってx軸方向の進行に対応して下記式
y′=(γ2−γ1)/L2)×x+γ1
に応じてy軸方向に補正してレーザ光線を相対的に移動せしめてレーザ光線を照射する。更に、領域L3においては、点P2と点P3(3点のうち一次関数直線の片端に3番目に近い点)を結ぶ直線に沿って、従ってx軸方向の進行に対応して下記式
y′=(γ3−γ2)/L3)×x+γ2
に応じてy軸方向に補正してレーザ光線を相対的に移動せしめてレーザ光線を照射する。次いで、領域L4においては、点P3と一次関数直線y=ax+bの他端とを結ぶ直線に沿って、従ってx軸方向の進行に対応して下記式
y′=(−γ3/L4)×x+γ3
に応じてy軸方向に補正してレーザ光線を相対的に移動せしめてレーザ光線を照射する。
6:ウエーハの表面
8:ストリート
10:矩形領域
12:溝
14:保護テープ
16:ウエーハの裏面
18:粘着テープ
Claims (2)
- 表面には格子状に配列されたストリートによって複数個の矩形領域が区画されているウエーハを、該ストリートに沿って分断すると共に、該ウエーハの裏面全体に渡って粘着テープを貼着し、しかる後に分断された該ストリートに沿って該粘着テープを分断する半導体ウエーハ処理方法において、
分断された該ストリートに沿って該粘着テープを分断するのに先立って、分断された該ストリートの状態を検出することを含み、分断された該ストリートの状態の検出は、分断された該ストリートにおいて、該ストリートの延在方向に間隔をおいた少なくとも3点のxy座標位置を検出し、該3点の座標位置に基づいて最小二乗法によって一次関数直線を算出して該一次関数直線の傾斜角度を算出し、そして更に該一次関数直線をx軸方向に平行に延びる状態とした時の該一次関数直線に関する該3点のy軸方向変位量を算出することを含み、
該粘着テープの分断は、該一次関数直線の片端と該3点のうちの該片端に最も近い点とを結ぶ直線に沿って該粘着テープにレーザ光線を照射して該粘着テープを分断し、次いで該最も近い点と該3点のうちの該片端に2番目に近い点とを結ぶ直線に沿ってレーザ光線を照射して該粘着テープを分断し、しかる後に該2番目に近い点と該片端に3番目に近い点とを結ぶ直線に沿ってレーザ光線を照射して該粘着テープを分断し、次いで該3番目に近い点と該一次関数直線の他端とを結ぶ直線に沿ってレーザ光線を照射して該粘着テープを分断することを含む、
ことを特徴とする半導体ウエーハ処理方法。 - 該ウエーハの表面に該ストリートに沿って所定深さdの溝を形成し、次いで該ウエーハの表面に保護テープを貼着し、しかる後に該ウエーハの裏面を研削して該ウエーハの厚さを該所定深さdと実質上同一にせしめ、かくして該ウエーハを該ストリートに沿って分断し、次いで該ウエーハの裏面に該粘着テープを貼着する、請求項1記載の半導体ウエーハ処理方法。
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005095196A JP4478053B2 (ja) | 2005-03-29 | 2005-03-29 | 半導体ウエーハ処理方法 |
| US11/390,339 US7468309B2 (en) | 2005-03-29 | 2006-03-28 | Semiconductor wafer treatment method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005095196A JP4478053B2 (ja) | 2005-03-29 | 2005-03-29 | 半導体ウエーハ処理方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2006278684A JP2006278684A (ja) | 2006-10-12 |
| JP4478053B2 true JP4478053B2 (ja) | 2010-06-09 |
Family
ID=37071110
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005095196A Expired - Lifetime JP4478053B2 (ja) | 2005-03-29 | 2005-03-29 | 半導体ウエーハ処理方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US7468309B2 (ja) |
| JP (1) | JP4478053B2 (ja) |
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| JP7051463B2 (ja) * | 2018-01-26 | 2022-04-11 | 株式会社ディスコ | 加工方法 |
| US10535561B2 (en) | 2018-03-12 | 2020-01-14 | Applied Materials, Inc. | Hybrid wafer dicing approach using a multiple pass laser scribing process and plasma etch process |
| US11355394B2 (en) | 2018-09-13 | 2022-06-07 | Applied Materials, Inc. | Wafer dicing using hybrid laser scribing and plasma etch approach with intermediate breakthrough treatment |
| US11011424B2 (en) | 2019-08-06 | 2021-05-18 | Applied Materials, Inc. | Hybrid wafer dicing approach using a spatially multi-focused laser beam laser scribing process and plasma etch process |
| US11342226B2 (en) | 2019-08-13 | 2022-05-24 | Applied Materials, Inc. | Hybrid wafer dicing approach using an actively-focused laser beam laser scribing process and plasma etch process |
| US10903121B1 (en) | 2019-08-14 | 2021-01-26 | Applied Materials, Inc. | Hybrid wafer dicing approach using a uniform rotating beam laser scribing process and plasma etch process |
| US11600492B2 (en) | 2019-12-10 | 2023-03-07 | Applied Materials, Inc. | Electrostatic chuck with reduced current leakage for hybrid laser scribing and plasma etch wafer singulation process |
| US11211247B2 (en) | 2020-01-30 | 2021-12-28 | Applied Materials, Inc. | Water soluble organic-inorganic hybrid mask formulations and their applications |
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| JP4640715B2 (ja) * | 2000-07-14 | 2011-03-02 | 株式会社ディスコ | アライメント方法及びアライメント装置 |
| JP4109823B2 (ja) | 2000-10-10 | 2008-07-02 | 株式会社東芝 | 半導体装置の製造方法 |
| JP2005019525A (ja) * | 2003-06-24 | 2005-01-20 | Disco Abrasive Syst Ltd | 半導体チップの製造方法 |
| US7390681B1 (en) * | 2007-01-12 | 2008-06-24 | Advanced Micro Devices, Inc. | Derived metric for monitoring die placement |
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| US7468309B2 (en) | 2008-12-23 |
| US20060223285A1 (en) | 2006-10-05 |
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