JP4461521B2 - サンプリングクロック生成回路 - Google Patents

サンプリングクロック生成回路 Download PDF

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Publication number
JP4461521B2
JP4461521B2 JP26558599A JP26558599A JP4461521B2 JP 4461521 B2 JP4461521 B2 JP 4461521B2 JP 26558599 A JP26558599 A JP 26558599A JP 26558599 A JP26558599 A JP 26558599A JP 4461521 B2 JP4461521 B2 JP 4461521B2
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JP
Japan
Prior art keywords
circuit
signal
output
sampling clock
chroma
Prior art date
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Expired - Fee Related
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JP26558599A
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English (en)
Japanese (ja)
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JP2001094821A (ja
JP2001094821A5 (enExample
Inventor
信夫 竹谷
宏 毛利部
久雄 森田
竜一 澁谷
仁 安藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
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Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP26558599A priority Critical patent/JP4461521B2/ja
Publication of JP2001094821A publication Critical patent/JP2001094821A/ja
Publication of JP2001094821A5 publication Critical patent/JP2001094821A5/ja
Application granted granted Critical
Publication of JP4461521B2 publication Critical patent/JP4461521B2/ja
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  • Synchronizing For Television (AREA)
  • Processing Of Color Television Signals (AREA)
  • Analogue/Digital Conversion (AREA)
JP26558599A 1999-09-20 1999-09-20 サンプリングクロック生成回路 Expired - Fee Related JP4461521B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26558599A JP4461521B2 (ja) 1999-09-20 1999-09-20 サンプリングクロック生成回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26558599A JP4461521B2 (ja) 1999-09-20 1999-09-20 サンプリングクロック生成回路

Publications (3)

Publication Number Publication Date
JP2001094821A JP2001094821A (ja) 2001-04-06
JP2001094821A5 JP2001094821A5 (enExample) 2006-11-02
JP4461521B2 true JP4461521B2 (ja) 2010-05-12

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ID=17419174

Family Applications (1)

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JP26558599A Expired - Fee Related JP4461521B2 (ja) 1999-09-20 1999-09-20 サンプリングクロック生成回路

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JP (1) JP4461521B2 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4656836B2 (ja) 2003-12-19 2011-03-23 パナソニック株式会社 同期クロック生成装置及び同期クロック生成方法
JP4509634B2 (ja) * 2004-04-15 2010-07-21 株式会社日立国際電気 同期信号発生回路及びこれを備えるカラーテレビジョンカメラ
JP4679872B2 (ja) * 2004-10-13 2011-05-11 パナソニック株式会社 クロック発生装置
KR102101835B1 (ko) * 2013-08-30 2020-04-20 삼성전자 주식회사 픽셀 클럭 발생기, 이를 포함하는 디지털 티브이, 및 픽셀 클럭 발생 방법

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Publication number Publication date
JP2001094821A (ja) 2001-04-06

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