JP4458307B2 - 半導体集積回路装置、半導体集積回路装置の実装構造および半導体集積回路装置の製造方法 - Google Patents
半導体集積回路装置、半導体集積回路装置の実装構造および半導体集積回路装置の製造方法 Download PDFInfo
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Description
11 半導体基板
12,12x 最上層配線
13 パッド
14 パッシベーション膜
15 開口
19 電極
19a 延出部
20 誘電体層
30 接着樹脂
Claims (10)
- 半導体基板本体上に絶縁膜を介して複数の配線が順次積層されている、半導体基板と、
前記半導体基板の前記配線が積層されている主面に形成され、前記配線のうち最上層配線の少なくとも一部が露出する開口を有する、パッシベーション膜と、
前記パッシベーション膜の前記開口に露出する前記最上層配線及び前記パッシベーション膜の前記開口の周囲を被覆し、前記パッシベーション膜の表面のうち前記開口の周囲の部分に形成された延出部を含む、電極と、
少なくとも前記電極を被覆するように形成された誘電体層と、
を備え、
前記パッシベーション膜の表面側の凹部に接着樹脂が充填され、
前記誘電体層及び前記接着樹脂の表面が同一平面内に含まれることを特徴とする半導体集積回路装置。 - 前記パッシベーション膜の表面のうち、前記電極の前記延出部と接する領域は、平坦であることを特徴とする、請求項1に記載の半導体集積回路装置。
- 前記パッシベーション膜の表面に、前記パッシベーション膜の前記開口の少なくとも一部が露出するように形成された補助層をさらに備え、
前記電極の前記延出部は前記補助層の表面に形成されていることを特徴とする、請求項1又は2に記載の半導体集積回路装置。 - 回路基板に、請求項1乃至3のいずれか一つに記載の半導体集積回路装置を実装した構造において、
前記半導体集積回路装置の前記電極の前記延出部が、前記半導体集積回路装置の前記誘電体層を介して、前記回路基板の電極の表面に対向していることを特徴とする、半導体集積回路装置の実装構造。 - 半導体基板本体上に絶縁膜を介して順次積層された複数の配線を有する半導体基板を形成する第1の工程と、
前記半導体基板の前記配線が積層されている主面に、前記配線のうち最上層配線の少なくとも一部が露出する開口を有するパッシベーション膜を形成する、第2の工程と、
前記パッシベーション膜の前記開口及び前記開口の周囲を被覆し、前記パッシベーション膜の表面のうち前記開口の周囲の部分に形成された延出部を含む電極を形成する、第3の工程と、
少なくとも前記電極を被覆するように誘電体層を形成する、第4の工程と、
前記第4の工程の後に、前記誘電体層の表面側の凹凸を平坦にするように、前記誘電体層の表面側の凹部に接着樹脂を配置する、第5の工程と、
を備えたことを特徴とする、半導体集積回路装置の製造方法。 - 前記第2の工程の後に、前記パッシベーション膜の表面に、前記パッシベーション膜の前記開口の少なくとも一部が露出するように、表面が平坦である補助層を形成する工程をさらに備えることを特徴とする、請求項5に記載の半導体集積回路装置の製造方法。
- 前記第3の工程において、前記パッシベーション膜に沿うように導電材料を成膜することにより、前記電極を形成することを特徴とする、請求項5又は6に記載の半導体集積回路装置の製造方法。
- 前記第5の工程において、前記パッシベーション膜の表面側に接着樹脂を配置した後、前記誘電体層のうち少なくとも前記電極の前記延出部を被覆する部分が露出するまで、前記接着樹脂を研磨することを特徴とする、請求項5乃至7のいずれか一つに記載の半導体集積回路装置の製造方法。
- 前記第5の工程において、未硬化状態の前記接着樹脂を前記誘電体層上に圧着することを特徴とする請求項5乃至8のいずれか一つに記載の半導体集積回路装置の製造方法。
- 前記第5の工程において、未硬化状態の前記接着樹脂を前記誘電体層上に塗布することを特徴とする請求項5乃至8のいずれか一つに記載の半導体集積回路装置の製造方法。
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Publication number | Priority date | Publication date | Assignee | Title |
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JPS6046038A (ja) * | 1983-08-23 | 1985-03-12 | Nec Corp | 集積回路装置 |
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JP2007043172A (ja) * | 2005-08-02 | 2007-02-15 | Internatl Business Mach Corp <Ibm> | 高速・高周波数デバイスのためのチップ間esd保護構造体 |
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JPS6046038A (ja) * | 1983-08-23 | 1985-03-12 | Nec Corp | 集積回路装置 |
JP2006173476A (ja) * | 2004-12-17 | 2006-06-29 | Renesas Technology Corp | 半導体装置およびその製造方法 |
JP2007043172A (ja) * | 2005-08-02 | 2007-02-15 | Internatl Business Mach Corp <Ibm> | 高速・高周波数デバイスのためのチップ間esd保護構造体 |
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