JP4369582B2 - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof Download PDF

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Publication number
JP4369582B2
JP4369582B2 JP2000005766A JP2000005766A JP4369582B2 JP 4369582 B2 JP4369582 B2 JP 4369582B2 JP 2000005766 A JP2000005766 A JP 2000005766A JP 2000005766 A JP2000005766 A JP 2000005766A JP 4369582 B2 JP4369582 B2 JP 4369582B2
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recess
semiconductor element
sealing resin
external lead
insulating substrate
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JP2001196507A (en
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剛 長谷川
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Kyocera Corp
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Kyocera Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To solve a problem that a normal stabilized operation can not be ensured for internally sealed semiconductor elements 3a, 3b over a long term due to cracking on an insulating basic body 1, or stripping or bursting of a sealing resin layer 6. SOLUTION: The semiconductor device comprises a substantially flat square insulation base body 1 having a recess 1b for containing a semiconductor element 3b on one major surface and a plurality of wiring conductors 4 laid from the inside of the recess 1b to the outer circumference of the major surface, the semiconductor element 3b mounted on the bottom of the recess 1b, a plurality of external lead terminals 2 having one end bonded to a part of the wiring conductor 4 led out to the outer circumference of the major surface, and the other end projecting outward from the side of the insulation basic body 1, and a resin 6 for sealing the insulation basic body 1, the semiconductor element 3b, and a part of the external lead terminals 2 wherein the recess 1b has an inclining or stepped side. The inclining or stepped side of the recess 1b distribute and relax stress well thus protecting the insulation basic body 1 against cracking.

Description

【0001】
【発明の属する技術分野】
本発明は、コンピュータ等の情報処理装置に使用される樹脂封止型の半導体装置に関するものである。
【0002】
【従来の技術】
従来、コンピュータ等の情報処理装置に使用される樹脂封止型の半導体装置は、半導体素子と、半導体素子を搭載するダイパッドと、ダイパッドの周辺から所定間隔で延出する多数の外部リード端子と、半導体素子およびダイパッドならびに外部リード端子のダイパッド近傍部を封止する封止樹脂とから構成されている。そして、この半導体装置は、ダイパッドと多数の外部リード端子とが枠状の連結帯を介して一体的に連結形成されたリードフレームを準備するとともに、このリードフレームのダイパッド上面に半導体素子を搭載固定し、次に半導体素子の各電極と外部リード端子のダイパッド近傍部とをボンディングワイヤを介して電気的に接続するとともに半導体素子およびダイパッドならびに外部リード端子のダイパッド近傍部を封止樹脂により封止することによって製作されている。
【0003】
なお、リードフレームは、銅や鉄を主成分とする金属から成り、銅や鉄を主成分とする金属の薄板に従来周知の打ち抜き加工やエッチング加工等の金属加工を施すことによって製作される。
【0004】
また、かかる従来の半導体装置は、半導体素子およびダイパッドならびに外部リード端子のダイパッド近傍部を封止樹脂で封止した後、外部リード端子を枠状の連結帯より切断分離させ、各々の外部リード端子を電気的に独立させるとともに各外部リード端子の外側端部を外部電気回路基板の配線導体に半田を介して接続させることにより内部に収容する半導体素子の各電極が外部リード端子を介して外部電気回路に接続されることとなる。
【0005】
しかしながら、近時、半導体素子は高密度化・高集積化が急激に進み、その電極数が大幅に増大してきており、これに伴って半導体素子の各電極を外部電気回路に接続する外部リード端子もその線幅が例えば0.3 mm以下と細く、かつ隣接する外部リード端子の間隔も0.3 mm以下と極めて狭いものとなってきた。そのためこの従来の半導体装置においては、例えば外部リード端子を外部電気回路に接続する際等に外部リード端子に外力が印加されるとその外力によって外部リード端子が容易に変形し、隣接する外部リード端子が接触して短絡を発生させたり、外部リード端子を所定の外部電気回路に正確かつ強固に接続することができないという問題点を有していた。また、ひとつの半導体装置内に複数個の半導体素子を収容し、それにより半導体素子の外部電気回路基板に対する実装密度を高いものとするとともに半導体素子間の信号の授受の高速化を図る要求もあった。
【0006】
そこで、上記問題点を解消するとともに上記要求を満足させるために、図9に断面図で示すように、酸化アルミニウム質焼結体等の電気絶縁材料から成り、上面中央部に半導体素子23aが搭載される半導体素子搭載部21aを、下面中央部に半導体素子23bが収容される凹部21bを有するとともに、これらの半導体素子搭載部21a周辺および凹部21b内から上面外周部にかけて扇状に広がって導出するタングステンやモリブデン等の金属粉末メタライズから成る複数の配線導体24を有する略四角平板状の絶縁基体21と、この絶縁基体21の半導体素子搭載部21aに搭載され、その電極が配線導体24の内端部にボンディングワイヤ25aを介して電気的に接続された半導体素子23aと、凹部21b内に収容され、その電極が配線導体24にボンディングワイヤ25bを介して電気的に接続された半導体素子23bと、一端部が配線導体24の絶縁基体21の上面の外周部に導出した部位に接合されるとともに他端部が絶縁基体21の側面から外側に突出する複数個の外部リード端子22と、絶縁基体21および半導体素子23a・23bならびに外部リード端子22の一端部を封止するエポキシ樹脂等の熱硬化性樹脂から成る封止樹脂26とから成る半導体装置が提案されている。かかる半導体装置によれば、外部リード端子22が扇状に広がった配線導体24の外端部に取着されていることから、外部リード端子22の線幅および隣接間隔を広いものとして外部リード端子22の変形を有効に防止しつつ隣接する外部リード端子22間の電気的絶縁を維持することが可能となる。また、同一の半導体装置内に2個の半導体素子23a・23bが近接して収容されていることから、半導体素子23a・23bの外部電気回路基板に対する実装密度が高いものとなるとともに、半導体素子23aと23bとの間の信号の授受を短い距離で高速に行うことが可能となる。
【0007】
かかる半導体装置を製造するには、まず絶縁基体21の下面に形成された凹部21b内に半導体素子23bを収容するとともに、この半導体素子23bの各電極と配線導体24とをボンディングワイヤ25bを介して電気的に接続し、次に絶縁基体21の上面側に形成された半導体素子搭載部21aに半導体素子23aを搭載するとともに、この半導体素子23aの各電極と配線導体24とをボンディングワイヤ25aを介して電気的に接続し、しかる後、これを図10に断面図で示すように、下面側に封止樹脂26の上半分の表面形状に対応した形状のキャビティー51aを有する上金型51と、上面側に封止樹脂26の下半分の表面形状に対応した形状のキャビティー52aを有する下金型52とから成るモールド金型50内に、絶縁基体21および半導体素子23a・23bならびに外部リード端子22の一端部がモールド金型50のキャビティー51a・52a内に位置するようにして外部リード端子22を上金型51と下金型52との間に挟持させることによってセットし、次に図11に断面図で示すように、このモールド金型50のキャビティー51a・52a内に封止樹脂26を液状で注入して熱硬化させることによって、絶縁基体21および半導体素子23a・23bならびに外部リード端子22の一端部を熱硬化した封止樹脂26により封止する方法が採用されている。
【0008】
なお、モールド金型50のキャビティー51a・52a内に封止樹脂26を液状で注入するには、モールド金型50の上金型51と下金型52との間に、樹脂を注入するための樹脂注入路53および空気を排出するための空気排出路54を設けておき、この樹脂注入路53を介してモールド金型50内に液状の封止樹脂26を注入する方法が採用される。
【0009】
また、この半導体装置において、絶縁基体21の下面側に搭載された半導体素子23bが凹部21b内に収容されているのは、絶縁基体21上面の半導体素子搭載部21aに半導体素子23aを搭載する際に、半導体素子23bおよびボンディングワイヤ25bが外部の部材等に接触して損傷することを防止するためである。
【0010】
【発明が解決しようとする課題】
しかしながら、図9に示すような従来の半導体装置では、絶縁基体21の下面に形成された凹部21bの側面が凹部21bの底面に対して略垂直に切立っており、このため凹部21bの底面と側面との間の角部に応力が集中しやすい構造となっている。したがって、半導体素子23a・23bが作動時に発生する熱等が絶縁基体21および封止樹脂26に繰り返し印加されると、両者の熱膨張係数の相違に起因して発生する応力が絶縁基体21の凹部21bの側面と底面との間の角部に集中して作用し、この角部を起点にして絶縁基体21にクラックを発生させてしまい、その結果、絶縁基体21に被着させた配線導体24がクラックの進行に伴って断線して半導体素子23a・23bを正常に作動させることができなくなってしまうという問題点を有していた。
【0011】
また、この半導体装置においては、半導体装置を製造する際に、半導体素子23a・23bおよび外部リード端子22が接合された絶縁基体21をモールド金型50内にセットした後、モールド金型50内に封止樹脂26を液状で注入すると、凹部21bの側面が絶縁基体21の下面から凹部21b底面まで略垂直に切立っていることから凹部21bの側面と凹部21bの底面との間の角部に液状の封止樹脂26が良好に回り込めずに、この部位における封止樹脂26内に空気が巻き込まれて大きなボイドが形成され、このようなボイドが発生すると、半導体素子23a・23bが作動時に発生する熱等により、ボイド内に閉じ込められた空気等が熱膨張して封止樹脂26に剥離や破裂を発生させてしまい、その結果、封止樹脂26による気密封止が不完全となって凹部21b内に収容する半導体素子23bを長期間にわたり正常に作動させることができなくなってしまうという問題点を有していた。
【0012】
本発明は、かかる従来の問題点に鑑み案出されたものであり、その目的は、絶縁基体にクラックが発生したり、あるいは封止樹脂に剥離や破裂が発生することがなく、それにより内部に封止される半導体素子を長期間にわたり、正常かつ安定に作動させることが可能な半導体装置およびその製造方法を提供することにある。
【0013】
【課題を解決するための手段】
本発明の半導体装置は、面に半導体素子を収容するための凹部を有するとともに、凹部の内側から面の外周部にかけて複数の配線導体が配設されて成る略四角平板状の絶縁基体と、凹部の底面に搭載された半導体素子と、一端部が配線導体の絶縁基体の上面の外周部に導出した部位に接合され、他端部が絶縁基体の外周側面から外側に突出した複数の外部リード端子と、絶縁基体および半導体素子ならびに外部リード端子の一端部を封止する封止樹脂とから成る半導体装置であって、凹部は、その凹部の側面を傾斜面または階段状面とし、絶縁基体は、その絶縁基体の外周側面と下面との間の角部に面取り部が形成されていることを特徴とするものである。
【0014】
また、本発明の半導体装置の製造方法は、面に半導体素子を収容するための凹部を有するとともに、凹部の内側から面の外周部にかけて複数の配線導体が配設されて成る略四角平板状の絶縁基体と、凹部の底面に搭載された半導体素子と、一端部が配線導体の絶縁基体の上面の外周部に導出した部位に接合され、他端部が絶縁基体の外周側面から外側に突出した複数の外部リード端子とを、絶縁基体の上面側および下面側にキャビティーを有するモールド金型内にセットするとともに、モールド金型内に液状樹脂を注入して硬化させることによって、絶縁基体および半導体素子ならびに外部リード端子の一端部を封止樹脂により封止する半導体装置の製造方法であって、絶縁基体の凹部の側面を傾斜面または階段状面とし、絶縁基体の外周側面と下面との間の角部に面取り部を形成しておくことを特徴とするものである。
【0015】
本発明の半導体装置によれば、凹部の側面が傾斜面または階段状面であることから、絶縁基体の凹部側面と底面との間の角部に印加される応力を凹部側面で良好に分散緩和させることができる。また、絶縁基体の外周側面と下面との間の角部に面取り部が形成されていることから、この角部に接する封止樹脂に絶縁基体と封止樹脂との熱膨張係数の相違に起因して印加される応力を良好に分散緩和することができるとともに、この角部と封止樹脂の側面との間の厚みを厚いものとして、封止樹脂にクラックが発生するのを有効に防止することができる。
【0016】
また、本発明の半導体装置の製造方法によれば、絶縁基体の凹部の側面を傾斜面または階段状面としておくことによって、この絶縁基体をモールド金型内にセットした後、モールド金型内に液状の封止樹脂を注入すると、液状の封止樹脂が凹部の側面に沿って良好に流れ、その結果、凹部内が封止樹脂により良好に充填され、封止樹脂内に大きなボイドが形成されることを有効に防止することができる。また、絶縁基体の外周側面と下面との間の角部に面取り部を形成しておくことにより、絶縁基体がセットされたモールド金型内に液状の封止樹脂を注入した際に、絶縁基体と下金型のキャビティー側面との間隔が広いものとなって絶縁基体下面と下金型との間に液状の封止樹脂を良好に注入することができる。
【0017】
【発明の実施の形態】
次に、本発明を添付の図面を基に詳細に説明する。
【0018】
図1は、本発明の半導体装置の実施形態の一例を示す断面図であり、1は絶縁基体、2は外部リード端子、3a・3bは半導体素子、6は封止樹脂である。また、図2は図1に示す半導体装置の封止樹脂6を除いた上面図である。
【0019】
絶縁基体1は、酸化アルミニウム質焼結体・窒化アルミニウム質焼結体・ムライト質焼結体・炭化珪素質焼結体・窒化珪素質焼結体・ガラスセラミックス等の電気絶縁材料から成る略四角平板であり、その上面中央部に半導体素子3aが搭載される半導体素子搭載部1aを有しており、その下面中央部に半導体素子3bが収容される凹部1bを有している。そして、半導体素子搭載部1aには半導体素子3aが、凹部1bの底面には半導体素子1bが、ろう材・ガラス・樹脂等の接着剤を介してそれぞれ接着固定されている。
【0020】
また、絶縁基体1は、半導体素子搭載部1a周辺および凹部1bの内側から外周部にかけて扇状に広がる多数のタングステン・モリブデン・銅・銀等の金属粉末メタライズから成る配線導体4が被着形成されている。この配線導体4は、半導体素子3a・3bの各電極を外部リード端子2に電気的に接続するための導電路として機能し、その内端部には半導体素子3a・3bの各電極がボンディングワイヤ5a・5bを介してそれぞれ電気的に接続されており、外端部には外部リード端子2の一端部が接合されている。そして、配線導体4は、内端部から外端部にかけて扇状に広がっており、外端部における線幅および隣接間隔が広いものとなっており、これにより、外端部に接合される外部リード端子2の線幅および隣接間隔を広いものとすることができる。
【0021】
配線導体4に接合された外部リード端子2は、半導体素子3a・3bを外部電気回路に接続するための端子であり、外部リード端子2を外部電気回路基板の配線導体に接続することによって半導体素子3a・3bが配線導体4および外部リード端子2を介して外部電気回路に電気的に接続されることとなる。そして、外部リード端子2は、その線幅および隣接間隔が例えば0.3mmを超える広いものとなっており、そのため外部リード端子2に外力が印加されたとしてもこの外部リード端子2に大きな変形を発生させることはなく、隣接する外部リード端子2間の電気的絶縁を維持しつつ外部リード端子2を所定の外部電気回路に正確かつ確実に電気的に接続することができる。
【0022】
また、絶縁基体1および半導体素子3a・3bならびに外部リード端子2の配線導体4に接合された一端部は、エポキシ樹脂等の封止樹脂6により封止されており、これにより半導体素子3a・3bが気密に封止され、外部環境から保護されている。そして、この例においては、絶縁基体1の凹部1bの側面が傾斜面となっている。これにより、絶縁基体1と封止樹脂6との熱膨張係数の相違に起因して発生する熱応力が絶縁基体1の凹部1bの内面側に繰り返し印加されたとしても、その応力は傾斜面となっている凹部1bの側面で良好に分散緩和され、その結果、絶縁基体1にクラックが発生することを有効に防止することができ、配線導体4に断線を来すことなく半導体素子3a・3bを常に正常に作動させることが可能となる。
【0023】
なお、凹部1bの側面は、その傾斜角Aが10゜未満であると、凹部1bとして必要な深さを得るために絶縁基体1の大きさを極めて大きなものとする必要があり、そのため半導体装置の小型化が困難なものとなり、他方、80゜を超えると、凹部の側面と底面との間の角部に印加される応力を良好に分散緩和することが困難となってしまう。したがって、凹部1bの側面の傾斜角Aは、10〜80゜の範囲が好ましい。
【0024】
さらに、絶縁基体1の外周側面と下面との間の角部に、例えば幅が0.1mm以上で絶縁基体1の外周側面に対する角度が10〜80゜の面取り部1cを形成しておくことにより、この角部に接する封止樹脂6に絶縁基体1と封止樹脂6との熱膨張係数の相違に起因して印加される応力を良好に分散緩和することができるとともに、この角部と封止樹脂6の側面との間の厚みを厚いものとして、封止樹脂6にクラックが発生するのを有効に防止することができる。したがって、絶縁基体1の外周側面と下面との間の角部には幅が0.1mm以上で絶縁基体1の外周側面に対する角度が10〜80゜の面取り部1cを形成しておく。
【0025】
また、図3に本発明の半導体装置の実施形態の他の例を示す。図3に示す例では、上述の例と同様に、酸化アルミニウム質焼結体等の電気絶縁材料から成り、上面中央部に半導体素子13aが搭載される半導体素子搭載部11aを、下面中央部に半導体素子13bが収容される凹部11bを有するとともに、これらの半導体素子搭載部11a周辺および凹部11bの内側から上面の外周部にかけて扇状に広がって導出するタングステンやモリブデン等の金属粉末メタライズから成る複数の配線導体14を有する略四角平板状の絶縁基体11と、この絶縁基体11の半導体素子搭載部11aに搭載され、その電極が配線導体14の内端部にボンディングワイヤ15aを介して電気的に接続された半導体素子13aと、凹部11b内に収容され、その電極が配線導体14にボンディングワイヤ15bを介して電気的に接続された半導体素子13bと、一端部が配線導体14の絶縁基体11の上面外周部に導出した部位に接合されるとともに他端部が絶縁基体11の外周側面から外側に突出する複数個の外部リード端子12と、絶縁基体11および半導体素子13a・13bならびに外部リード端子12の一端部を封止するエポキシ樹脂等の熱硬化性樹脂から成る封止樹脂16とから構成されている。そして、この例においては絶縁基体11の凹部11bの側面が階段状面となっている。この例の場合には、凹部11bの側面が階段状面となっていることにより、絶縁基体11と封止樹脂16の熱膨張係数の相違に起因して発生する熱応力が絶縁基体11の凹部11bの内面側に繰り返し印加されたとしても、その応力は階段状面となっている凹部11bの側面で良好に分散緩和され、その結果、絶縁基体11にクラックが発生することを有効に防止することができ、配線導体14に断線を来すことなく半導体素子13a・13bを常に正常に作動させることが可能となる。
【0026】
なお、凹部11bの側面は、各段の高さが0.5mmを超えると、この側面で応力を良好に分散緩和することが困難となる傾向にある。従って、凹部11bの各段の高さは、0.5mm以下であるとこが好ましい。また、凹部11bの側面は、その傾斜角Aが10゜未満であると、凹部11bとして必要な深さを得るために絶縁基体11の大きさを極めて大きなものとする必要があり、そのため半導体装置の小型化が困難なものとなり、他方、80゜を超えると、凹部の側面と底面との間の角部に印加される応力を良好に分散緩和することが困難となってしまう。したがって、凹部11bの側面の傾斜角Aは、10〜80゜の範囲が好ましい。
【0027】
さらに、絶縁基体11の外周側面と下面との間の角部に、例えば幅が0.1mm以上で絶縁基体11の外周側面に対する角度が10〜80゜の面取り部11cを形成しておくことにより、この角部に接する封止樹脂16に絶縁基体11と封止樹脂16との熱膨張係数の相違に起因して印加される応力を良好に分散緩和することができるとともに、この角部と封止樹脂16の側面との間の厚みを厚いものとして、封止樹脂16にクラックが発生するのを有効に防止することができる。したがって、絶縁基体11の外周側面と下面との間の角部には幅が0.1mm以上で絶縁基体11の外周側面に対する角度が10〜80゜の面取り部11cを形成しておく。
【0028】
次に、本発明の半導体装置の製造方法を上述の図1に示す半導体装置を製造する場合を例にとって説明する。
【0029】
先ず、図4に断面図で示すように、絶縁基体1と外部リード端子2と半導体素子3a・3bとを準備する。
【0030】
絶縁基体1は、例えば酸化アルミニウム質焼結体から成る場合には、酸化アルミニウム・酸化珪素・酸化カルシウム・酸化マグネシウム等の原料粉末に適当なバインダ・溶剤を添加混合して泥漿状となすとともに、これを従来周知のドクターブレード法やカレンダーロール法等のシート成形技術を採用してシート状となすことによって絶縁基体1用の複数枚のセラミックグリーンシートを得、しかる後、これらのセラミックグリーンシートに適当な打ち抜き加工を施すとともに、配線導体4用の金属ペーストを従来周知のスクリーン印刷法等の厚膜手法を採用して所定のパターンに印刷塗布し、次にこれらのセラミックグリーンシートを上下に積層するとともに所定の形状に切断して側面が傾斜面となった凹部を下面に有する生セラミック成形体を得、最後にこの生セラミック成形体を還元雰囲気中、約1600℃の温度で焼成することによって製作される。なお、配線導体4用の金属ペーストは、例えば配線導体がタングステンメタライズから成る場合であれば、タングステン粉末に適当なバインダ・溶剤を添加混合してペースト状とすることによって得られる。また、通常であれば、配線導体4の露出表面には、ニッケルや金等の耐蝕性に優れ、かつワイヤーボンディング性やろう材との濡れ性に優れる金属を電解めっき法や無電解めっき法により1〜20μmの厚みに鍍着させておく。
【0031】
他方、外部リード端子2は銅を主成分とする銅系合金や鉄を主成分とする鉄系合金等の金属から成る薄板に適当な打ち抜き加工やエッチング加工を施すことによって所定の形状に製作される。なお、このような外部リード端子2は、各外部リード端子2を所定の間隔で保持するためにその外端部を各リード端子2と一体的に形成された枠状の連結帯で連結させておくことが好ましい。このような連結帯は、外部リード端子2を外部電気回路基板に接続する前に外部リード端子2から切断除去すればよい。
【0032】
また、半導体素子3a・3bは常法によって製作される。
【0033】
次に、図5に断面図で示すように、配線導体4の絶縁基体1の上面の外周部に導出した部位に外部リード端子2の一端部を銀−銅合金や金−錫合金・金−ゲルマニウム合金・銀−錫合金・鉛−錫合金・金−錫−鉛−銀合金・金−錫−鉛−パラジウム合金等のろう材を介して接合するとともに、半導体素子搭載部1aに半導体素子3aを、凹部1bの底面に半導体素子3bを、金−シリコン合金等のろう材やエポキシ樹脂等の樹脂から成る接着剤を介して接着固定し、この半導体素子3a・3bの各電極をボンディングワイヤ5a・5bを介して配線導体4に接続する。
【0034】
そして最後に、図6に断面図で示すように、半導体素子3a・3bおよび外部リード端子2が接合された絶縁基体1を、下面側に封止樹脂6の上半分の表面形状に対応した形状のキャビティー31aを有する上金型31と上面側に封止樹脂6の下半分の表面形状に対応した形状のキャビティー32aを有する下金型32とから成るモールド金型30内にセットし、図7に断面図で示すように、このモールド金型30内にエポキシ樹脂等の封止樹脂6を樹脂注入路33を介して液状で注入して熱硬化させることによって、図1に示すように、絶縁基体1および半導体素子3a・3bならびに外部リード端子2の一端部が封止樹脂6によって封止された半導体装置が完成する。そしてこのとき、この例では絶縁基体1の凹部1bの側面が例えば10゜〜80゜の傾斜面となっていることが重要である。この例においては、絶縁基体1の凹部1bの側面が例えば10〜80゜の傾斜面となっていることから、モールド金型30内に絶縁基体1をセットするとともに液状の封止樹脂6を注入すると、液状の封止樹脂6は傾斜面となった凹部1bの側面に沿って良好に流れて凹部1bの内部が封止樹脂6により隙間なく充填され、その結果、封止樹脂6の内部に大きなボイドが形成されるようなことはない。したがって、この例の製造方法によれば、ボイド内に封入された空気等が熱膨張して封止樹脂6に剥離や破裂が発生することのない気密信頼性に優れた半導体装置を提供することができる。なお、凹部1bの側面の傾斜角Aが10゜未満の場合、凹部1bとして必要な深さを得るために絶縁基体1の大きさを極めて大きなものとする必要があり、そのため半導体装置の小型化が困難なものとなり、他方、80゜を超えると、モールド金型30内に絶縁基体1をセットするとともに液状の封止樹脂6を注入した際に、液状の樹脂6が凹部1bの側面に沿って良好に流れずに凹部1bの内部を封止樹脂6で隙間なく充填することが困難となる傾向にある。したがって、凹部1bの側面の傾斜角Aは10〜80゜の範囲が好ましい。さらに、絶縁基体1の外周側面と下面との間の角部に、幅が0.1mm以下で、絶縁基体1の外周側面との角度が10〜80゜の面取り部1cを形成しておくことにより、絶縁基体1がセットされたモールド金型30内に液状の封止樹脂6を注入した際に、絶縁基体1と下金型32のキャビティー32a側面との間隔が広いものとなって絶縁基体1下面と下金型32との間に液状の封止樹脂6を良好に注入することができる。したがって、絶縁基体1の外周側面と下面との間の角部には、幅が0.1mm以下で、絶縁基体1の外周側面との角度が10〜80゜の面取り部1cを形成しておく。
【0035】
また、図3に示す実施形態例を製造する場合には、図8に断面図で示すように、半導体素子13a・13bおよび外部リード端子12が接合された絶縁基体11を、下面側に封止樹脂16の上半分の表面形状に対応した形状のキャビティー41aを有する上金型41と上面側に封止樹脂16の下半分の表面形状に対応した形状のキャビティー42aを有する下金型42とから成るモールド金型40内にセットした後、このモールド金型40内にエポキシ樹脂等の封止樹脂16を樹脂注入路43を介して液状で注入して熱硬化させることによって、図3に示すように、絶縁基体11および半導体素子13a・13bならびに外部リード端子12の一端部が封止樹脂16によって封止された半導体装置が完成する。この場合、絶縁基体11の凹部11bの側面が例えば傾斜角Aが10〜80゜の階段状面となっていることから、モールド金型40内に絶縁基体11をセットするとともに液状の封止樹脂16を注入すると、液状の封止樹脂16は階段状面となった凹部11bの側面に沿って良好に流れて凹部11b内が封止樹脂16により隙間なく充填され、その結果、封止樹脂16の内部に大きなボイドが形成されるようなことはない。なお、凹部11bの側面の傾斜角Aが10゜未満の場合、凹部11bとして必要な深さを得るために絶縁基体11の大きさを極めて大きなものとする必要があり、そのため半導体装置の小型化が困難なものとなり、他方、80゜を超えると、モールド金型40内に絶縁基体11をセットするとともに液状の封止樹脂16を注入した際に、液状の樹脂16が凹部11bの側面に沿って良好に流れずに凹部11b内を封止樹脂16で隙間なく充填することが困難となる傾向にある。したがって、凹部11bの側面の傾斜角Aは10〜80゜の範囲が好ましい。
【0036】
なお、本発明は上述の実施の形態例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々の変更は可能である。例えば、上述の実施形態例では絶縁基体1・11は酸化アルミニウム質焼結体等のセラミックスから形成されていたが、絶縁基体1・11は、セラミックス以外の材料、例えば熱硬化性ポリイミド樹脂やBTレジン(Bismaleimide Triazine Resin)・ガラスエポキシ樹脂基板・ガラス板等から形成されていても良い。また、上述の実施形態例では、配線導体4・14はタングステンメタライズ等の金属粉末メタライズから形成されていたが、配線導体4・14は、銅やアルミニウム・金等の金属薄膜から形成されていてもよい。さらに、絶縁基体1・11の上面や内部に配線導体4・14に接続された容量素子や抵抗素子等を配設してもよい。またさらに、上述の実施形態例では半導体素子3a・3b・13a・13bは各電極がボンディングワイヤ5a・5b・15a・15bを介して配線導体4・14に接続されていたが、半導体素子3a・3b・13a・13bの各電極はフリップチップ接続により配線導体4・14に接続されていてもよい。
【0037】
【発明の効果】
本発明の半導体装置によれば、凹部の側面が傾斜面または階段状面であることから、絶縁基体の凹部の側面と底面との間の角部に印加される応力を凹部の側面で良好に分散緩和させることができ、その結果、絶縁基体にクラックが発生することがなく、配線導体に断線を来すことなく半導体素子を常に正常に作動させることが可能な半導体装置を提供することができる。また、絶縁基体の外周側面と下面との間の角部に面取り部が形成されていることから、この角部に接する封止樹脂に絶縁基体と封止樹脂との熱膨張係数の相違に起因して印加される応力を良好に分散緩和することができるとともに、この角部と封止樹脂の側面との間の厚みを厚いものとして、封止樹脂にクラックが発生するのを有効に防止することができる。
【0038】
また、本発明の半導体装置の製造方法によれば、絶縁基体の凹部の側面を傾斜面または階段状面としておくことによって、この絶縁基体をモールド金型内にセットした後、モールド金型内に液状の封止樹脂を注入すると、液状の封止樹脂が凹部の側面に沿って良好に流れ、その結果、凹部内が封止樹脂により良好に充填され、封止樹脂内に大きなボイドが形成されることを有効に防止することができ、その結果、ボイド内に封入された空気等が熱膨張して封止樹脂に剥離や破裂が発生することがなく、内部に収容する半導体素子を長期間にわたり正常かつ安定に作動させることが可能な気密信頼性に優れた半導体装置を提供することができる。また、絶縁基体の外周側面と下面との間の角部に面取り部を形成しておくことにより、絶縁基体がセットされたモールド金型内に液状の封止樹脂を注入した際に、絶縁基体と下金型のキャビティー側面との間隔が広いものとなって絶縁基体下面と下金型との間に液状の封止樹脂を良好に注入することができる。
【図面の簡単な説明】
【図1】本発明の半導体装置の実施の形態の一例を示す断面図である。
【図2】図1に示す半導体装置の封止樹脂6を除いた上面図である。
【図3】本発明の半導体装置の実施の形態の他の例を示す断面図である。
【図4】本発明の半導体装置の製造方法を説明するための断面図である。
【図5】本発明の半導体装置の製造方法を説明するための断面図である。
【図6】本発明の半導体装置の製造方法を説明するための断面図である。
【図7】本発明の半導体装置の製造方法を説明するための断面図である。
【図8】図3に示す半導体装置の製造方法を説明するための断面図である。
【図9】従来の半導体装置を示す断面図である。
【図10】図9に示す半導体装置の製造方法を説明するための断面図である。
【図11】図9に示す半導体装置の製造方法を説明するための断面図である。
【符号の説明】
1、11・・・・・・・・・・絶縁基体
1a、11a・・・・・・・・半導体素子搭載部
1b、11b・・・・・・・・凹部
2、12・・・・・・・・・・外部リード端子
3a、3b、13a、13b・・半導体素子
4、14・・・・・・・・・・配線導体
6、16・・・・・・・・・・封止樹脂
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a resin-sealed semiconductor device used in an information processing apparatus such as a computer.
[0002]
[Prior art]
Conventionally, a resin-encapsulated semiconductor device used in an information processing apparatus such as a computer includes a semiconductor element, a die pad on which the semiconductor element is mounted, a large number of external lead terminals extending from the periphery of the die pad at predetermined intervals, A semiconductor element, a die pad, and a sealing resin for sealing a portion near the die pad of the external lead terminal are configured. This semiconductor device prepares a lead frame in which a die pad and a large number of external lead terminals are integrally connected via a frame-shaped connecting band, and a semiconductor element is mounted and fixed on the upper surface of the die pad of the lead frame. Next, each electrode of the semiconductor element and the vicinity of the die pad of the external lead terminal are electrically connected through a bonding wire, and the semiconductor element, the die pad and the vicinity of the die pad of the external lead terminal are sealed with a sealing resin. It is produced by.
[0003]
The lead frame is made of a metal mainly composed of copper or iron, and is manufactured by subjecting a thin metal plate mainly composed of copper or iron to metal processing such as a conventionally known punching process or etching process.
[0004]
In addition, such a conventional semiconductor device has a semiconductor element, a die pad, and a portion near the die pad of the external lead terminal sealed with a sealing resin, and then the external lead terminal is cut and separated from the frame-shaped connecting band. Are electrically independent, and the outer end of each external lead terminal is connected to the wiring conductor of the external electric circuit board via solder so that each electrode of the semiconductor element accommodated therein can be electrically connected via the external lead terminal. It will be connected to the circuit.
[0005]
However, recently, the density and integration of semiconductor devices have been rapidly increasing, and the number of electrodes has increased significantly. With this, external lead terminals that connect each electrode of the semiconductor device to an external electric circuit However, the line width has become as narrow as 0.3 mm or less, and the interval between adjacent external lead terminals has become extremely narrow as 0.3 mm or less. Therefore, in this conventional semiconductor device, when an external force is applied to the external lead terminal, for example, when the external lead terminal is connected to an external electric circuit, the external lead terminal is easily deformed by the external force, and the adjacent external lead terminal Contacted to cause a short circuit, and the external lead terminal cannot be connected to a predetermined external electric circuit accurately and firmly. There is also a demand for housing a plurality of semiconductor elements in a single semiconductor device, thereby increasing the mounting density of the semiconductor elements on an external electric circuit board and increasing the speed of signal exchange between the semiconductor elements. It was.
[0006]
Therefore, in order to solve the above problems and satisfy the above requirements, as shown in a cross-sectional view in FIG. 9, it is made of an electrically insulating material such as an aluminum oxide sintered body, and a semiconductor element 23a is mounted at the center of the upper surface. The semiconductor element mounting portion 21a to be formed has a concave portion 21b in which the semiconductor element 23b is accommodated in the central portion of the lower surface, and is led out in a fan shape from the periphery of the semiconductor element mounting portion 21a and from the inside of the concave portion 21b to the outer peripheral portion of the upper surface. A substantially rectangular flat plate-like insulating base 21 having a plurality of wiring conductors 24 made of metal powder metallization such as molybdenum, and mounted on a semiconductor element mounting portion 21a of the insulating base 21, the electrodes of which are inner end portions of the wiring conductor 24 And a semiconductor element 23a electrically connected to each other through a bonding wire 25a and a recess 21b. The electrode is connected to the wiring conductor 24 with the bonding wire 25b. Thus, the electrically connected semiconductor element 23b and one end are joined to a portion led to the outer peripheral portion of the upper surface of the insulating base 21 of the wiring conductor 24, and the other end protrudes outward from the side surface of the insulating base 21. A semiconductor device comprising a plurality of external lead terminals 22 and a sealing resin 26 made of a thermosetting resin such as an epoxy resin for sealing one end of the insulating base 21 and the semiconductor elements 23a and 23b and the external lead terminals 22. Has been proposed. According to such a semiconductor device, since the external lead terminal 22 is attached to the outer end portion of the wiring conductor 24 that expands in a fan shape, the external lead terminal 22 has a wide line width and adjacent interval. It is possible to maintain the electrical insulation between the adjacent external lead terminals 22 while effectively preventing the deformation. Further, since the two semiconductor elements 23a and 23b are accommodated in the same semiconductor device, the mounting density of the semiconductor elements 23a and 23b with respect to the external electric circuit board becomes high, and the semiconductor element 23a. And 23b can be exchanged at high speed over a short distance.
[0007]
In order to manufacture such a semiconductor device, first, the semiconductor element 23b is accommodated in the recess 21b formed on the lower surface of the insulating base 21, and each electrode of the semiconductor element 23b and the wiring conductor 24 are connected via the bonding wire 25b. Next, the semiconductor element 23a is mounted on the semiconductor element mounting portion 21a formed on the upper surface side of the insulating base 21, and the electrodes of the semiconductor element 23a and the wiring conductor 24 are connected to each other via bonding wires 25a. Then, as shown in a sectional view in FIG. 10, an upper mold 51 having a cavity 51a having a shape corresponding to the surface shape of the upper half of the sealing resin 26 on the lower surface side, as shown in FIG. The insulating base 21, semiconductor elements 23a and 23b, and external leads are formed in a mold die 50 having a lower die 52 having a cavity 52a having a shape corresponding to the surface shape of the lower half of the sealing resin 26 on the upper surface side. Of terminal 22 The external lead terminal 22 is set by sandwiching it between the upper mold 51 and the lower mold 52 so that the end portion is located in the cavity 51a / 52a of the mold 50, and then in FIG. As shown in the cross-sectional view, the insulating base 21, semiconductor elements 23a and 23b, and external lead terminals 22 are injected by injecting the sealing resin 26 into the cavities 51a and 52a of the mold 50 in a liquid state and thermosetting. A method is employed in which one end of each is sealed with a thermosetting sealing resin 26.
[0008]
In order to inject the sealing resin 26 into the cavities 51 a and 52 a of the mold 50 in a liquid state, the resin is injected between the upper mold 51 and the lower mold 52 of the mold 50. The resin injection path 53 and the air discharge path 54 for discharging air are provided, and the liquid sealing resin 26 is injected into the mold 50 through the resin injection path 53.
[0009]
In this semiconductor device, the semiconductor element 23b mounted on the lower surface side of the insulating base 21 is accommodated in the recess 21b when the semiconductor element 23a is mounted on the semiconductor element mounting portion 21a on the upper surface of the insulating base 21. In addition, the semiconductor element 23b and the bonding wire 25b are prevented from coming into contact with an external member or the like and being damaged.
[0010]
[Problems to be solved by the invention]
However, in the conventional semiconductor device as shown in FIG. 9, the side surface of the recess 21b formed on the lower surface of the insulating base 21 stands up substantially perpendicular to the bottom surface of the recess 21b. It has a structure in which stress tends to concentrate on the corners between the side surfaces. Therefore, when heat generated during the operation of the semiconductor elements 23a and 23b is repeatedly applied to the insulating base 21 and the sealing resin 26, the stress generated due to the difference in thermal expansion coefficient between the two is caused by the recesses of the insulating base 21. It acts on the corner portion between the side surface and the bottom surface of 21b, causing cracks in the insulating base 21 starting from the corner portion, and as a result, the wiring conductor 24 deposited on the insulating base 21. However, there is a problem that the semiconductor elements 23a and 23b cannot be normally operated due to disconnection as the crack progresses.
[0011]
In this semiconductor device, when the semiconductor device is manufactured, the insulating base 21 to which the semiconductor elements 23a and 23b and the external lead terminals 22 are joined is set in the mold die 50, and then the mold die 50 is filled. When the sealing resin 26 is injected in a liquid state, the side surface of the recess 21b stands up substantially vertically from the lower surface of the insulating base 21 to the bottom surface of the recess 21b, so that the corner between the side surface of the recess 21b and the bottom surface of the recess 21b is formed. The liquid sealing resin 26 does not wrap around well, and air is entrained in the sealing resin 26 at this portion to form large voids. When such voids are generated, the semiconductor elements 23a and 23b are activated during operation. Due to the generated heat, air confined in the void thermally expands, causing the sealing resin 26 to peel off or rupture, resulting in incomplete hermetic sealing with the sealing resin 26. Semiconductor housed in recess 21b It has been a problem that it becomes impossible to normally operate the child 23b over a long period of time.
[0012]
The present invention has been devised in view of such conventional problems, and the object thereof is to prevent the occurrence of cracks in the insulating substrate or the separation or rupture of the sealing resin. It is an object of the present invention to provide a semiconductor device capable of operating a semiconductor element sealed in a normal and stable manner for a long period of time and a method for manufacturing the same.
[0013]
[Means for Solving the Problems]
  The semiconductor device of the present invention isunderIt has a recess to accommodate the semiconductor element on the surface, and from the inside of the recessUpA substantially rectangular flat plate-like insulating base having a plurality of wiring conductors disposed on the outer periphery of the surface, a semiconductor element mounted on the bottom surface of the recess, and one end portion of the wiring conductor.On an insulating substrateIt is joined to the part led out to the outer periphery of the surface, and the other end isPerimeterA semiconductor device comprising a plurality of external lead terminals protruding outward from a side surface, an insulating base, a semiconductor element, and a sealing resin for sealing one end of the external lead terminal,RecessedThe side is inclined or stepped, and the insulating baseOf insulating substrateA chamfered portion is formed at a corner between the outer peripheral side surface and the lower surface.
[0014]
  In addition, a method for manufacturing a semiconductor device of the present invention includes:underIt has a recess to accommodate the semiconductor element on the surface, and from the inside of the recessUpA substantially rectangular flat plate-like insulating base having a plurality of wiring conductors disposed on the outer periphery of the surface, a semiconductor element mounted on the bottom surface of the recess, and one end portion of the wiring conductor.On an insulating substrateIt is joined to the part led out to the outer periphery of the surface, and the other end isPerimeterA plurality of external lead terminals protruding outward from the side surfaceTop side and bottomThe resin is set in a mold mold having a cavity on the surface side, and a liquid resin is injected into the mold mold and cured to seal one end of the insulating substrate, the semiconductor element, and the external lead terminal with a sealing resin. A method of manufacturing a semiconductor device, wherein a side surface of a concave portion of an insulating base is an inclined surface or a stepped surface, and a chamfer is formed at a corner between the outer peripheral side surface and the lower surface of the insulating base. It is what.
[0015]
  According to the semiconductor device of the present invention, since the side surface of the recess is an inclined surface or a stepped surface, the stress applied to the corner between the recess side surface and the bottom surface of the insulating base is favorably distributed and relaxed on the side surface of the recess. Can be made.In addition, since the chamfered portion is formed at the corner between the outer peripheral side surface and the lower surface of the insulating base, the sealing resin in contact with the corner is caused by the difference in thermal expansion coefficient between the insulating base and the sealing resin. The applied stress can be satisfactorily dispersed and relaxed, and the thickness between the corner and the side surface of the sealing resin is increased to effectively prevent cracking in the sealing resin. be able to.
[0016]
  In addition, according to the method for manufacturing a semiconductor device of the present invention, by setting the side surface of the concave portion of the insulating base as an inclined surface or a stepped surface, When the liquid sealing resin is injected, the liquid sealing resin flows well along the side surface of the recess, and as a result, the recess is well filled with the sealing resin, and a large void is formed in the sealing resin. Can be effectively prevented.Further, by forming a chamfered portion at the corner between the outer peripheral side surface and the lower surface of the insulating substrate, when the liquid sealing resin is injected into the mold mold in which the insulating substrate is set, the insulating substrate The space between the cavity and the side of the cavity of the lower mold becomes wide, and the liquid sealing resin can be injected well between the lower surface of the insulating base and the lower mold.
[0017]
DETAILED DESCRIPTION OF THE INVENTION
Next, the present invention will be described in detail with reference to the accompanying drawings.
[0018]
FIG. 1 is a cross-sectional view showing an example of an embodiment of a semiconductor device of the present invention, wherein 1 is an insulating substrate, 2 is an external lead terminal, 3a and 3b are semiconductor elements, and 6 is a sealing resin. FIG. 2 is a top view of the semiconductor device shown in FIG.
[0019]
The insulating substrate 1 is a substantially square made of an electrically insulating material such as an aluminum oxide sintered body, an aluminum nitride sintered body, a mullite sintered body, a silicon carbide sintered body, a silicon nitride sintered body, or a glass ceramic. It is a flat plate, and has a semiconductor element mounting portion 1a on which the semiconductor element 3a is mounted at the center of the upper surface, and a recess 1b in which the semiconductor element 3b is accommodated at the center of the lower surface. The semiconductor element 3a is bonded to the semiconductor element mounting portion 1a, and the semiconductor element 1b is bonded and fixed to the bottom surface of the recess 1b via an adhesive such as brazing material, glass, or resin.
[0020]
The insulating substrate 1 is formed by depositing a wiring conductor 4 made of a metal powder metallization of tungsten, molybdenum, copper, silver, or the like that spreads in a fan shape from the periphery of the semiconductor element mounting portion 1a and from the inside to the outer periphery of the recess 1b. Yes. The wiring conductor 4 functions as a conductive path for electrically connecting each electrode of the semiconductor elements 3a and 3b to the external lead terminal 2, and each electrode of the semiconductor elements 3a and 3b is bonded to a bonding wire at the inner end portion thereof. 5a and 5b are electrically connected to each other, and one end portion of the external lead terminal 2 is joined to the outer end portion. The wiring conductor 4 extends in a fan shape from the inner end portion to the outer end portion, and has a wide line width and adjacent interval at the outer end portion, whereby an external lead joined to the outer end portion. The line width and adjacent interval of the terminal 2 can be widened.
[0021]
The external lead terminal 2 joined to the wiring conductor 4 is a terminal for connecting the semiconductor elements 3a and 3b to the external electric circuit. By connecting the external lead terminal 2 to the wiring conductor of the external electric circuit board, the semiconductor element 3a and 3b are electrically connected to the external electric circuit via the wiring conductor 4 and the external lead terminal 2. The external lead terminal 2 has a wide line width and an adjacent interval exceeding, for example, 0.3 mm. Therefore, even if an external force is applied to the external lead terminal 2, the external lead terminal 2 is greatly deformed. The external lead terminal 2 can be accurately and reliably electrically connected to a predetermined external electric circuit while maintaining the electrical insulation between the adjacent external lead terminals 2.
[0022]
Also, one end portion of the insulating base 1 and the semiconductor elements 3a and 3b and the external lead terminal 2 joined to the wiring conductor 4 is sealed with a sealing resin 6 such as an epoxy resin, whereby the semiconductor elements 3a and 3b are sealed. Is hermetically sealed and protected from the external environment. In this example, the side surface of the recess 1b of the insulating base 1 is an inclined surface. Thereby, even if the thermal stress generated due to the difference in thermal expansion coefficient between the insulating substrate 1 and the sealing resin 6 is repeatedly applied to the inner surface side of the recess 1 b of the insulating substrate 1, the stress is As a result, it is possible to effectively prevent the occurrence of cracks in the insulating substrate 1 and to prevent the occurrence of cracks in the insulating substrate 1, and the semiconductor elements 3 a and 3 b without breaking the wiring conductor 4. Can always operate normally.
[0023]
If the inclination angle A of the side surface of the recess 1b is less than 10 °, it is necessary to make the size of the insulating substrate 1 extremely large in order to obtain the necessary depth as the recess 1b. On the other hand, if it exceeds 80 °, it becomes difficult to satisfactorily disperse and relax the stress applied to the corner between the side surface and the bottom surface of the recess. Therefore, the inclination angle A of the side surface of the recess 1b is preferably in the range of 10 to 80 °.
[0024]
  Further, a chamfered portion 1c having a width of 0.1 mm or more and an angle of 10 to 80 ° with respect to the outer peripheral side surface of the insulating base 1 is formed in a corner portion between the outer peripheral side surface and the lower surface of the insulating base 1.ByThe stress applied to the sealing resin 6 in contact with the corner due to the difference in thermal expansion coefficient between the insulating substrate 1 and the sealing resin 6 can be well dispersed and relaxed, and the corner and the sealing can be sealed. It is possible to effectively prevent cracks from occurring in the sealing resin 6 by increasing the thickness between the side surfaces of the stop resin 6. Therefore, a chamfered portion 1c having a width of 0.1 mm or more and an angle of 10 to 80 ° with respect to the outer peripheral side surface of the insulating base 1 is formed at the corner between the outer peripheral side surface and the lower surface of the insulating base 1.The
[0025]
  FIG. 3 shows another example of the embodiment of the semiconductor device of the present invention. In the example shown in FIG. 3, similarly to the above-described example, a semiconductor element mounting portion 11a made of an electrically insulating material such as an aluminum oxide sintered body and having a semiconductor element 13a mounted at the center of the upper surface is formed at the center of the lower surface. A plurality of metal powder metallizations such as tungsten and molybdenum, which have a recess 11b in which the semiconductor element 13b is accommodated and which extend out like a fan from the periphery of the semiconductor element mounting portion 11a and from the inside of the recess 11b to the outer periphery of the upper surface. A substantially rectangular flat plate-like insulating base 11 having a wiring conductor 14 is mounted on a semiconductor element mounting portion 11a of the insulating base 11, and the electrode is electrically connected to the inner end of the wiring conductor 14 via a bonding wire 15a. The semiconductor element 13a, the semiconductor element 13b housed in the recess 11b, the electrode of which is electrically connected to the wiring conductor 14 via the bonding wire 15b, and one end portion The wiring conductor 14 is joined to a portion led to the outer peripheral portion of the upper surface of the insulating base 11, and the other end of the insulating base 11 isPerimeterA plurality of external lead terminals 12 projecting outward from the side surfaces, and a sealing resin 16 made of a thermosetting resin such as an epoxy resin for sealing one end of the insulating base 11, the semiconductor elements 13a and 13b, and the external lead terminals 12. It consists of and. In this example, the side surface of the recess 11b of the insulating base 11 is a stepped surface. In the case of this example, since the side surface of the recess 11b is a stepped surface, the thermal stress generated due to the difference in the thermal expansion coefficient between the insulating substrate 11 and the sealing resin 16 is reduced. Even if it is repeatedly applied to the inner surface side of 11b, the stress is well dispersed and relaxed on the side surface of the concave portion 11b, which is a stepped surface, and as a result, it is possible to effectively prevent the insulating substrate 11 from cracking. Therefore, the semiconductor elements 13a and 13b can always be operated normally without breaking the wiring conductor 14.
[0026]
If the height of each step exceeds 0.5 mm on the side surface of the recess 11b, it tends to be difficult to satisfactorily distribute and relax the stress on this side surface. Therefore, the height of each step of the recess 11b is preferably 0.5 mm or less. Further, if the inclination angle A of the side surface of the recess 11b is less than 10 °, it is necessary to make the size of the insulating substrate 11 extremely large in order to obtain the necessary depth as the recess 11b. On the other hand, if it exceeds 80 °, it becomes difficult to satisfactorily disperse and relax the stress applied to the corner between the side surface and the bottom surface of the recess. Therefore, the inclination angle A of the side surface of the recess 11b is preferably in the range of 10 to 80 °.
[0027]
  Further, a chamfered portion 11c having a width of 0.1 mm or more and an angle of 10 to 80 ° with respect to the outer peripheral side surface of the insulating base 11 is formed at a corner between the outer peripheral side surface and the lower surface of the insulating base member 11.ByThe stress applied to the sealing resin 16 in contact with the corner due to the difference in thermal expansion coefficient between the insulating substrate 11 and the sealing resin 16 can be well dispersed and relaxed, and the corner and the sealing can be sealed. By making the thickness between the side surfaces of the stop resin 16 thick, it is possible to effectively prevent cracks from occurring in the sealing resin 16. Therefore, a chamfered portion 11c having a width of 0.1 mm or more and an angle of 10 to 80 ° with respect to the outer peripheral side surface of the insulating base 11 is formed at the corner between the outer peripheral side surface and the lower surface of the insulating base 11.The
[0028]
Next, a method for manufacturing the semiconductor device of the present invention will be described by taking as an example the case of manufacturing the semiconductor device shown in FIG.
[0029]
First, as shown in a sectional view in FIG. 4, an insulating base 1, an external lead terminal 2, and semiconductor elements 3a and 3b are prepared.
[0030]
When the insulating substrate 1 is made of, for example, an aluminum oxide sintered body, an appropriate binder and solvent are added to and mixed with raw material powders such as aluminum oxide, silicon oxide, calcium oxide, and magnesium oxide to form a slurry. A plurality of ceramic green sheets for the insulating substrate 1 are obtained by adopting a sheet forming technique such as a doctor blade method or a calender roll method, which is conventionally known, and then obtaining these ceramic green sheets. Appropriate punching is performed, and a metal paste for the wiring conductor 4 is printed and applied in a predetermined pattern using a conventionally well-known thick film technique such as screen printing, and then these ceramic green sheets are stacked one above the other. In addition, a raw ceramic composition having a recess on the bottom surface that is cut into a predetermined shape and has a side surface that is inclined. Give body, finally in a reducing atmosphere the green ceramic body is fabricated by firing at a temperature of about 1600 ° C.. Note that the metal paste for the wiring conductor 4 is obtained, for example, by adding a suitable binder / solvent to tungsten powder to form a paste if the wiring conductor is made of tungsten metallization. Moreover, normally, the exposed surface of the wiring conductor 4 is made of a metal having excellent corrosion resistance, such as nickel or gold, and excellent in wire bonding and wettability with a brazing material, by an electrolytic plating method or an electroless plating method. It is made to adhere to the thickness of 1-20 micrometers.
[0031]
On the other hand, the external lead terminal 2 is manufactured in a predetermined shape by subjecting a thin plate made of a metal such as a copper-based alloy containing copper as a main component or an iron-based alloy containing iron as a main component to appropriate punching or etching. The Such external lead terminals 2 are connected to each other by a frame-like connecting band formed integrally with each lead terminal 2 in order to hold each external lead terminal 2 at a predetermined interval. It is preferable to keep it. Such a connection band may be cut and removed from the external lead terminal 2 before the external lead terminal 2 is connected to the external electric circuit board.
[0032]
The semiconductor elements 3a and 3b are manufactured by a conventional method.
[0033]
  Next, as shown in the sectional view of FIG.The part led out to the outer peripheral part of the upper surface of the insulating substrate 1One end of the external lead terminal 2 is silver-copper alloy, gold-tin alloy, gold-germanium alloy, silver-tin alloy, lead-tin alloy, gold-tin-lead-silver alloy, gold-tin-lead-palladium. Bonding is performed using a brazing material such as an alloy, and the semiconductor element 3a is bonded to the semiconductor element mounting portion 1a, and the semiconductor element 3b is bonded to the bottom surface of the recess 1b. The electrodes of the semiconductor elements 3a and 3b are connected and fixed to the wiring conductor 4 via bonding wires 5a and 5b.
[0034]
  Finally, as shown in a cross-sectional view in FIG. 6, the insulating substrate 1 to which the semiconductor elements 3a and 3b and the external lead terminal 2 are joined is shaped to correspond to the surface shape of the upper half of the sealing resin 6 on the lower surface side. Set in a mold 30 comprising an upper mold 31 having a cavity 31a and a lower mold 32 having a cavity 32a having a shape corresponding to the surface shape of the lower half of the sealing resin 6 on the upper surface side. As shown in a sectional view in FIG. 7, a sealing resin 6 such as an epoxy resin is injected into the mold mold 30 in a liquid state through a resin injection path 33 and thermally cured, as shown in FIG. Then, the semiconductor device in which the insulating base 1, the semiconductor elements 3a and 3b, and one end of the external lead terminal 2 are sealed with the sealing resin 6 is completed. At this time, in this example, it is important that the side surface of the recess 1b of the insulating substrate 1 is an inclined surface of, for example, 10 ° to 80 °. In this example, since the side surface of the concave portion 1b of the insulating substrate 1 is an inclined surface of, for example, 10 to 80 °, the insulating substrate 1 is set in the mold 30 and the liquid sealing resin 6 is injected. Then, the liquid sealing resin 6 flows well along the side surface of the concave portion 1b having the inclined surface, and the inside of the concave portion 1b is filled with the sealing resin 6 without a gap. As a result, the inside of the sealing resin 6 is filled. Large voids are never formed. Therefore, according to the manufacturing method of this example, it is possible to provide a semiconductor device having excellent hermetic reliability in which air or the like enclosed in a void does not thermally expand and peeling or rupture occurs in the sealing resin 6. Can do. When the inclination angle A of the side surface of the recess 1b is less than 10 °, the size of the insulating base 1 needs to be extremely large in order to obtain the necessary depth as the recess 1b. On the other hand, when the angle exceeds 80 °, when the insulating substrate 1 is set in the mold 30 and the liquid sealing resin 6 is injected, the liquid resin 6 extends along the side surface of the recess 1b. Therefore, it tends to be difficult to fill the inside of the recess 1b with the sealing resin 6 without a gap without flowing well. Therefore, the inclination angle A of the side surface of the recess 1b is preferably in the range of 10 to 80 °. Further, a chamfered portion 1c having a width of 0.1 mm or less and an angle with the outer peripheral side surface of the insulating base 1 of 10 to 80 ° is formed at a corner between the outer peripheral side surface and the lower surface of the insulating base 1.ByWhen the liquid sealing resin 6 is injected into the mold 30 on which the insulating base 1 is set, the space between the insulating base 1 and the side surface of the cavity 32a of the lower mold 32 becomes wide so that the insulating base 1 The liquid sealing resin 6 can be injected well between the lower surface and the lower mold 32. Therefore, a chamfered portion 1c having a width of 0.1 mm or less and an angle with the outer peripheral side surface of the insulating base 1 of 10 to 80 ° is formed at the corner between the outer peripheral side surface and the lower surface of the insulating base 1.The
[0035]
When the embodiment shown in FIG. 3 is manufactured, as shown in the sectional view of FIG. 8, the insulating substrate 11 to which the semiconductor elements 13a and 13b and the external lead terminals 12 are bonded is sealed on the lower surface side. An upper mold 41 having a cavity 41a having a shape corresponding to the upper half surface shape of the resin 16 and a lower mold 42 having a cavity 42a having a shape corresponding to the lower half surface shape of the sealing resin 16 on the upper surface side. 3 is set in a mold die 40, and a sealing resin 16 such as an epoxy resin is injected into the mold die 40 in a liquid state through a resin injection passage 43 and thermally cured. As shown, a semiconductor device in which one end of the insulating base 11, the semiconductor elements 13a and 13b, and the external lead terminal 12 is sealed with the sealing resin 16 is completed. In this case, since the side surface of the recess 11b of the insulating base 11 is a stepped surface having an inclination angle A of 10 to 80 °, for example, the insulating base 11 is set in the mold 40 and a liquid sealing resin is used. When 16 is injected, the liquid sealing resin 16 flows well along the side surface of the concave portion 11b having a stepped surface, and the concave portion 11b is filled with the sealing resin 16 without a gap. As a result, the sealing resin 16 No large voids are formed inside. When the inclination angle A of the side surface of the recess 11b is less than 10 °, it is necessary to make the size of the insulating substrate 11 extremely large in order to obtain a necessary depth as the recess 11b. On the other hand, when the angle exceeds 80 °, when the insulating base 11 is set in the mold 40 and the liquid sealing resin 16 is injected, the liquid resin 16 extends along the side surface of the recess 11b. Therefore, it does not flow well and it becomes difficult to fill the recess 11b with the sealing resin 16 without a gap. Therefore, the inclination angle A of the side surface of the recess 11b is preferably in the range of 10 to 80 °.
[0036]
The present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the gist of the present invention. For example, in the above-described embodiment, the insulating bases 1 and 11 are made of ceramics such as an aluminum oxide sintered body, but the insulating bases 1 and 11 are made of materials other than ceramics, such as thermosetting polyimide resin or BT. It may be formed of a resin (Bismaleimide Triazine Resin), a glass epoxy resin substrate, a glass plate, or the like. In the above-described embodiment, the wiring conductors 4 and 14 are formed from metal powder metallization such as tungsten metallization, but the wiring conductors 4 and 14 are formed from metal thin films such as copper, aluminum, and gold. Also good. Further, a capacitive element, a resistive element, or the like connected to the wiring conductors 4 and 14 may be disposed on the upper surface or inside the insulating bases 1 and 11. Furthermore, in the above-described embodiment, the semiconductor elements 3a, 3b, 13a, and 13b are connected to the wiring conductors 4 and 14 through the bonding wires 5a, 5b, 15a, and 15b. The electrodes 3b, 13a, and 13b may be connected to the wiring conductors 4 and 14 by flip chip connection.
[0037]
【The invention's effect】
  According to the semiconductor device of the present invention, since the side surface of the recess is an inclined surface or a stepped surface, the stress applied to the corner between the side surface and the bottom surface of the recess of the insulating base is favorably applied to the side surface of the recess. As a result, it is possible to provide a semiconductor device in which cracks are not generated in the insulating substrate, and the semiconductor element can be normally operated normally without breaking the wiring conductor. .In addition, since the chamfered portion is formed at the corner between the outer peripheral side surface and the lower surface of the insulating base, the sealing resin in contact with the corner is caused by the difference in thermal expansion coefficient between the insulating base and the sealing resin. The applied stress can be satisfactorily dispersed and relaxed, and the thickness between the corner and the side surface of the sealing resin is increased to effectively prevent cracking in the sealing resin. be able to.
[0038]
  In addition, according to the method for manufacturing a semiconductor device of the present invention, by setting the side surface of the concave portion of the insulating base as an inclined surface or a stepped surface, When the liquid sealing resin is injected, the liquid sealing resin flows well along the side surface of the recess, and as a result, the recess is well filled with the sealing resin, and a large void is formed in the sealing resin. As a result, air encapsulated in the voids does not thermally expand and the sealing resin does not peel or rupture. Thus, it is possible to provide a semiconductor device with excellent hermetic reliability that can be operated normally and stably.Further, by forming a chamfered portion at the corner between the outer peripheral side surface and the lower surface of the insulating substrate, when the liquid sealing resin is injected into the mold mold in which the insulating substrate is set, the insulating substrate The space between the cavity and the side of the cavity of the lower mold becomes wide, and the liquid sealing resin can be injected well between the lower surface of the insulating base and the lower mold.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing an example of an embodiment of a semiconductor device of the present invention.
FIG. 2 is a top view of the semiconductor device shown in FIG. 1 with the sealing resin 6 removed.
FIG. 3 is a cross-sectional view showing another example of the embodiment of the semiconductor device of the present invention.
FIG. 4 is a cross-sectional view for explaining the method for manufacturing a semiconductor device of the present invention.
FIG. 5 is a cross-sectional view for explaining the method for manufacturing a semiconductor device of the present invention.
FIG. 6 is a cross-sectional view for explaining the method for manufacturing a semiconductor device of the present invention.
FIG. 7 is a cross-sectional view for illustrating the method for manufacturing a semiconductor device of the present invention.
8 is a cross-sectional view for illustrating the method for manufacturing the semiconductor device shown in FIG. 3. FIG.
FIG. 9 is a cross-sectional view showing a conventional semiconductor device.
10 is a cross-sectional view for illustrating the method for manufacturing the semiconductor device shown in FIG. 9. FIG.
11 is a cross-sectional view for illustrating the method for manufacturing the semiconductor device shown in FIG. 9; FIG.
[Explanation of symbols]
1, 11 ... Insulating substrate
1a, 11a ... Semiconductor element mounting part
1b, 11b ......... concave
2, 12 ... External lead terminal
3a, 3b, 13a, 13b..Semiconductor element
4, 14 ... Wiring conductor
6, 16 ... Sealing resin

Claims (2)

面に半導体素子を収容するための凹部を有するとともに、該凹部の内側から面の外周部にかけて複数の配線導体が配設されて成る略四角平板状の絶縁基体と、前記凹部の底面に搭載された半導体素子と、一端部が前記配線導体の前記面の外周部に導出した部位に接合され、他端部が前記絶縁基体の外周側面から外側に突出した複数の外部リード端子と、前記絶縁基体および前記半導体素子ならびに前記外部リード端子の前記一端部を封止する封止樹脂とから成る半導体装置であって、前記凹部は、該凹部の側面を傾斜面または階段状面とし、前記絶縁基体は、前記外周側面と前記下面との間の角部に面取り部が形成されていることを特徴とする半導体装置。And has a recess for accommodating the semiconductor element under surface, a substantially rectangular flat plate-like insulating substrate comprising a plurality of wiring conductors to the outer portion of the upper surface is disposed from the inside of the recess, the bottom surface of the recess and the mounted semiconductor element is joined to the site where one end portion is led out to the outer peripheral portion of the upper surface of the wiring conductor, a plurality of external lead terminals projecting outward the other end from the outer peripheral side surface of the insulating substrate, A semiconductor device comprising the insulating base, the semiconductor element, and a sealing resin for sealing the one end of the external lead terminal, wherein the concave portion has a side surface of the concave portion as an inclined surface or a stepped surface, insulating substrate, and wherein a chamfered portion at a corner portion between the lower surface and the outer peripheral side are formed. 面に半導体素子を収容するための凹部を有するとともに、該凹部の内側から面の外周部にかけて複数の配線導体が配設されて成る略四角平板状の絶縁基体と、前記凹部の底面に搭載された半導体素子と、一端部が前記配線導体の前記面の外周部に導出した部位に接合され、他端部が前記絶縁基体の外周側面から外側に突出した複数の外部リード端子とを、前記絶縁基体の前記上面側および前記下面側にキャビティーを有するモールド金型内にセットするとともに、該モールド金型内に液状樹脂を注入して硬化させることによって、前記絶縁基体および前記半導体素子ならびに前記外部リード端子の一端部を封止樹脂により封止する半導体装置の製造方法であって、前記絶縁基体の前記凹部の側面を傾斜面または階段状面とし、前記絶縁基体の前記外周側面と前記下面との間の角部に面取り部を形成しておくことを特徴とする半導体装置の製造方法。And has a recess for accommodating the semiconductor element under surface, a substantially rectangular flat plate-like insulating substrate comprising a plurality of wiring conductors to the outer portion of the upper surface is disposed from the inside of the recess, the bottom surface of the recess and the mounted semiconductor element is joined to the site where one end portion is led out to the outer peripheral portion of the upper surface of the wiring conductor, and a plurality of external lead terminals other end protrudes outward from the outer peripheral side surface of the insulating substrate the thereby set in a mold having the upper surface side and a cavity on the bottom surface side of the insulating substrate, by curing the liquid resin injected to within the mold, the insulating substrate and the semiconductor A method of manufacturing a semiconductor device in which one end portion of an element and the external lead terminal is sealed with a sealing resin, wherein a side surface of the concave portion of the insulating base is an inclined surface or a stepped surface, and the insulation The method of manufacturing a semiconductor device, characterized in that to be formed a chamfered portion at a corner portion between the peripheral side surface and the lower surface of the body.
JP2000005766A 2000-01-06 2000-01-06 Semiconductor device and manufacturing method thereof Expired - Fee Related JP4369582B2 (en)

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