JP4355336B2 - バイポーラ接合トランジスタおよびその形成方法 - Google Patents
バイポーラ接合トランジスタおよびその形成方法 Download PDFInfo
- Publication number
- JP4355336B2 JP4355336B2 JP2006322586A JP2006322586A JP4355336B2 JP 4355336 B2 JP4355336 B2 JP 4355336B2 JP 2006322586 A JP2006322586 A JP 2006322586A JP 2006322586 A JP2006322586 A JP 2006322586A JP 4355336 B2 JP4355336 B2 JP 4355336B2
- Authority
- JP
- Japan
- Prior art keywords
- region
- sti
- collector
- porous
- active base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/40—Vertical BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/01—Manufacture or treatment
- H10D10/021—Manufacture or treatment of heterojunction BJTs [HBT]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/01—Manufacture or treatment
- H10D10/051—Manufacture or treatment of vertical BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/80—Heterojunction BJTs
- H10D10/821—Vertical heterojunction BJTs
- H10D10/891—Vertical heterojunction BJTs comprising lattice-mismatched active layers, e.g. SiGe strained-layer transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/113—Isolations within a component, i.e. internal isolations
- H10D62/115—Dielectric isolations, e.g. air gaps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/117—Shapes of semiconductor bodies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/177—Base regions of bipolar transistors, e.g. BJTs or IGBTs
Landscapes
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
- Element Separation (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/164,757 US7342293B2 (en) | 2005-12-05 | 2005-12-05 | Bipolar junction transistors (BJTS) with second shallow trench isolation (STI) regions, and methods for forming same |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2007158333A JP2007158333A (ja) | 2007-06-21 |
| JP2007158333A5 JP2007158333A5 (enExample) | 2008-12-11 |
| JP4355336B2 true JP4355336B2 (ja) | 2009-10-28 |
Family
ID=38117863
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006322586A Expired - Fee Related JP4355336B2 (ja) | 2005-12-05 | 2006-11-29 | バイポーラ接合トランジスタおよびその形成方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US7342293B2 (enExample) |
| JP (1) | JP4355336B2 (enExample) |
| CN (1) | CN1979889B (enExample) |
Families Citing this family (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006077502A1 (en) * | 2005-01-18 | 2006-07-27 | Nxp B.V. | Bipolar transistor and method of fabricating the same |
| CN100338454C (zh) * | 2005-05-17 | 2007-09-19 | 北京大学 | 旋转式气体收集装置 |
| US7964910B2 (en) * | 2007-10-17 | 2011-06-21 | International Business Machines Corporation | Planar field effect transistor structure having an angled crystallographic etch-defined source/drain recess and a method of forming the transistor structure |
| EP2281302B1 (en) | 2008-05-21 | 2012-12-26 | Nxp B.V. | A method of manufacturing a bipolar transistor semiconductor device |
| US7803685B2 (en) * | 2008-06-26 | 2010-09-28 | Freescale Semiconductor, Inc. | Silicided base structure for high frequency transistors |
| US8536012B2 (en) | 2011-07-06 | 2013-09-17 | International Business Machines Corporation | Bipolar junction transistors with a link region connecting the intrinsic and extrinsic bases |
| US8921195B2 (en) * | 2012-10-26 | 2014-12-30 | International Business Machines Corporation | Isolation scheme for bipolar transistors in BiCMOS technology |
| US8816401B2 (en) * | 2012-11-30 | 2014-08-26 | International Business Machines Corporation | Heterojunction bipolar transistor |
| US9093491B2 (en) * | 2012-12-05 | 2015-07-28 | International Business Machines Corporation | Bipolar junction transistors with reduced base-collector junction capacitance |
| US8956945B2 (en) | 2013-02-04 | 2015-02-17 | International Business Machines Corporation | Trench isolation for bipolar junction transistors in BiCMOS technology |
| US8796149B1 (en) | 2013-02-18 | 2014-08-05 | International Business Machines Corporation | Collector-up bipolar junction transistors in BiCMOS technology |
| US8927381B2 (en) | 2013-03-20 | 2015-01-06 | International Business Machines Corporation | Self-aligned bipolar junction transistors |
| US8975146B2 (en) | 2013-05-01 | 2015-03-10 | International Business Machines Corporation | Trench isolation structures and methods for bipolar junction transistors |
| US9029229B2 (en) * | 2013-05-29 | 2015-05-12 | International Business Machines Corporation | Semiconductor device and method of forming the device by forming monocrystalline semiconductor layers on a dielectric layer over isolation regions |
| US9059234B2 (en) | 2013-10-22 | 2015-06-16 | International Business Machines Corporation | Formation of a high aspect ratio trench in a semiconductor substrate and a bipolar semiconductor device having a high aspect ratio trench isolation region |
| US9059196B2 (en) | 2013-11-04 | 2015-06-16 | International Business Machines Corporation | Bipolar junction transistors with self-aligned terminals |
| US9059233B2 (en) * | 2013-11-19 | 2015-06-16 | International Business Machines Corporation | Formation of an asymmetric trench in a semiconductor substrate and a bipolar semiconductor device having an asymmetric trench isolation region |
| US9111986B2 (en) | 2014-01-09 | 2015-08-18 | International Business Machines Corporation | Self-aligned emitter-base-collector bipolar junction transistors with a single crystal raised extrinsic base |
| US9722057B2 (en) | 2015-06-23 | 2017-08-01 | Global Foundries Inc. | Bipolar junction transistors with a buried dielectric region in the active device region |
| US9368608B1 (en) | 2015-06-25 | 2016-06-14 | Globalfoundries Inc. | Heterojunction bipolar transistor with improved performance and breakdown voltage |
| EP3547371B1 (en) * | 2018-03-27 | 2025-10-15 | NXP USA, Inc. | Bipolar transistor and method of manufacturing a bipolar transistor |
| US12426278B2 (en) | 2022-10-26 | 2025-09-23 | Globalfoundries U.S. Inc. | Resistive memory elements accessed by bipolar junction transistors |
| CN118315274B (zh) * | 2024-06-11 | 2024-08-20 | 杭州积海半导体有限公司 | 双极器件及其制作方法 |
Family Cites Families (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3919060A (en) | 1974-06-14 | 1975-11-11 | Ibm | Method of fabricating semiconductor device embodying dielectric isolation |
| JPS59161867A (ja) * | 1983-03-07 | 1984-09-12 | Hitachi Ltd | 半導体装置 |
| JPH0240922A (ja) * | 1988-07-31 | 1990-02-09 | Nec Corp | 半導体装置 |
| US5892264A (en) * | 1993-10-04 | 1999-04-06 | Harris Corporation | High frequency analog transistors, method of fabrication and circuit implementation |
| KR20010021740A (ko) * | 1997-07-11 | 2001-03-15 | 에를링 블로메, 타게 뢰브그렌 | 무선 주파수에서 사용되는 집적 회로 소자를 제조하는 방법 |
| FR2779572B1 (fr) * | 1998-06-05 | 2003-10-17 | St Microelectronics Sa | Transistor bipolaire vertical a faible bruit et procede de fabrication correspondant |
| US6191447B1 (en) * | 1999-05-28 | 2001-02-20 | Micro-Ohm Corporation | Power semiconductor devices that utilize tapered trench-based insulating regions to improve electric field profiles in highly doped drift region mesas and methods of forming same |
| JP2001332563A (ja) * | 2000-05-23 | 2001-11-30 | Matsushita Electric Ind Co Ltd | バイポーラトランジスタ及びその製造方法 |
| US6617220B2 (en) * | 2001-03-16 | 2003-09-09 | International Business Machines Corporation | Method for fabricating an epitaxial base bipolar transistor with raised extrinsic base |
| US20050250289A1 (en) * | 2002-10-30 | 2005-11-10 | Babcock Jeffrey A | Control of dopant diffusion from buried layers in bipolar integrated circuits |
| JP4060580B2 (ja) * | 2001-11-29 | 2008-03-12 | 株式会社ルネサステクノロジ | ヘテロ接合バイポーラトランジスタ |
| US6579771B1 (en) * | 2001-12-10 | 2003-06-17 | Intel Corporation | Self aligned compact bipolar junction transistor layout, and method of making same |
| US6767798B2 (en) * | 2002-04-09 | 2004-07-27 | Maxim Integrated Products, Inc. | Method of forming self-aligned NPN transistor with raised extrinsic base |
| US6699741B1 (en) * | 2002-08-16 | 2004-03-02 | National Semiconductor Corporation | Single poly bipolar transistor and method that uses a selectively epitaxially grown highly-boron-doped silicon layer as a diffusion source for an extrinsic base region |
| US6909164B2 (en) * | 2002-11-25 | 2005-06-21 | International Business Machines Corporation | High performance vertical PNP transistor and method |
| US6864560B2 (en) * | 2003-03-28 | 2005-03-08 | International Business Machines Corporation | Bipolar transistor structure with a shallow isolation extension region providing reduced parasitic capacitance |
| US6858485B2 (en) * | 2003-05-07 | 2005-02-22 | International Business Machines Corporation | Method for creation of a very narrow emitter feature |
| JP4643130B2 (ja) * | 2003-06-19 | 2011-03-02 | 株式会社日立製作所 | 半導体装置およびその製造方法 |
| US6960820B2 (en) * | 2003-07-01 | 2005-11-01 | International Business Machines Corporation | Bipolar transistor self-alignment with raised extrinsic base extension and methods of forming same |
| WO2005006444A1 (ja) * | 2003-07-11 | 2005-01-20 | Matsushita Electric Industrial Co., Ltd. | ヘテロバイポーラトランジスタおよびその製造方法 |
| US7022578B2 (en) * | 2003-10-09 | 2006-04-04 | Chartered Semiconductor Manufacturing Ltd. | Heterojunction bipolar transistor using reverse emitter window |
| US7075126B2 (en) * | 2004-02-27 | 2006-07-11 | International Business Machines Corporation | Transistor structure with minimized parasitics and method of fabricating the same |
| US7118995B2 (en) * | 2004-05-19 | 2006-10-10 | International Business Machines Corporation | Yield improvement in silicon-germanium epitaxial growth |
| US7102205B2 (en) * | 2004-09-01 | 2006-09-05 | International Business Machines Corporation | Bipolar transistor with extrinsic stress layer |
| DE102005040624A1 (de) * | 2004-09-02 | 2006-03-09 | Fuji Electric Holdings Co., Ltd., Kawasaki | Halbleiterbauteil und Verfahren zu seiner Herstellung |
-
2005
- 2005-12-05 US US11/164,757 patent/US7342293B2/en not_active Expired - Fee Related
-
2006
- 2006-11-14 CN CN200610147094.0A patent/CN1979889B/zh not_active Expired - Fee Related
- 2006-11-29 JP JP2006322586A patent/JP4355336B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2007158333A (ja) | 2007-06-21 |
| US7342293B2 (en) | 2008-03-11 |
| US20070126080A1 (en) | 2007-06-07 |
| CN1979889A (zh) | 2007-06-13 |
| CN1979889B (zh) | 2011-07-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4355336B2 (ja) | バイポーラ接合トランジスタおよびその形成方法 | |
| KR100845175B1 (ko) | 반도체 디바이스 및 그 제조 방법 | |
| KR101057651B1 (ko) | 반도체 소자의 제조방법 | |
| US6787423B1 (en) | Strained-silicon semiconductor device | |
| KR20190037148A (ko) | 반도체 구조물 및 연관된 제조 방법 | |
| KR20060120488A (ko) | 트렌치 구조들을 가진 반도체 장치 및 이의 제조방법 | |
| KR20170128124A (ko) | 캐비티를 가진 반도체 장치 및 그 제조 방법 | |
| JP2009032967A (ja) | 半導体装置及びその製造方法 | |
| JP4202389B2 (ja) | バイポーラ半導体構成要素、特にバイポーラ・トランジスタ、および対応するバイポーラ半導体構成要素の製造方法 | |
| JP2010182912A (ja) | 半導体装置の製造方法 | |
| CN1956220A (zh) | 具有用于施加平面内剪切应力的介质应力产生区的晶体管及其制造方法 | |
| CN114256337B (zh) | 一种半导体器件及其制造方法 | |
| US5851901A (en) | Method of manufacturing an isolation region of a semiconductor device with advanced planarization | |
| CN100524700C (zh) | 制造平面隔离物以及相关的双极晶体管及BiCMOS电路装置的方法 | |
| US6927118B2 (en) | Method of fabricating a bipolar transistor utilizing a dry etching and a wet etching to define a base junction opening | |
| KR100275484B1 (ko) | 트렌치형 게이트 전극을 갖는 전력소자 제조방법 | |
| CN102714215A (zh) | 改进的沟槽终端结构 | |
| JP2010177474A (ja) | 半導体装置の製造方法 | |
| KR100249023B1 (ko) | 반도체장치의 소자격리방법 | |
| US20240290776A1 (en) | Integrated circuit structure in porous semiconductor region and method to form same | |
| KR100470161B1 (ko) | 트렌치를 이용한 반도체 소자분리막 제조 방법 | |
| US20070293016A1 (en) | Semiconductor structure including isolation region with variable linewidth and method for fabrication therof | |
| KR100675887B1 (ko) | 반도체 소자의 트렌치 소자분리막 및 그 형성 방법 | |
| KR20040059998A (ko) | 반도체 장치의 소자 분리막 형성방법 | |
| KR100672768B1 (ko) | 반도체 소자의 소자분리막 형성 방법 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20081024 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20081024 |
|
| A871 | Explanation of circumstances concerning accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A871 Effective date: 20081024 |
|
| A975 | Report on accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A971005 Effective date: 20081114 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20081202 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20090224 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20090526 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20090624 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20090728 |
|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20090731 |
|
| R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120807 Year of fee payment: 3 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120807 Year of fee payment: 3 |
|
| S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313113 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120807 Year of fee payment: 3 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| S202 | Request for registration of non-exclusive licence |
Free format text: JAPANESE INTERMEDIATE CODE: R315201 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120807 Year of fee payment: 3 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130807 Year of fee payment: 4 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| LAPS | Cancellation because of no payment of annual fees |