JP4351955B2 - 基準点の位置決定方法 - Google Patents
基準点の位置決定方法 Download PDFInfo
- Publication number
- JP4351955B2 JP4351955B2 JP2004165918A JP2004165918A JP4351955B2 JP 4351955 B2 JP4351955 B2 JP 4351955B2 JP 2004165918 A JP2004165918 A JP 2004165918A JP 2004165918 A JP2004165918 A JP 2004165918A JP 4351955 B2 JP4351955 B2 JP 4351955B2
- Authority
- JP
- Japan
- Prior art keywords
- reference point
- center
- alignment mark
- processing
- coordinate values
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03B—APPARATUS OR ARRANGEMENTS FOR TAKING PHOTOGRAPHS OR FOR PROJECTING OR VIEWING THEM; APPARATUS OR ARRANGEMENTS EMPLOYING ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ACCESSORIES THEREFOR
- G03B27/00—Photographic printing apparatus
- G03B27/32—Projection printing apparatus, e.g. enlarger, copying camera
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0008—Apparatus or processes for manufacturing printed circuits for aligning or positioning of tools relative to the circuit board
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
- H05K1/0269—Marks, test patterns or identification means for visual or optical inspection
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09918—Optically detected marks used for aligning tool relative to the PCB, e.g. for mounting of components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
Description
1a、1b、1c、1d パターン部
2〜5 パターン1b、1dの輪郭線
G1 中心G2〜G5の各座標値を平均した位置(加工上の基準点)
G2〜G5 輪郭線2〜5で囲まれる図形の中心
O1 設計上の基準点
Claims (3)
- 設計上の基準点に当該基準点を中心とし、複数のパターンからなるアライメントマークを設けておき、
前記それぞれのパターンの輪郭線によって囲まれる図形の中心の座標値(X座標値およびY座標値)を求め、得られた複数の中心の各座標値をX,Yの各方向毎に平均し、得られた各方向の平均値を、そのアライメントマークに関する加工上の基準点の座標値とすることを特徴とする基準点の位置決定方法。 - 予め定める規則に基づき、得られた複数の中心のうちのいくつかの中心を除外し、残りの中心の座標値を平均することにより、そのアライメントマークに関する加工上の基準点の座標値を求めることを特徴とする請求項1に記載の基準点の位置決定方法。
- 前記除外される中心は、いったん総ての中心の座標値を演算し、求められた中心から最も遠い中心であることを特徴とする請求項2に記載の基準点の位置決定方法。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004165918A JP4351955B2 (ja) | 2004-06-03 | 2004-06-03 | 基準点の位置決定方法 |
US11/141,393 US7522262B2 (en) | 2004-06-03 | 2005-06-01 | Method for determining position of reference point |
DE102005025474.8A DE102005025474B4 (de) | 2004-06-03 | 2005-06-02 | Verfahren zur Bestimmung einer Position eines Bezugspunktes |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004165918A JP4351955B2 (ja) | 2004-06-03 | 2004-06-03 | 基準点の位置決定方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005347552A JP2005347552A (ja) | 2005-12-15 |
JP4351955B2 true JP4351955B2 (ja) | 2009-10-28 |
Family
ID=35448521
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004165918A Expired - Fee Related JP4351955B2 (ja) | 2004-06-03 | 2004-06-03 | 基準点の位置決定方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7522262B2 (ja) |
JP (1) | JP4351955B2 (ja) |
DE (1) | DE102005025474B4 (ja) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8594983B2 (en) * | 2006-03-20 | 2013-11-26 | Duetto Integrated Systems, Inc. | System for manufacturing laminated circuit boards |
AT504382B1 (de) * | 2006-11-13 | 2008-07-15 | Great Computer Corp | Automatisches positionierungs-/gravier- oder schneideverfahren |
JP4671988B2 (ja) * | 2007-04-24 | 2011-04-20 | セイコープレシジョン株式会社 | 基準スケールとその製造方法、及び、加工装置 |
CN102662313B (zh) * | 2012-05-09 | 2016-03-23 | 上海华虹宏力半导体制造有限公司 | 光刻对准参数预测方法以及光刻方法 |
JP5868281B2 (ja) * | 2012-07-27 | 2016-02-24 | 京セラサーキットソリューションズ株式会社 | 配線基板 |
KR101857414B1 (ko) * | 2016-02-25 | 2018-05-15 | 주식회사 이오테크닉스 | 마킹 위치 보정장치 및 방법 |
DE102020103008A1 (de) * | 2020-02-06 | 2021-08-12 | HELLA GmbH & Co. KGaA | Leiterplatte |
CN112839447B (zh) * | 2021-01-25 | 2022-03-08 | 福立旺精密机电(中国)股份有限公司 | 提高层间对准精度的多层挠性板制备方法 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61125712A (ja) * | 1984-11-26 | 1986-06-13 | Matsushita Electric Works Ltd | 多層印刷配線板の孔穿設法 |
JPS62229831A (ja) * | 1985-10-25 | 1987-10-08 | Hitachi Ltd | パタ−ン検出装置 |
US20010049589A1 (en) * | 1993-01-21 | 2001-12-06 | Nikon Corporation | Alignment method and apparatus therefor |
US5907405A (en) * | 1995-09-01 | 1999-05-25 | Nikon Corporation | Alignment method and exposure system |
JP3548428B2 (ja) * | 1998-07-03 | 2004-07-28 | キヤノン株式会社 | 位置計測装置及びそれを用いたデバイスの製造方法 |
EP1164352A4 (en) * | 1999-02-17 | 2007-09-05 | Nikon Corp | POSITION DETECTION METHOD AND POSITION DETECTOR, EXPOSURE METHOD AND APPARATUS THEREFOR, DEVICE AND METHOD FOR MANUFACTURING THE SAME |
JP4112759B2 (ja) * | 1999-09-24 | 2008-07-02 | 株式会社東芝 | パターン測定方法 |
JP2001110697A (ja) * | 1999-10-04 | 2001-04-20 | Ushio Inc | 露光装置におけるマスクとワークの位置合わせ方法 |
JP2001291095A (ja) * | 2000-04-04 | 2001-10-19 | Matsushita Electric Ind Co Ltd | 位置認識マーク検出方法 |
JP4095391B2 (ja) * | 2002-09-24 | 2008-06-04 | キヤノン株式会社 | 位置検出方法 |
US6888260B2 (en) * | 2003-04-17 | 2005-05-03 | Infineon Technologies Aktiengesellschaft | Alignment or overlay marks for semiconductor processing |
-
2004
- 2004-06-03 JP JP2004165918A patent/JP4351955B2/ja not_active Expired - Fee Related
-
2005
- 2005-06-01 US US11/141,393 patent/US7522262B2/en active Active
- 2005-06-02 DE DE102005025474.8A patent/DE102005025474B4/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US20050270518A1 (en) | 2005-12-08 |
US7522262B2 (en) | 2009-04-21 |
JP2005347552A (ja) | 2005-12-15 |
DE102005025474A1 (de) | 2006-01-26 |
DE102005025474B4 (de) | 2017-06-22 |
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