JP4245294B2 - 半導体集積デバイスのインピーダンスをチューニングする方法および装置 - Google Patents

半導体集積デバイスのインピーダンスをチューニングする方法および装置 Download PDF

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JP4245294B2
JP4245294B2 JP2001503218A JP2001503218A JP4245294B2 JP 4245294 B2 JP4245294 B2 JP 4245294B2 JP 2001503218 A JP2001503218 A JP 2001503218A JP 2001503218 A JP2001503218 A JP 2001503218A JP 4245294 B2 JP4245294 B2 JP 4245294B2
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heating pulse
heating
impedance
dopant
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JP2003502841A5 (enExample
JP2003502841A (ja
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ガグノン，イブス
サバリア，イボン
ムニエール，ミッシェル
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カデカ マイクロサーキッツ， エルエルシー
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/40—Resistors
    • H10D1/47—Resistors having no potential barriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/22—Apparatus or processes specially adapted for manufacturing resistors adapted for trimming
    • H01C17/24—Apparatus or processes specially adapted for manufacturing resistors adapted for trimming by removing or adding resistive material
    • H01C17/242—Apparatus or processes specially adapted for manufacturing resistors adapted for trimming by removing or adding resistive material by laser
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/201—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
    • H10D84/204—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
    • H10D84/209—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of only resistors

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Plasma & Fusion (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
JP2001503218A 1999-06-14 2000-06-13 半導体集積デバイスのインピーダンスをチューニングする方法および装置 Expired - Fee Related JP4245294B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/332,059 1999-06-14
US09/332,059 US6329272B1 (en) 1999-06-14 1999-06-14 Method and apparatus for iteratively, selectively tuning the impedance of integrated semiconductor devices using a focussed heating source
PCT/CA2000/000715 WO2000077836A1 (en) 1999-06-14 2000-06-13 Method and apparatus for tuning the impedance of integrated semiconductor devices

Publications (3)

Publication Number Publication Date
JP2003502841A JP2003502841A (ja) 2003-01-21
JP2003502841A5 JP2003502841A5 (enExample) 2005-11-17
JP4245294B2 true JP4245294B2 (ja) 2009-03-25

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JP2001503218A Expired - Fee Related JP4245294B2 (ja) 1999-06-14 2000-06-13 半導体集積デバイスのインピーダンスをチューニングする方法および装置

Country Status (6)

Country Link
US (1) US6329272B1 (enExample)
EP (1) EP1188178A1 (enExample)
JP (1) JP4245294B2 (enExample)
AU (1) AU5382600A (enExample)
CA (2) CA2277607C (enExample)
WO (1) WO2000077836A1 (enExample)

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US6335208B1 (en) 1999-05-10 2002-01-01 Intersil Americas Inc. Laser decapsulation method
WO2004017409A1 (en) * 2002-08-14 2004-02-26 Technologies Ltrim Inc. Method for modifying the impedance of semiconductor devices using a focused heating source
CA2398166A1 (en) * 2002-08-14 2004-02-14 Technologies Ltrim Inc. Method for modifying the impedance of semiconductor devices using a focused heating source
US7714694B2 (en) * 2004-09-21 2010-05-11 Microbridge Technologies Canada, Inc. Compensating for linear and non-linear trimming-induced shift of temperature coefficient of resistance
US7261461B2 (en) * 2004-09-23 2007-08-28 Microbridge Technologies Inc. Measuring and trimming circuit components embedded in micro-platforms
US7426381B2 (en) * 2005-03-23 2008-09-16 Oracle International Corporation Device billing agent
US20070117227A1 (en) * 2005-11-23 2007-05-24 Gsi Group Corporation Method And System for Iteratively, Selectively Tuning A Parameter Of A Doped Workpiece Using A Pulsed Laser
CA2533225C (en) * 2006-01-19 2016-03-22 Technologies Ltrim Inc. A tunable semiconductor component provided with a current barrier
US20090075402A1 (en) * 2007-09-18 2009-03-19 Michel Meunier Manipulation of focused heating source based on in situ optical measurements
JP5302937B2 (ja) * 2010-07-20 2013-10-02 株式会社イー・エム・ディー 不純物活性化方法、半導体装置の製造方法
US11240881B2 (en) 2019-04-08 2022-02-01 Watlow Electric Manufacturing Company Method of manufacturing and adjusting a resistive heater

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Also Published As

Publication number Publication date
AU5382600A (en) 2001-01-02
US6329272B1 (en) 2001-12-11
WO2000077836A1 (en) 2000-12-21
CA2277607A1 (en) 2000-12-14
CA2277607C (en) 2009-07-07
CA2671386A1 (en) 2000-12-14
EP1188178A1 (en) 2002-03-20
JP2003502841A (ja) 2003-01-21

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