JP4199724B2 - 積層型半導体パッケージ - Google Patents
積層型半導体パッケージ Download PDFInfo
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- JP4199724B2 JP4199724B2 JP2004350620A JP2004350620A JP4199724B2 JP 4199724 B2 JP4199724 B2 JP 4199724B2 JP 2004350620 A JP2004350620 A JP 2004350620A JP 2004350620 A JP2004350620 A JP 2004350620A JP 4199724 B2 JP4199724 B2 JP 4199724B2
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- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
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- H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
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- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
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- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06527—Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
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- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
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- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
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- H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
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- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06572—Auxiliary carrier between devices, the carrier having an electrical connection structure
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- H—ELECTRICITY
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- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1017—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support
- H01L2225/1023—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support the support being an insulating substrate
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1047—Details of electrical connections between containers
- H01L2225/1058—Bump or bump-like electrical connections, e.g. balls, pillars, posts
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
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Description
11 チップ搭載領域
12 外側領域
13 開口部
14,15 配線
20 第1半導体チップ
30 第2テープ
33 開口部
34,35 配線
40 第2半導体チップ
50a,50b 外部接続端子(第1半田ボール)
60a,60b 仲介接続手段(第2半田ボール)
70,80 エラストマーシート
75,85,90 樹脂
Claims (11)
- . 第1テープに搭載された第1半導体チップと、
前記第1半導体チップの上部に積層された第2テープに搭載された第2半導体チップと、
前記第1テープに接する外部接続端子と、
前記第1テープに設けられ、前記外部接続端子と分岐点とを接続する共通配線と、
前記第1テープに設けられ、前記分岐点と前記第1半導体チップのパッドとを接続する第1半導体チップ用配線と、
前記分岐点及び前記第2テープに接して配置される仲介接続手段と、
前記第2テープに設けられ、前記仲介接続手段と前記第2半導体チップのパッドとを接続する第2半導体チップ用配線と、を備え、
前記分岐点は、前記第1半導体チップ用配線の長さと前記第2半導体チップ用配線の長さとが等しくなるように配置されていることを特徴とする積層型半導体パッケージ。 - 第1主面側に搭載された第1半導体チップと、第2主面側に設けられた外部接続端子接続部と、前記外部接続端子接続部に接する外部接続端子と、前記外部接続端子接続部から前記第1主面側に貫通する第1ビアと、前記第1ビアと分岐点とを接続するために第1主面側に設けられた共通配線と、前記分岐点と前記第1半導体チップのパッドとを接続するために前記第1主面側に設けられた第1半導体チップ用配線と、を備える第1テープと、
前記第1主面側に搭載された第2半導体チップと、前記第2主面側に設けられた仲介接続手段接続部と、前記仲介接続手段接続部から前記第1主面側に貫通する第2ビアと、前記第2ビアと前記第2半導体チップのパッドとを接続するために前記第1主面側に設けられた第2半導体チップ用配線と、を備える第2テープと、
前記分岐点及び前記仲介接続手段接続部に接して前記第1テープと前記第2テープとの間に配置される仲介接続手段と、を含み、
前記分岐点は、前記第1半導体チップ用配線の長さと前記第2半導体チップ用配線の長さとが等しくなるように配置されていることを特徴とする積層型半導体パッケージ。 - 前記分岐点が、前記第1テープにおける前記第1半導体チップが位置する領域の外側に設けられたことを特徴とする請求項1又は請求項2に記載の積層型半導体パッケージ。
- 第1テープ上に搭載された第1半導体チップと、
第2テープ上に搭載された第2半導体チップと、
外部接続端子と、を備え、
前記第1半導体チップの上層に前記第2半導体チップを積層した積層型半導体パッケージであって、
前記外部接続端子と前記第1テープ上の前記第1半導体チップが位置する領域の外側に設けられた分岐点とを接続するように前記第1テープに配置された共通配線と、
前記分岐点と前記第1半導体チップのパッドとを接続するように前記第1テープに配置された第1半導体チップ用配線と、
前記分岐点に接続し、前記第1テープ上の配線と前記第2テープ上の配線を接続するための仲介接続手段と、
前記仲介接続手段と前記第2半導体チップ上のパッドとを接続するように前記第2テープに配置された第2半導体チップ用配線と、を備え、
前記第1半導体チップ用配線の長さと前記第2半導体チップ用配線の長さとが等しいことを特徴とする積層型半導体パッケージ。 - 前記外部接続端子は半田ボールである、ことを特徴とする請求項1から請求項4のいずれか一項に記載の積層型半導体パッケージ。
- 前記仲介接続手段に半田ボールを含む、ことを特徴とする請求項1から請求項5のいずれか一項に記載の積層型半導体パッケージ。
- 前記第1テープは表面及び裏面を有する第1テープ基体を備えており、
前記共通配線は前記第1テープ基体の表面に形成されており、
前記第1テープ基体の裏面には、全面に亘り固定電位を供給され、前記共通配線とは絶縁された第1リファレンスプレーンが形成されており、
前記第2テープは表面及び裏面を有する第2テープ基体を備えており、
前記第2半導体チップ用配線は前記第2テープ基体の表面に形成されており、
前記第2テープ基体の裏面には、全面に亘り固定電位を供給され、前記第2半導体チップ用配線とは絶縁された第2リファレンスプレーンが形成されていることを特徴とする請求項1から請求項6のいずれか一項に記載の積層型半導体パッケージ。 - 前記第1および第2半導体チップが共にDRAMチップである、ことを特徴とする請求項1から請求項7のいずれか一項に記載の積層型半導体パッケージ。
- 前記第1および第2半導体チップはいずれもチップの中央部分に前記パッドが配列されている、ことを特徴とする請求項8に記載の積層型半導体パッケージ。
- 前記第1半導体チップと前記第1テープとの間又は前記第2半導体チップと前記第2テープとの間にはエラストマーシートが設けられている、ことを特徴とする請求項1から請求項9のいずれか一項に記載の積層型半導体パッケージ。
- 前記第2半導体チップの上層に、さらに別の半導体チップが積層され、前記仲介接続手段と導通する配線によって接続する、ことを特徴とする請求項1から請求項10のいずれか一項に記載の積層型半導体パッケージ。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004350620A JP4199724B2 (ja) | 2004-12-03 | 2004-12-03 | 積層型半導体パッケージ |
US11/291,780 US7375422B2 (en) | 2004-12-03 | 2005-12-02 | Stacked-type semiconductor package |
US12/081,264 US7714424B2 (en) | 2004-12-03 | 2008-04-14 | Stacked-type semiconductor package |
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Application Number | Priority Date | Filing Date | Title |
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JP2004350620A JP4199724B2 (ja) | 2004-12-03 | 2004-12-03 | 積層型半導体パッケージ |
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JP2006165077A JP2006165077A (ja) | 2006-06-22 |
JP4199724B2 true JP4199724B2 (ja) | 2008-12-17 |
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Families Citing this family (10)
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JP5259059B2 (ja) * | 2006-07-04 | 2013-08-07 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US7659608B2 (en) * | 2006-09-15 | 2010-02-09 | Stats Chippac Ltd. | Stacked die semiconductor device having circuit tape |
US8130512B2 (en) * | 2008-11-18 | 2012-03-06 | Stats Chippac Ltd. | Integrated circuit package system and method of package stacking |
JP2010192680A (ja) * | 2009-02-18 | 2010-09-02 | Elpida Memory Inc | 半導体装置 |
JP5143211B2 (ja) * | 2009-12-28 | 2013-02-13 | パナソニック株式会社 | 半導体モジュール |
KR101078741B1 (ko) | 2009-12-31 | 2011-11-02 | 주식회사 하이닉스반도체 | 반도체 패키지 및 이를 갖는 적층 반도체 패키지 |
US8618654B2 (en) | 2010-07-20 | 2013-12-31 | Marvell World Trade Ltd. | Structures embedded within core material and methods of manufacturing thereof |
TWI406376B (zh) * | 2010-06-15 | 2013-08-21 | Powertech Technology Inc | 晶片封裝構造 |
US8907470B2 (en) | 2013-02-21 | 2014-12-09 | International Business Machines Corporation | Millimeter wave wafer level chip scale packaging (WLCSP) device and related method |
US10403604B2 (en) | 2015-11-05 | 2019-09-03 | Intel Corporation | Stacked package assembly with voltage reference plane |
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KR100391843B1 (ko) * | 2001-03-26 | 2003-07-16 | 엘지.필립스 엘시디 주식회사 | 액정 표시 장치의 실장 방법 및 그 구조 |
JP3850712B2 (ja) | 2001-10-29 | 2006-11-29 | シャープ株式会社 | 積層型半導体装置 |
JP4039121B2 (ja) | 2002-05-21 | 2008-01-30 | イビデン株式会社 | メモリモジュール |
JP4072505B2 (ja) | 2003-02-28 | 2008-04-09 | エルピーダメモリ株式会社 | 積層型半導体パッケージ |
JP2004335624A (ja) * | 2003-05-06 | 2004-11-25 | Hitachi Ltd | 半導体モジュール |
US7145226B2 (en) * | 2003-06-30 | 2006-12-05 | Intel Corporation | Scalable microelectronic package using conductive risers |
KR100621992B1 (ko) * | 2003-11-19 | 2006-09-13 | 삼성전자주식회사 | 이종 소자들의 웨이퍼 레벨 적층 구조와 방법 및 이를이용한 시스템-인-패키지 |
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JP2006165077A (ja) | 2006-06-22 |
US20060118937A1 (en) | 2006-06-08 |
US20080203584A1 (en) | 2008-08-28 |
US7375422B2 (en) | 2008-05-20 |
US7714424B2 (en) | 2010-05-11 |
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