JP4128319B2 - マルチチップボンディング方法及び装置 - Google Patents

マルチチップボンディング方法及び装置 Download PDF

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Publication number
JP4128319B2
JP4128319B2 JP36616399A JP36616399A JP4128319B2 JP 4128319 B2 JP4128319 B2 JP 4128319B2 JP 36616399 A JP36616399 A JP 36616399A JP 36616399 A JP36616399 A JP 36616399A JP 4128319 B2 JP4128319 B2 JP 4128319B2
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JP
Japan
Prior art keywords
substrate
bonding
wafer ring
supply
adhesive
Prior art date
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Expired - Fee Related
Application number
JP36616399A
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English (en)
Japanese (ja)
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JP2001185565A (ja
JP2001185565A5 (enExample
Inventor
力 巳亦
修 角谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinkawa Ltd
Original Assignee
Shinkawa Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinkawa Ltd filed Critical Shinkawa Ltd
Priority to JP36616399A priority Critical patent/JP4128319B2/ja
Priority to TW089124040A priority patent/TW533520B/zh
Priority to KR10-2000-0076964A priority patent/KR100400106B1/ko
Priority to US09/748,812 priority patent/US6383844B2/en
Publication of JP2001185565A publication Critical patent/JP2001185565A/ja
Publication of JP2001185565A5 publication Critical patent/JP2001185565A5/ja
Application granted granted Critical
Publication of JP4128319B2 publication Critical patent/JP4128319B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H10P72/0446—
    • H10W72/071—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/907—Continuous processing

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
JP36616399A 1999-12-24 1999-12-24 マルチチップボンディング方法及び装置 Expired - Fee Related JP4128319B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP36616399A JP4128319B2 (ja) 1999-12-24 1999-12-24 マルチチップボンディング方法及び装置
TW089124040A TW533520B (en) 1999-12-24 2000-11-14 Multi-chip bonding method and apparatus
KR10-2000-0076964A KR100400106B1 (ko) 1999-12-24 2000-12-15 멀티칩 본딩 방법 및 장치
US09/748,812 US6383844B2 (en) 1999-12-24 2000-12-26 Multi-chip bonding method and apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP36616399A JP4128319B2 (ja) 1999-12-24 1999-12-24 マルチチップボンディング方法及び装置

Publications (3)

Publication Number Publication Date
JP2001185565A JP2001185565A (ja) 2001-07-06
JP2001185565A5 JP2001185565A5 (enExample) 2006-04-27
JP4128319B2 true JP4128319B2 (ja) 2008-07-30

Family

ID=18486081

Family Applications (1)

Application Number Title Priority Date Filing Date
JP36616399A Expired - Fee Related JP4128319B2 (ja) 1999-12-24 1999-12-24 マルチチップボンディング方法及び装置

Country Status (4)

Country Link
US (1) US6383844B2 (enExample)
JP (1) JP4128319B2 (enExample)
KR (1) KR100400106B1 (enExample)
TW (1) TW533520B (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3667241B2 (ja) * 2001-03-09 2005-07-06 松下電器産業株式会社 ボンディング方法および装置
JP4800524B2 (ja) * 2001-09-10 2011-10-26 ルネサスエレクトロニクス株式会社 半導体装置の製造方法、及び、製造装置
JP4390503B2 (ja) * 2003-08-27 2009-12-24 パナソニック株式会社 部品実装装置及び部品実装方法
US7244636B2 (en) * 2005-10-19 2007-07-17 Texas Instruments Incorporated Semiconductor assembly for improved device warpage and solder ball coplanarity
EP1941536B8 (de) * 2005-10-26 2019-06-19 Kulicke and Soffa (Switzerland) Management GmbH Verfahren und vorrichtung zum ablegen von elektronischen bauteilen, insbesondere halbleiterchips, auf einem substrat
JP4714026B2 (ja) * 2006-01-10 2011-06-29 株式会社東芝 電子部品実装装置、電子部品実装方法及び電子部品装置
US7677431B2 (en) * 2006-10-19 2010-03-16 Asm Technology Singapore Pte Ltd. Electronic device handler for a bonding apparatus
KR100787968B1 (ko) 2007-02-13 2007-12-24 세광테크 주식회사 칩공급부가 구비된 ｃｏｇ 장치
EP2299486B1 (de) * 2009-09-18 2015-02-18 EV Group E. Thallner GmbH Verfahren zum Bonden von Chips auf Wafer
US8546802B2 (en) * 2011-11-07 2013-10-01 Taiwan Semiconductor Manufacturing Company, Ltd. Pick-and-place tool for packaging process
US9105760B2 (en) 2011-11-07 2015-08-11 Taiwan Semiconductor Manufacturing Company, Ltd. Pick-and-place tool for packaging process
JP5959948B2 (ja) * 2012-06-13 2016-08-02 キヤノンマシナリー株式会社 ウエハリング交換装置およびチップ実装装置
JP5959949B2 (ja) * 2012-06-13 2016-08-02 キヤノンマシナリー株式会社 チップ実装装置
KR101422401B1 (ko) * 2013-04-03 2014-07-22 세메스 주식회사 발광 소자 칩 본딩 장치
TWI607587B (zh) * 2016-09-13 2017-12-01 台灣琭旦股份有限公司 固晶穩固製程
CN110891726B (zh) * 2017-04-04 2021-08-24 库利克和索夫工业公司 超声焊接系统及其使用方法
CN109638142A (zh) * 2019-01-22 2019-04-16 先进光电器材（深圳）有限公司 晶环装置
WO2023100831A1 (ja) * 2021-11-30 2023-06-08 ボンドテック株式会社 チップ周部剥離装置、チップ供給装置、チップ供給システム、チップ接合システム、ピックアップ装置、チップ周部剥離方法、チップ供給方法、チップ接合方法およびピックアップ方法
CN115714101B (zh) * 2022-11-09 2023-11-14 长园半导体设备(珠海)有限公司 上料装置及切换方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5528397A (en) * 1991-12-03 1996-06-18 Kopin Corporation Single crystal silicon transistors for display panels
US5273622A (en) * 1991-01-28 1993-12-28 Sarcos Group System for continuous fabrication of micro-structures and thin film semiconductor devices on elongate substrates
JP2666788B2 (ja) * 1995-10-19 1997-10-22 日本電気株式会社 チップサイズ半導体装置の製造方法
JP3504543B2 (ja) * 1999-03-03 2004-03-08 株式会社日立製作所 半導体素子の分離方法およびその装置並びに半導体素子の搭載方法
US6312974B1 (en) * 2000-10-26 2001-11-06 Industrial Technology Research Institute Simultaneous bumping/bonding process utilizing edge-type conductive pads and device fabricated

Also Published As

Publication number Publication date
KR20010062479A (ko) 2001-07-07
JP2001185565A (ja) 2001-07-06
TW533520B (en) 2003-05-21
US6383844B2 (en) 2002-05-07
KR100400106B1 (ko) 2003-09-29
US20010005602A1 (en) 2001-06-28

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