JP4006447B2 - 半導体装置およびプリント回路板 - Google Patents

半導体装置およびプリント回路板 Download PDF

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Publication number
JP4006447B2
JP4006447B2 JP2005045617A JP2005045617A JP4006447B2 JP 4006447 B2 JP4006447 B2 JP 4006447B2 JP 2005045617 A JP2005045617 A JP 2005045617A JP 2005045617 A JP2005045617 A JP 2005045617A JP 4006447 B2 JP4006447 B2 JP 4006447B2
Authority
JP
Japan
Prior art keywords
electrode pad
interposer substrate
signal wiring
signal
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2005045617A
Other languages
English (en)
Japanese (ja)
Other versions
JP2005328032A5 (enExample
JP2005328032A (ja
Inventor
徹 逢坂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2005045617A priority Critical patent/JP4006447B2/ja
Priority to US11/094,136 priority patent/US7349224B2/en
Publication of JP2005328032A publication Critical patent/JP2005328032A/ja
Publication of JP2005328032A5 publication Critical patent/JP2005328032A5/ja
Application granted granted Critical
Publication of JP4006447B2 publication Critical patent/JP4006447B2/ja
Priority to US11/960,161 priority patent/US7495928B2/en
Priority to US12/255,789 priority patent/US7839652B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/0243—Printed circuits associated with mounted high frequency components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09218—Conductive traces
    • H05K2201/09227—Layout details of a plurality of traces, e.g. escape layout for Ball Grid Array [BGA] mounting
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/0979—Redundant conductors or connections, i.e. more than one current path between two points
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10022—Non-printed resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10734—Ball grid array [BGA]; Bump grid array
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/241—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
    • H05K3/242—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus characterised by using temporary conductors on the printed circuit for electrically connecting areas which are to be electroplated

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
JP2005045617A 2004-04-16 2005-02-22 半導体装置およびプリント回路板 Expired - Fee Related JP4006447B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2005045617A JP4006447B2 (ja) 2004-04-16 2005-02-22 半導体装置およびプリント回路板
US11/094,136 US7349224B2 (en) 2004-04-16 2005-03-31 Semiconductor device and printed circuit board
US11/960,161 US7495928B2 (en) 2004-04-16 2007-12-19 Semiconductor device and printed circuit board
US12/255,789 US7839652B2 (en) 2004-04-16 2008-10-22 Semiconductor device and printed circuit board

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2004121434 2004-04-16
JP2005045617A JP4006447B2 (ja) 2004-04-16 2005-02-22 半導体装置およびプリント回路板

Publications (3)

Publication Number Publication Date
JP2005328032A JP2005328032A (ja) 2005-11-24
JP2005328032A5 JP2005328032A5 (enExample) 2006-09-14
JP4006447B2 true JP4006447B2 (ja) 2007-11-14

Family

ID=35095448

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005045617A Expired - Fee Related JP4006447B2 (ja) 2004-04-16 2005-02-22 半導体装置およびプリント回路板

Country Status (2)

Country Link
US (3) US7349224B2 (enExample)
JP (1) JP4006447B2 (enExample)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100541655B1 (ko) * 2004-01-07 2006-01-11 삼성전자주식회사 패키지 회로기판 및 이를 이용한 패키지
US9545009B2 (en) * 2007-05-23 2017-01-10 Spectra Logic, Corporation Passive alterable electrical component
US8830690B2 (en) * 2008-09-25 2014-09-09 International Business Machines Corporation Minimizing plating stub reflections in a chip package using capacitance
WO2010041376A1 (ja) * 2008-10-08 2010-04-15 パナソニック株式会社 インターポーザ基板及び半導体装置
US8110500B2 (en) * 2008-10-21 2012-02-07 International Business Machines Corporation Mitigation of plating stub resonance by controlling surface roughness
CN101877935B (zh) * 2009-04-29 2012-06-20 鸿富锦精密工业（深圳）有限公司 主板布局布线方法及利用该方法布局布线的主板
US20110103030A1 (en) * 2009-11-02 2011-05-05 International Business Machines Corporation Packages and Methods for Mitigating Plating Stub Effects
US8102042B2 (en) * 2009-12-03 2012-01-24 International Business Machines Corporation Reducing plating stub reflections in a chip package using resistive coupling
JP5534025B2 (ja) * 2010-11-10 2014-06-25 富士通株式会社 半導体パッケージの端子の割り付け方法、半導体パッケージの端子の割り付け支援装置、半導体パッケージ、および、半導体パッケージの端子の割り付け方法を実行するプログラム
US8402406B2 (en) 2010-12-28 2013-03-19 International Business Machines Corporation Controlling plating stub reflections in a chip package
US9538637B2 (en) * 2011-06-29 2017-01-03 Finisar Corporation Multichannel RF feedthroughs
KR20130016875A (ko) * 2011-08-09 2013-02-19 현대자동차주식회사 하이브리드 차량
DE102012215021A1 (de) * 2012-08-23 2014-02-27 Robert Bosch Gmbh Leiterplattenkontaktierung
JP6091239B2 (ja) * 2013-02-13 2017-03-08 キヤノン株式会社 プリント回路板、プリント配線板および電子機器
US20140326489A1 (en) * 2013-05-03 2014-11-06 Dell Products L.P. Systems and methods for decreasing stub resonance of plating for circuit boards
KR102198858B1 (ko) 2014-07-24 2021-01-05 삼성전자 주식회사 인터포저 기판을 갖는 반도체 패키지 적층 구조체
JP6438792B2 (ja) * 2015-02-17 2018-12-19 ルネサスエレクトロニクス株式会社 半導体装置
US9748168B2 (en) * 2015-10-29 2017-08-29 Nxp Usa, Inc. Substrate with routing
JP6372511B2 (ja) * 2016-04-01 2018-08-15 住友大阪セメント株式会社 光変調器
CN106973487A (zh) * 2017-04-27 2017-07-21 晶晨半导体(上海)有限公司 一种双层印制电路板及电子设备
KR102678311B1 (ko) * 2018-08-30 2024-06-25 삼성전자주식회사 패키지 볼을 갖는 반도체 패키지를 포함하는 전자 소자
TWI854533B (zh) * 2023-03-17 2024-09-01 群聯電子股份有限公司 差分線的佈線結構、記憶體儲存裝置及記憶體控制電路單元
TWI887975B (zh) * 2024-01-24 2025-06-21 瑞昱半導體股份有限公司 積體電路封裝基板及電路佈局優化方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3437477B2 (ja) * 1999-02-10 2003-08-18 シャープ株式会社 配線基板および半導体装置
JP2001110927A (ja) 1999-10-04 2001-04-20 Matsushita Electronics Industry Corp 半導体装置
JP3429718B2 (ja) * 1999-10-28 2003-07-22 新光電気工業株式会社 表面実装用基板及び表面実装構造
JP3745276B2 (ja) * 2001-01-17 2006-02-15 キヤノン株式会社 多層プリント配線板
US6812580B1 (en) * 2003-06-09 2004-11-02 Freescale Semiconductor, Inc. Semiconductor package having optimized wire bond positioning
JP4533173B2 (ja) * 2004-02-24 2010-09-01 キヤノン株式会社 半導体集積回路装置

Also Published As

Publication number Publication date
US7495928B2 (en) 2009-02-24
US20090051015A1 (en) 2009-02-26
US20050230823A1 (en) 2005-10-20
US20080128873A1 (en) 2008-06-05
JP2005328032A (ja) 2005-11-24
US7839652B2 (en) 2010-11-23
US7349224B2 (en) 2008-03-25

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