JP3901906B2 - 半導体集積回路装置 - Google Patents

半導体集積回路装置 Download PDF

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Publication number
JP3901906B2
JP3901906B2 JP2000044307A JP2000044307A JP3901906B2 JP 3901906 B2 JP3901906 B2 JP 3901906B2 JP 2000044307 A JP2000044307 A JP 2000044307A JP 2000044307 A JP2000044307 A JP 2000044307A JP 3901906 B2 JP3901906 B2 JP 3901906B2
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JP
Japan
Prior art keywords
input
signal
circuit
logic
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2000044307A
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English (en)
Japanese (ja)
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JP2001237691A (ja
JP2001237691A5 (enExample
Inventor
西 昌 平 香
田 基 嗣 濱
田 忠 広 黒
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2000044307A priority Critical patent/JP3901906B2/ja
Priority to TW090103704A priority patent/TW483116B/zh
Priority to US09/788,413 priority patent/US6476639B2/en
Priority to KR10-2001-0008964A priority patent/KR100392038B1/ko
Publication of JP2001237691A publication Critical patent/JP2001237691A/ja
Publication of JP2001237691A5 publication Critical patent/JP2001237691A5/ja
Application granted granted Critical
Publication of JP3901906B2 publication Critical patent/JP3901906B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00323—Delay compensation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0005—Modifications of input or output impedance

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2000044307A 2000-02-22 2000-02-22 半導体集積回路装置 Expired - Fee Related JP3901906B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2000044307A JP3901906B2 (ja) 2000-02-22 2000-02-22 半導体集積回路装置
TW090103704A TW483116B (en) 2000-02-22 2001-02-19 Semiconductor integrated circuit device
US09/788,413 US6476639B2 (en) 2000-02-22 2001-02-21 Semiconductor integrated circuit device capable of producing output thereof without being influenced by other input
KR10-2001-0008964A KR100392038B1 (ko) 2000-02-22 2001-02-22 반도체 집적 회로 장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000044307A JP3901906B2 (ja) 2000-02-22 2000-02-22 半導体集積回路装置

Publications (3)

Publication Number Publication Date
JP2001237691A JP2001237691A (ja) 2001-08-31
JP2001237691A5 JP2001237691A5 (enExample) 2005-06-09
JP3901906B2 true JP3901906B2 (ja) 2007-04-04

Family

ID=18567085

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000044307A Expired - Fee Related JP3901906B2 (ja) 2000-02-22 2000-02-22 半導体集積回路装置

Country Status (4)

Country Link
US (1) US6476639B2 (enExample)
JP (1) JP3901906B2 (enExample)
KR (1) KR100392038B1 (enExample)
TW (1) TW483116B (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7006962B1 (en) * 2001-11-29 2006-02-28 Lsi Logic Corporation Distributed delay prediction of multi-million gate deep sub-micron ASIC designs
US9638743B2 (en) * 2014-01-16 2017-05-02 Qualcomm Incorporated State-dependent capacitance estimation
CN115685626B (zh) 2016-11-18 2025-10-28 奇跃公司 用于重定向具有宽入射角范围的光的多层液晶衍射光栅
WO2018175343A1 (en) 2017-03-21 2018-09-27 Magic Leap, Inc. Eye-imaging apparatus using diffractive optical elements

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6342090A (ja) * 1986-08-07 1988-02-23 Fujitsu Ltd ユニバーサルジョイント
US5391941A (en) * 1993-09-23 1995-02-21 Cypress Semiconductor Corporation Decoder circuitry with balanced propagation delay and minimized input capacitance
US5793551A (en) * 1995-06-07 1998-08-11 Vtc Inc. Amplifier having a differential input capacitance cancellation circuit
JP3178371B2 (ja) 1997-05-06 2001-06-18 日本電気株式会社 半導体集積回路の設計方法

Also Published As

Publication number Publication date
KR20010083242A (ko) 2001-08-31
JP2001237691A (ja) 2001-08-31
US6476639B2 (en) 2002-11-05
TW483116B (en) 2002-04-11
US20010015658A1 (en) 2001-08-23
KR100392038B1 (ko) 2003-07-23

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