TW483116B - Semiconductor integrated circuit device - Google Patents
Semiconductor integrated circuit device Download PDFInfo
- Publication number
- TW483116B TW483116B TW090103704A TW90103704A TW483116B TW 483116 B TW483116 B TW 483116B TW 090103704 A TW090103704 A TW 090103704A TW 90103704 A TW90103704 A TW 90103704A TW 483116 B TW483116 B TW 483116B
- Authority
- TW
- Taiwan
- Prior art keywords
- input
- signal
- circuit
- semiconductor integrated
- integrated circuit
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 100
- 230000002079 cooperative effect Effects 0.000 claims description 7
- 229910044991 metal oxide Inorganic materials 0.000 claims description 4
- 150000004706 metal oxides Chemical class 0.000 claims description 4
- 239000013078 crystal Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 27
- 230000000694 effects Effects 0.000 description 14
- 239000003990 capacitor Substances 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 2
- 230000000875 corresponding effect Effects 0.000 description 2
- 101150035718 Pno1 gene Proteins 0.000 description 1
- 238000003339 best practice Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005034 decoration Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 210000002784 stomach Anatomy 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00323—Delay compensation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0005—Modifications of input or output impedance
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000044307A JP3901906B2 (ja) | 2000-02-22 | 2000-02-22 | 半導体集積回路装置 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW483116B true TW483116B (en) | 2002-04-11 |
Family
ID=18567085
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW090103704A TW483116B (en) | 2000-02-22 | 2001-02-19 | Semiconductor integrated circuit device |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6476639B2 (enExample) |
| JP (1) | JP3901906B2 (enExample) |
| KR (1) | KR100392038B1 (enExample) |
| TW (1) | TW483116B (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7006962B1 (en) * | 2001-11-29 | 2006-02-28 | Lsi Logic Corporation | Distributed delay prediction of multi-million gate deep sub-micron ASIC designs |
| US9638743B2 (en) * | 2014-01-16 | 2017-05-02 | Qualcomm Incorporated | State-dependent capacitance estimation |
| CN115685626B (zh) | 2016-11-18 | 2025-10-28 | 奇跃公司 | 用于重定向具有宽入射角范围的光的多层液晶衍射光栅 |
| WO2018175343A1 (en) | 2017-03-21 | 2018-09-27 | Magic Leap, Inc. | Eye-imaging apparatus using diffractive optical elements |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6342090A (ja) * | 1986-08-07 | 1988-02-23 | Fujitsu Ltd | ユニバーサルジョイント |
| US5391941A (en) * | 1993-09-23 | 1995-02-21 | Cypress Semiconductor Corporation | Decoder circuitry with balanced propagation delay and minimized input capacitance |
| US5793551A (en) * | 1995-06-07 | 1998-08-11 | Vtc Inc. | Amplifier having a differential input capacitance cancellation circuit |
| JP3178371B2 (ja) | 1997-05-06 | 2001-06-18 | 日本電気株式会社 | 半導体集積回路の設計方法 |
-
2000
- 2000-02-22 JP JP2000044307A patent/JP3901906B2/ja not_active Expired - Fee Related
-
2001
- 2001-02-19 TW TW090103704A patent/TW483116B/zh not_active IP Right Cessation
- 2001-02-21 US US09/788,413 patent/US6476639B2/en not_active Expired - Fee Related
- 2001-02-22 KR KR10-2001-0008964A patent/KR100392038B1/ko not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| KR20010083242A (ko) | 2001-08-31 |
| JP2001237691A (ja) | 2001-08-31 |
| US6476639B2 (en) | 2002-11-05 |
| US20010015658A1 (en) | 2001-08-23 |
| KR100392038B1 (ko) | 2003-07-23 |
| JP3901906B2 (ja) | 2007-04-04 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GD4A | Issue of patent certificate for granted invention patent | ||
| MM4A | Annulment or lapse of patent due to non-payment of fees |