TW322661B - - Google Patents
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- Publication number
- TW322661B TW322661B TW085111418A TW85111418A TW322661B TW 322661 B TW322661 B TW 322661B TW 085111418 A TW085111418 A TW 085111418A TW 85111418 A TW85111418 A TW 85111418A TW 322661 B TW322661 B TW 322661B
- Authority
- TW
- Taiwan
- Prior art keywords
- buffer
- latch
- gate
- input
- slave
- Prior art date
Links
- 239000000872 buffer Substances 0.000 claims description 42
- 238000012360 testing method Methods 0.000 description 11
- 230000005540 biological transmission Effects 0.000 description 7
- 230000000295 complement effect Effects 0.000 description 5
- 230000007547 defect Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 230000003068 static effect Effects 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 241001580947 Adscita statices Species 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000007667 floating Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 238000004321 preservation Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000029305 taxis Effects 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
- 238000011144 upstream manufacturing Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/30—Marginal testing, e.g. by varying supply voltage
- G01R31/3004—Current or voltage test
- G01R31/3008—Quiescent current [IDDQ] test or leakage current test
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/30—Marginal testing, e.g. by varying supply voltage
- G01R31/3004—Current or voltage test
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/037—Bistable circuits
- H03K3/0372—Bistable circuits of the primary-secondary type
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP95202203 | 1995-08-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW322661B true TW322661B (enExample) | 1997-12-11 |
Family
ID=8220566
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW085111418A TW322661B (enExample) | 1995-08-14 | 1996-09-18 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US5831463A (enExample) |
| EP (1) | EP0786170A1 (enExample) |
| TW (1) | TW322661B (enExample) |
| WO (1) | WO1997007592A1 (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3797778B2 (ja) * | 1998-01-19 | 2006-07-19 | 東芝マイクロエレクトロニクス株式会社 | データ伝送回路 |
| US20020000858A1 (en) * | 1999-10-14 | 2002-01-03 | Shih-Lien L. Lu | Flip-flop circuit |
| US6326829B1 (en) * | 1999-10-14 | 2001-12-04 | Hewlett-Packard Company | Pulse latch with explicit, logic-enabled one-shot |
| US6417711B2 (en) | 1999-10-19 | 2002-07-09 | Honeywell Inc. | High speed latch and flip-flop |
| US6563356B2 (en) | 1999-10-19 | 2003-05-13 | Honeywell International Inc. | Flip-flop with transmission gate in master latch |
| JP2001285034A (ja) * | 2000-03-29 | 2001-10-12 | Ando Electric Co Ltd | D−ff回路 |
| US6275083B1 (en) * | 2000-09-05 | 2001-08-14 | Agilent Technologies, Inc. | Low operational power, low leakage power D-type flip-flop |
| US20070147572A1 (en) * | 2005-12-28 | 2007-06-28 | Intel Corporation | Registers for an enhanced idle architectural state |
| US8067970B2 (en) * | 2006-03-31 | 2011-11-29 | Masleid Robert P | Multi-write memory circuit with a data input and a clock input |
| US8427214B2 (en) | 2010-06-03 | 2013-04-23 | Arm Limited | Clock state independent retention master-slave flip-flop |
| US9013219B2 (en) * | 2013-09-11 | 2015-04-21 | The Boeing Company | Filtered radiation hardened flip flop with reduced power consumption |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4495628A (en) * | 1982-06-17 | 1985-01-22 | Storage Technology Partners | CMOS LSI and VLSI chips having internal delay testing capability |
| US4656368A (en) * | 1985-09-13 | 1987-04-07 | Ncr Corporation | High speed master-slave flip-flop |
| JP2621993B2 (ja) * | 1989-09-05 | 1997-06-18 | 株式会社東芝 | フリップフロップ回路 |
| JPH04263510A (ja) * | 1991-02-18 | 1992-09-18 | Nec Corp | フリップフロップ回路 |
| TW222725B (en) * | 1993-07-09 | 1994-04-21 | Philips Electronics Nv | Testing sequential logic circuit upon changing into combinatorial logic circuit |
| JPH07183771A (ja) * | 1993-12-22 | 1995-07-21 | Fujitsu Ltd | フリップフロップ回路 |
| US5459421A (en) * | 1994-03-31 | 1995-10-17 | Intel Corporation | Dynamic-static master slave flip-flop circuit |
| US5612632A (en) * | 1994-11-29 | 1997-03-18 | Texas Instruments Incorporated | High speed flip-flop for gate array |
-
1996
- 1996-08-09 EP EP96925044A patent/EP0786170A1/en not_active Withdrawn
- 1996-08-09 WO PCT/IB1996/000784 patent/WO1997007592A1/en not_active Ceased
- 1996-08-13 US US08/696,311 patent/US5831463A/en not_active Expired - Lifetime
- 1996-09-18 TW TW085111418A patent/TW322661B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| US5831463A (en) | 1998-11-03 |
| EP0786170A1 (en) | 1997-07-30 |
| WO1997007592A1 (en) | 1997-02-27 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MK4A | Expiration of patent term of an invention patent |