JP3856737B2 - データ処理装置 - Google Patents

データ処理装置 Download PDF

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Publication number
JP3856737B2
JP3856737B2 JP2002211060A JP2002211060A JP3856737B2 JP 3856737 B2 JP3856737 B2 JP 3856737B2 JP 2002211060 A JP2002211060 A JP 2002211060A JP 2002211060 A JP2002211060 A JP 2002211060A JP 3856737 B2 JP3856737 B2 JP 3856737B2
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JP
Japan
Prior art keywords
instruction
unit
code
bit
decoding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2002211060A
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English (en)
Japanese (ja)
Other versions
JP2004054585A (ja
JP2004054585A5 (enExample
Inventor
雅仁 松尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
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Renesas Technology Corp
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Filing date
Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP2002211060A priority Critical patent/JP3856737B2/ja
Priority to US10/443,768 priority patent/US7487338B2/en
Publication of JP2004054585A publication Critical patent/JP2004054585A/ja
Publication of JP2004054585A5 publication Critical patent/JP2004054585A5/ja
Application granted granted Critical
Publication of JP3856737B2 publication Critical patent/JP3856737B2/ja
Priority to US11/976,568 priority patent/US20080082800A1/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30185—Instruction operation extension or modification according to one or more bits in the instruction, e.g. prefix, sub-opcode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3818—Decoding for concurrent execution
    • G06F9/382—Pipelined decoding, e.g. using predecoding
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3853—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
JP2002211060A 2002-07-19 2002-07-19 データ処理装置 Expired - Fee Related JP3856737B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2002211060A JP3856737B2 (ja) 2002-07-19 2002-07-19 データ処理装置
US10/443,768 US7487338B2 (en) 2002-07-19 2003-05-23 Data processor for modifying and executing operation of instruction code according to the indication of other instruction code
US11/976,568 US20080082800A1 (en) 2002-07-19 2007-10-25 Data processor for modifying and executing operation of instruction code

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002211060A JP3856737B2 (ja) 2002-07-19 2002-07-19 データ処理装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2006221496A Division JP2006302324A (ja) 2006-08-15 2006-08-15 データ処理装置

Publications (3)

Publication Number Publication Date
JP2004054585A JP2004054585A (ja) 2004-02-19
JP2004054585A5 JP2004054585A5 (enExample) 2005-10-27
JP3856737B2 true JP3856737B2 (ja) 2006-12-13

Family

ID=30437579

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002211060A Expired - Fee Related JP3856737B2 (ja) 2002-07-19 2002-07-19 データ処理装置

Country Status (2)

Country Link
US (2) US7487338B2 (enExample)
JP (1) JP3856737B2 (enExample)

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DE102007001137B4 (de) * 2006-02-14 2016-05-04 Robert Bosch Gmbh Gateway zum automatischen Routen von Nachrichten zwischen Bussen
US8884972B2 (en) * 2006-05-25 2014-11-11 Qualcomm Incorporated Graphics processor with arithmetic and elementary function units
JP2008027341A (ja) * 2006-07-25 2008-02-07 Matsushita Electric Ind Co Ltd 命令セットおよび情報処理装置
US7681022B2 (en) * 2006-07-25 2010-03-16 Qualcomm Incorporated Efficient interrupt return address save mechanism
JP5358315B2 (ja) * 2009-06-24 2013-12-04 本田技研工業株式会社 並列計算装置
JP5471082B2 (ja) * 2009-06-30 2014-04-16 富士通株式会社 演算処理装置および演算処理装置の制御方法
JP2011028543A (ja) * 2009-07-27 2011-02-10 Renesas Electronics Corp 情報処理システム及びその情報処理方法
US8872889B2 (en) * 2010-01-14 2014-10-28 Innovmetric Logiciels Inc. Synchronization of the orientation of a 3D measurement device and the orientation of an intelligent guidance device
US8756582B2 (en) * 2011-08-22 2014-06-17 International Business Machines Corporation Tracking a programs calling context using a hybrid code signature
US8756591B2 (en) 2011-10-03 2014-06-17 International Business Machines Corporation Generating compiled code that indicates register liveness
US9329869B2 (en) 2011-10-03 2016-05-03 International Business Machines Corporation Prefix computer instruction for compatibily extending instruction functionality
US9697002B2 (en) 2011-10-03 2017-07-04 International Business Machines Corporation Computer instructions for activating and deactivating operands
US8615745B2 (en) 2011-10-03 2013-12-24 International Business Machines Corporation Compiling code for an enhanced application binary interface (ABI) with decode time instruction optimization
US9354874B2 (en) 2011-10-03 2016-05-31 International Business Machines Corporation Scalable decode-time instruction sequence optimization of dependent instructions
US9690583B2 (en) 2011-10-03 2017-06-27 International Business Machines Corporation Exploiting an architected list-use operand indication in a computer system operand resource pool
US8612959B2 (en) 2011-10-03 2013-12-17 International Business Machines Corporation Linking code for an enhanced application binary interface (ABI) with decode time instruction optimization
US10078515B2 (en) 2011-10-03 2018-09-18 International Business Machines Corporation Tracking operand liveness information in a computer system and performing function based on the liveness information
US9286072B2 (en) 2011-10-03 2016-03-15 International Business Machines Corporation Using register last use infomation to perform decode-time computer instruction optimization
US9015835B2 (en) * 2013-06-23 2015-04-21 Intel Corporation Systems and methods for procedure return address verification
US10877759B2 (en) 2015-09-30 2020-12-29 International Business Machines Corporation Managing the capture of information in applications with prefix instructions
US10394568B2 (en) 2015-09-30 2019-08-27 International Business Machines Corporation Exception handling for applications with prefix instructions
US10761852B2 (en) 2015-09-30 2020-09-01 International Business Machines Corporation Extending data range addressing
US9870305B2 (en) 2015-09-30 2018-01-16 International Business Machines Corporation Debugging of prefixed code
CN106406163B (zh) * 2016-08-17 2019-03-08 中国电子科技集团公司第四十一研究所 一种高效的仪器程控实现方法
WO2020199094A1 (zh) * 2019-04-01 2020-10-08 华为技术有限公司 一种指令集的执行方法和计算装置
RU2748574C1 (ru) * 2020-07-14 2021-05-27 Закрытое акционерное общество "Институт телекоммуникаций" Способ распределения информационных потоков в пакетной радиосети и управляемый модульный маршрутизатор для его осуществления
KR102673257B1 (ko) 2021-01-14 2024-06-05 창신 메모리 테크놀로지즈 아이엔씨 비교 시스템
US11599417B2 (en) * 2021-01-14 2023-03-07 Changxin Memory Technologies, Inc. Error correction system

Family Cites Families (15)

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Publication number Priority date Publication date Assignee Title
JPS4814237B1 (enExample) 1970-10-01 1973-05-04
JPS6065342A (ja) 1983-09-20 1985-04-15 Fujitsu Ltd マイクロコンピユ−タ
JPH03116230A (ja) 1989-06-21 1991-05-17 Oki Micro Design Miyazaki:Kk マイクロコンピュータの命令拡張方法
JPH04319729A (ja) 1991-04-19 1992-11-10 Matsushita Electric Ind Co Ltd マイクロコンピュータ
JP3711422B2 (ja) 1995-12-20 2005-11-02 セイコーエプソン株式会社 情報処理回路
US5706514A (en) * 1996-03-04 1998-01-06 Compaq Computer Corporation Distributed execution of mode mismatched commands in multiprocessor computer systems
JP3701401B2 (ja) * 1996-08-12 2005-09-28 株式会社ルネサステクノロジ 飽和演算命令を有するマイクロプロセッサ
JPH1091430A (ja) 1996-09-13 1998-04-10 Matsushita Electric Ind Co Ltd 命令解読装置
JP3670668B2 (ja) 1997-01-24 2005-07-13 株式会社ルネサステクノロジ データ処理装置
JP3789583B2 (ja) * 1997-02-19 2006-06-28 株式会社ルネサステクノロジ データ処理装置
US6151668A (en) * 1997-11-07 2000-11-21 Billions Of Operations Per Second, Inc. Methods and apparatus for efficient synchronous MIMD operations with iVLIW PE-to-PE communication
US6272616B1 (en) * 1998-06-17 2001-08-07 Agere Systems Guardian Corp. Method and apparatus for executing multiple instruction streams in a digital processor with multiple data paths
US6240506B1 (en) * 1998-10-02 2001-05-29 Advanced Micro Devices, Inc. Expanding instructions with variable-length operands to a fixed length
US6415376B1 (en) * 2000-06-16 2002-07-02 Conexant Sytems, Inc. Apparatus and method for issue grouping of instructions in a VLIW processor
JP3760093B2 (ja) 2000-11-29 2006-03-29 株式会社ルネサステクノロジ マイクロコンピュータ

Also Published As

Publication number Publication date
US20080082800A1 (en) 2008-04-03
US7487338B2 (en) 2009-02-03
JP2004054585A (ja) 2004-02-19
US20040015680A1 (en) 2004-01-22

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