JP3818310B2 - 多層基板 - Google Patents
多層基板 Download PDFInfo
- Publication number
- JP3818310B2 JP3818310B2 JP2005058708A JP2005058708A JP3818310B2 JP 3818310 B2 JP3818310 B2 JP 3818310B2 JP 2005058708 A JP2005058708 A JP 2005058708A JP 2005058708 A JP2005058708 A JP 2005058708A JP 3818310 B2 JP3818310 B2 JP 3818310B2
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- Japan
- Prior art keywords
- heat sink
- substrate
- power element
- heat
- insulating layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48475—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
- H01L2224/48476—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area
- H01L2224/48491—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being an additional member attached to the bonding area through an adhesive or solder, e.g. buffer pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Description
6…パワー素子、S1〜S15…ヒートシンク(第1,第2のヒートシンク部)、
55…制御回路。
Claims (8)
- 複数の絶縁層からなり基板表層にパワー素子が搭載されると共に、パワー素子下部領域の絶縁層に熱伝達用導体からなるヒートシンクを設けた多層基板において、
前記ヒートシンクとパワー素子とが対向配置されているとともに、前記ヒートシンクにおける対向面の面積を、前記パワー素子における対向面の面積よりも大きくしたものであって、
前記ヒートシンクは、前記パワー素子下方の絶縁層に設けられた第1のヒートシンク部と、その第1のヒートシンク部よりも下方の絶縁層であって第1のヒートシンク部と接触するように設けられ、前記基板表層に平行となる方向に延びる第2のヒートシンク部とを有し、
前記第2のヒートシンク部の面積を前記第1のヒートシンク部の面積よりも大きくするとともに、前記第1のヒートシンク部及び第2のヒートシンク部の中心を同一にして両ヒートシンク部を配置したことを特徴とする多層基板。 - 複数の絶縁層からなり基板表層にパワー素子が搭載されると共に、パワー素子下部領域の絶縁層に熱伝達用導体からなるヒートシンクを設けた多層基板において、
前記ヒートシンクとパワー素子とが対向配置されているとともに、前記ヒートシンクにおける対向面の面積を、前記パワー素子における対向面の面積よりも大きくしたものであって、
前記ヒートシンクは、前記パワー素子下方の絶縁層に設けられた第1のヒートシンク部と、その第1のヒートシンク部よりも下方の絶縁層に設けられ、前記基板表層に平行となる方向に延びる第2のヒートシンク部とを有し、
前記基板表面または前記基板内部には、前記パワー素子を制御するための制御回路が前記パワー素子とは離間して設けられており、
前記第1のヒートシンク部及び第2のヒートシンク部は、一部が上下に重なった状態で、かつ前記制御回路から離れる方向にずらして配置される多層基板。 - 請求項1または2に記載の多層基板において、前記パワー素子下部領域の絶縁層には充填金属収納用貫通部が形成され、該充填金属収納用貫通部内に前記熱伝達用導体からなるヒートシンクが充填されている多層基板。
- 請求項1乃至3の何れか1つに記載の多層基板において、前記第2のヒートシンク部の一端は前記基板表層の反対側の基板裏面に露出するとともに、前記第2のヒートシンク部には多数のホールが形成されている多層基板。
- 請求項1乃至3の何れか1つに記載の多層基板において、前記基板表層の反対側の基板裏面には放熱板が接合される多層基板。
- 請求項1乃至5の何れか1つに記載の多層基板において、前記第1のヒートシンク部が設けられた絶縁層と前記第2のヒートシンク部が設けられた絶縁層との間には、熱伝達用導体からなるヒートシンクが設けられていない絶縁層が介在し、前記第1のヒートシンク部と前記第2のヒートシンク部とは電気的に絶縁されている多層基板。
- 請求項6に記載の多層基板において、前記第1のヒートシンク部の一端は前記基板表層に露出するととともに、前記第2のヒートシンク部の一端は前記基板表層の反対側の基板裏面に露出している多層基板。
- 請求項1乃至7の何れか1つに記載の多層基板において、前記第1のヒートシンク部と前記パワー素子とは接触している多層基板。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005058708A JP3818310B2 (ja) | 2005-03-03 | 2005-03-03 | 多層基板 |
Applications Claiming Priority (1)
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---|---|---|---|
JP2005058708A JP3818310B2 (ja) | 2005-03-03 | 2005-03-03 | 多層基板 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14087095A Division JP3671457B2 (ja) | 1995-06-07 | 1995-06-07 | 多層基板 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005223348A JP2005223348A (ja) | 2005-08-18 |
JP3818310B2 true JP3818310B2 (ja) | 2006-09-06 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2005058708A Expired - Lifetime JP3818310B2 (ja) | 2005-03-03 | 2005-03-03 | 多層基板 |
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JP (1) | JP3818310B2 (ja) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5209856B2 (ja) * | 2006-06-05 | 2013-06-12 | 日本特殊陶業株式会社 | 配線基板 |
JP5858637B2 (ja) * | 2011-04-14 | 2016-02-10 | 三菱電機株式会社 | 半導体パッケージ |
JP6595531B2 (ja) * | 2017-05-30 | 2019-10-23 | ファナック株式会社 | ヒートシンクアッセンブリ |
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2005
- 2005-03-03 JP JP2005058708A patent/JP3818310B2/ja not_active Expired - Lifetime
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