JP3749837B2 - 半導体集積回路装置の製造方法 - Google Patents

半導体集積回路装置の製造方法 Download PDF

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Publication number
JP3749837B2
JP3749837B2 JP2001209541A JP2001209541A JP3749837B2 JP 3749837 B2 JP3749837 B2 JP 3749837B2 JP 2001209541 A JP2001209541 A JP 2001209541A JP 2001209541 A JP2001209541 A JP 2001209541A JP 3749837 B2 JP3749837 B2 JP 3749837B2
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insulating film
film
region
semiconductor substrate
manufacturing
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Japanese (ja)
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JP2003023100A5 (https=
JP2003023100A (ja
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裕介 野中
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Renesas Technology Corp
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Renesas Technology Corp
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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2001209541A 2001-07-10 2001-07-10 半導体集積回路装置の製造方法 Expired - Fee Related JP3749837B2 (ja)

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JP2001209541A JP3749837B2 (ja) 2001-07-10 2001-07-10 半導体集積回路装置の製造方法

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JP2001209541A JP3749837B2 (ja) 2001-07-10 2001-07-10 半導体集積回路装置の製造方法

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JP2003023100A JP2003023100A (ja) 2003-01-24
JP2003023100A5 JP2003023100A5 (https=) 2005-06-23
JP3749837B2 true JP3749837B2 (ja) 2006-03-01

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JP2001209541A Expired - Fee Related JP3749837B2 (ja) 2001-07-10 2001-07-10 半導体集積回路装置の製造方法

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Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7087476B2 (en) * 2004-07-28 2006-08-08 Intel Corporation Using different gate dielectrics with NMOS and PMOS transistors of a complementary metal oxide semiconductor integrated circuit
JP4588483B2 (ja) * 2005-02-21 2010-12-01 ルネサスエレクトロニクス株式会社 半導体装置

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JP2003023100A (ja) 2003-01-24

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