JP3553946B2 - データ処理命令の実行 - Google Patents

データ処理命令の実行 Download PDF

Info

Publication number
JP3553946B2
JP3553946B2 JP50961895A JP50961895A JP3553946B2 JP 3553946 B2 JP3553946 B2 JP 3553946B2 JP 50961895 A JP50961895 A JP 50961895A JP 50961895 A JP50961895 A JP 50961895A JP 3553946 B2 JP3553946 B2 JP 3553946B2
Authority
JP
Japan
Prior art keywords
instruction
data processing
data
memory access
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP50961895A
Other languages
English (en)
Japanese (ja)
Other versions
JPH09503876A (ja
Inventor
ビビアン ジャガー,デビッド
Original Assignee
エイアールエム リミテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by エイアールエム リミテッド filed Critical エイアールエム リミテッド
Publication of JPH09503876A publication Critical patent/JPH09503876A/ja
Application granted granted Critical
Publication of JP3553946B2 publication Critical patent/JP3553946B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3861Recovery, e.g. branch miss-prediction, exception handling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30072Arrangements for executing specific machine instructions to perform conditional operations, e.g. using predicates or guards

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Debugging And Monitoring (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
JP50961895A 1993-09-23 1994-08-16 データ処理命令の実行 Expired - Lifetime JP3553946B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB9319662.4 1993-09-23
GB9319662A GB2282245B (en) 1993-09-23 1993-09-23 Execution of data processing instructions
PCT/GB1994/001793 WO1995008801A1 (en) 1993-09-23 1994-08-16 Execution of data processing instructions

Publications (2)

Publication Number Publication Date
JPH09503876A JPH09503876A (ja) 1997-04-15
JP3553946B2 true JP3553946B2 (ja) 2004-08-11

Family

ID=10742425

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50961895A Expired - Lifetime JP3553946B2 (ja) 1993-09-23 1994-08-16 データ処理命令の実行

Country Status (13)

Country Link
US (1) US5961633A (ko)
EP (1) EP0721619B1 (ko)
JP (1) JP3553946B2 (ko)
KR (1) KR100335785B1 (ko)
CN (1) CN1099633C (ko)
DE (1) DE69414592T2 (ko)
GB (1) GB2282245B (ko)
IL (1) IL110799A (ko)
IN (1) IN189692B (ko)
MY (1) MY121544A (ko)
RU (1) RU2137182C1 (ko)
TW (1) TW332266B (ko)
WO (1) WO1995008801A1 (ko)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1049368A (ja) * 1996-07-30 1998-02-20 Mitsubishi Electric Corp 条件実行命令を有するマイクロプロセッサ
JP4619288B2 (ja) * 2002-12-12 2011-01-26 エイアールエム リミテッド データ処理システムにおける処理動作マスキング
US20040230781A1 (en) * 2003-05-16 2004-11-18 Via-Cyrix, Inc. Method and system for predicting the execution of conditional instructions in a processor
US8056072B2 (en) 2005-10-31 2011-11-08 Microsoft Corporation Rebootless display driver upgrades
US8880851B2 (en) 2011-04-07 2014-11-04 Via Technologies, Inc. Microprocessor that performs X86 ISA and arm ISA machine language program instructions by hardware translation into microinstructions executed by common execution pipeline
US9244686B2 (en) 2011-04-07 2016-01-26 Via Technologies, Inc. Microprocessor that translates conditional load/store instructions into variable number of microinstructions
US9146742B2 (en) 2011-04-07 2015-09-29 Via Technologies, Inc. Heterogeneous ISA microprocessor that preserves non-ISA-specific configuration state when reset to different ISA
US9898291B2 (en) 2011-04-07 2018-02-20 Via Technologies, Inc. Microprocessor with arm and X86 instruction length decoders
US9317288B2 (en) 2011-04-07 2016-04-19 Via Technologies, Inc. Multi-core microprocessor that performs x86 ISA and ARM ISA machine language program instructions by hardware translation into microinstructions executed by common execution pipeline
US9274795B2 (en) 2011-04-07 2016-03-01 Via Technologies, Inc. Conditional non-branch instruction prediction
US8880857B2 (en) 2011-04-07 2014-11-04 Via Technologies, Inc. Conditional ALU instruction pre-shift-generated carry flag propagation between microinstructions in read-port limited register file microprocessor
US9378019B2 (en) 2011-04-07 2016-06-28 Via Technologies, Inc. Conditional load instructions in an out-of-order execution microprocessor
CN103765400B (zh) 2011-04-07 2016-05-04 威盛电子股份有限公司 一种乱序执行微处理器中的有条件存储指令
US9292470B2 (en) 2011-04-07 2016-03-22 Via Technologies, Inc. Microprocessor that enables ARM ISA program to access 64-bit general purpose registers written by x86 ISA program
US9128701B2 (en) 2011-04-07 2015-09-08 Via Technologies, Inc. Generating constant for microinstructions from modified immediate field during instruction translation
US9043580B2 (en) 2011-04-07 2015-05-26 Via Technologies, Inc. Accessing model specific registers (MSR) with different sets of distinct microinstructions for instructions of different instruction set architecture (ISA)
US9032189B2 (en) 2011-04-07 2015-05-12 Via Technologies, Inc. Efficient conditional ALU instruction in read-port limited register file microprocessor
US8924695B2 (en) 2011-04-07 2014-12-30 Via Technologies, Inc. Conditional ALU instruction condition satisfaction propagation between microinstructions in read-port limited register file microprocessor
US9336180B2 (en) 2011-04-07 2016-05-10 Via Technologies, Inc. Microprocessor that makes 64-bit general purpose registers available in MSR address space while operating in non-64-bit mode
US9141389B2 (en) 2011-04-07 2015-09-22 Via Technologies, Inc. Heterogeneous ISA microprocessor with shared hardware ISA registers
US9645822B2 (en) 2011-04-07 2017-05-09 Via Technologies, Inc Conditional store instructions in an out-of-order execution microprocessor
US9176733B2 (en) 2011-04-07 2015-11-03 Via Technologies, Inc. Load multiple and store multiple instructions in a microprocessor that emulates banked registers

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE789583A (fr) * 1971-10-01 1973-02-01 Sanders Associates Inc Appareil de controle de programme pour machine de traitement del'information
GB1480209A (en) * 1974-07-03 1977-07-20 Data Loop Ltd Digital computers
JPS54107645A (en) * 1978-02-13 1979-08-23 Hitachi Ltd Information processor
JPS6247746A (ja) * 1985-08-27 1987-03-02 Fujitsu Ltd 割り込み制御方式
JPH01229326A (ja) * 1988-03-09 1989-09-13 Toshiba Corp 情報処理装置
JPH01310443A (ja) * 1988-06-09 1989-12-14 Nec Corp 情報処理装置
US5202967A (en) * 1988-08-09 1993-04-13 Matsushita Electric Industrial Co., Ltd. Data processing apparatus for performing parallel decoding and parallel execution of a variable word length instruction
JPH0335323A (ja) * 1989-06-30 1991-02-15 Toshiba Corp 命令実行制御方式

Also Published As

Publication number Publication date
US5961633A (en) 1999-10-05
EP0721619A1 (en) 1996-07-17
CN1134193A (zh) 1996-10-23
GB2282245A (en) 1995-03-29
IL110799A0 (en) 1994-11-11
GB9319662D0 (en) 1993-11-10
IN189692B (ko) 2003-04-12
KR960705271A (ko) 1996-10-09
RU2137182C1 (ru) 1999-09-10
DE69414592T2 (de) 1999-05-06
IL110799A (en) 1997-09-30
WO1995008801A1 (en) 1995-03-30
GB2282245B (en) 1998-04-15
EP0721619B1 (en) 1998-11-11
MY121544A (en) 2006-02-28
CN1099633C (zh) 2003-01-22
TW332266B (en) 1998-05-21
KR100335785B1 (ko) 2002-11-30
DE69414592D1 (de) 1998-12-17
JPH09503876A (ja) 1997-04-15

Similar Documents

Publication Publication Date Title
JP3553946B2 (ja) データ処理命令の実行
JP4045062B2 (ja) ロード命令を実行する方法、プロセッサ、およびシステム
US6895475B2 (en) Prefetch buffer method and apparatus
US6571319B2 (en) Methods and apparatus for combining a plurality of memory access transactions
EP0380858A2 (en) Method and apparatus for detecting and correcting errors in a pipelined computer system
WO2012068494A2 (en) Context switch method and apparatus
JP3707581B2 (ja) 自己整合スタック・ポインタを有するデータ処理システムおよびその方法
KR100210205B1 (ko) 스톨캐쉬를 제공하기 위한 장치 및 방법
EP1050811A1 (en) Branching in a computer system
JPS605987B2 (ja) 記憶制御装置
EP1121630A1 (en) Calendar clock caching in a multiprocessor system
US5287522A (en) External procedure invocation apparatus utilizing internal branch vector interrupts and vector address generation, in a RISC chip
EP0374598B1 (en) Control store addressing from multiple sources
EP0415351A2 (en) Data processor for processing instruction after conditional branch instruction at high speed
JP2694799B2 (ja) 情報処理装置
JP2894438B2 (ja) パイプライン処理装置
US7877533B2 (en) Bus system, bus slave and bus control method
JP3461887B2 (ja) 可変長パイプライン制御装置
JP2851777B2 (ja) バス制御方法及び情報処理装置
US20040103267A1 (en) Data processor having cache memory
JPS6221130B2 (ko)
JP2806690B2 (ja) マイクロプロセッサ
JP2927751B2 (ja) 情報処理装置及び情報処理方法及びスケジューリング装置
JP2000347931A (ja) キャッシュメモリおよびキャッシュメモリ制御方法
JP2001084149A (ja) 情報処理装置における割り込み処理方式

Legal Events

Date Code Title Description
TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20040406

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20040506

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090514

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090514

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100514

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100514

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110514

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120514

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130514

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130514

Year of fee payment: 9

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term