JP3226422B2 - 半導体記憶装置及びメモリセルのｄｃ電流不良検出方法 - Google Patents

半導体記憶装置及びメモリセルのｄｃ電流不良検出方法

Info

Publication number
JP3226422B2
JP3226422B2 JP19899294A JP19899294A JP3226422B2 JP 3226422 B2 JP3226422 B2 JP 3226422B2 JP 19899294 A JP19899294 A JP 19899294A JP 19899294 A JP19899294 A JP 19899294A JP 3226422 B2 JP3226422 B2 JP 3226422B2
Authority
JP
Japan
Prior art keywords
power supply
memory
memory cell
mat
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP19899294A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0845299A (ja
Inventor
厚 平石
欽哉 光本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP19899294A priority Critical patent/JP3226422B2/ja
Priority to TW084107179A priority patent/TW289162B/zh
Priority to KR1019950022808A priority patent/KR960008834A/ko
Publication of JPH0845299A publication Critical patent/JPH0845299A/ja
Application granted granted Critical
Publication of JP3226422B2 publication Critical patent/JP3226422B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/785—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes
    • G11C29/787—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes using a fuse hierarchy
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/808—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout using a flexible replacement scheme
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Static Random-Access Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Semiconductor Memories (AREA)
JP19899294A 1994-08-01 1994-08-01 半導体記憶装置及びメモリセルのｄｃ電流不良検出方法 Expired - Fee Related JP3226422B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP19899294A JP3226422B2 (ja) 1994-08-01 1994-08-01 半導体記憶装置及びメモリセルのｄｃ電流不良検出方法
TW084107179A TW289162B (enrdf_load_stackoverflow) 1994-08-01 1995-07-11
KR1019950022808A KR960008834A (ko) 1994-08-01 1995-07-28 반도체 기억장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19899294A JP3226422B2 (ja) 1994-08-01 1994-08-01 半導体記憶装置及びメモリセルのｄｃ電流不良検出方法

Publications (2)

Publication Number Publication Date
JPH0845299A JPH0845299A (ja) 1996-02-16
JP3226422B2 true JP3226422B2 (ja) 2001-11-05

Family

ID=16400310

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19899294A Expired - Fee Related JP3226422B2 (ja) 1994-08-01 1994-08-01 半導体記憶装置及びメモリセルのｄｃ電流不良検出方法

Country Status (3)

Country Link
JP (1) JP3226422B2 (enrdf_load_stackoverflow)
KR (1) KR960008834A (enrdf_load_stackoverflow)
TW (1) TW289162B (enrdf_load_stackoverflow)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6081465A (en) * 1998-04-30 2000-06-27 Hewlett-Packard Company Static RAM circuit for defect analysis
AU2001229896A1 (en) 2000-01-28 2001-08-07 Interuniversitair Micro-Elektronica Centrum A method for transferring and stacking of semiconductor devices
JP2001283598A (ja) * 2000-03-29 2001-10-12 Nec Kansai Ltd Ｓｒａｍペレットにおける冗長回路切り替えのための検査方法
JP4727796B2 (ja) 2000-09-04 2011-07-20 ルネサスエレクトロニクス株式会社 半導体集積回路
JP2002093195A (ja) 2000-09-18 2002-03-29 Mitsubishi Electric Corp 半導体記憶装置および半導体記憶装置のテスト方法
KR20030030165A (ko) * 2001-10-09 2003-04-18 동부전자 주식회사 메모리 디바이스의 전원 불량 테스트 장치
KR100881189B1 (ko) * 2006-08-28 2009-02-05 삼성전자주식회사 취약 배선을 검출하기 위한 배선 검출 회로
TWI418813B (zh) * 2011-04-11 2013-12-11 Macronix Int Co Ltd 記憶體陣列之局部位元線缺陷之檢測方法

Also Published As

Publication number Publication date
TW289162B (enrdf_load_stackoverflow) 1996-10-21
JPH0845299A (ja) 1996-02-16
KR960008834A (ko) 1996-03-22

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