JP3219160B2 - Television signal processor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a timing circuit suitable for processing a television signal.

[0002]

2. Description of the Related Art Conventionally, when signals are transferred between circuits composed of different clock frequency systems, both clocks are synchronized with a certain period by a phase comparison circuit.

[0003]

In the above-mentioned prior art, there is no regulation on the timing of signal transfer, and the phase relationship between the two clocks differs depending on the state.
It was difficult for the receiving side to determine the signal transition timing.

[0004] The present invention has been made in view of such a situation, and when signals are transferred between circuits constituted by different clock frequency systems, the signals are received due to a difference in clock frequency between the two circuits. The purpose of the present invention is to prevent the occurrence of a transition timing determination error on the side.

[0005]

A television according to claim 1.
The signal processor uses the clock of the MUSE signal and the NT signal.
Divide the clock of SC signal by a predetermined ratio
By comparing the phases, the clock of the NTSC signal can be compared.
Phase synchronization with the clock of the MUSE signal
And the MUSE signal obtained separately from the MUSE signal.
Frame pulse, signal obtained by dividing the clock of NTSC signal
Signal and the clock of the phase-synchronized NTSC signal
Supplied to the MUSE frame pulse in NTSC format.
When the signal obtained by dividing the signal clock is at a predetermined level,
Triggered using phase-synchronized NTSC signal clock
And a latch circuit that outputs the NTSC frame pulse.
NTSC frame pulse transition timing
Phase synchronization with the clock of the system signal
You.

[0006]

[0007]

The television signal processing device according to claim 1
Is the clock for the MUSE signal and the clock for the NTSC signal.
The clocks are divided at predetermined ratios and the phases are compared.
With this, the clock of the signal of the NTSC system is changed to the signal of the MUSE system.
Phase synchronized with the MUSE signal and separated from the MUSE signal.
Frame pulse and NTSC signal
Signal divided by clock and NTSC system with phase synchronization
The signal clock is supplied and the MUSE frame pulse is
The signal obtained by dividing the clock of the NTSC signal is
Level, the clock of the NTSC signal synchronized with the phase is
Trigger using the clock and output the NTSC frame pulse.
The NTSC frame pulse transitions
The phase to the clock of the NTSC signal.
Therefore , it is possible to reliably transfer signals without errors.

[0008]

[0009]

FIG. 1 shows a configuration of an embodiment in which the present invention is applied to a MUSE-NTSC converter, and FIG.
2 shows signal waveforms at various parts in the embodiment of FIG. MUSE-NT
The SC converter is a system for converting a MUSE signal into an NTSC signal, and generates a MUSE timing generator circuit 12 for generating various MUSE timing signals and various NTSC timing signals for signal processing. It has an NTSC-based timing generation circuit 8, and has a MUSE clock and an NTS
Operates on C clock.

Both timing generating circuits 8 and 12
The counter is reset at the same frame cycle: 1/30 Hz, but a MUSE frame pulse is used as the frame cycle information of the frame reset. The MUSE frame pulse is output to the MU
It is extracted from the SE signal and its transition timing is MUSE
Specified by clock.

This frame pulse is transmitted to the N
In order for the TSC timing generator circuit 8 to use it as frame period information for frame reset, when the pulse is received by the NTSC clock, its transition timing is univocally relative to the NTSC clock phase. If not specified, there is a possibility that the reset cycle may be longer or shorter for each frame depending on the state.

Referring to FIG. 1, the MUSE synchronization separation circuit 2 separates the MUS signal separated from the MUSE signal.
The E frame pulse is output to the MUS via the waveform shaping circuit 10.
It is supplied to the E-system timing generation circuit 12 and used as frame cycle information for frame reset in the MUSE-system timing generation circuit 12.

The MUSE frame pulse separated from the MUSE signal by the MUSE synchronization separation circuit 2 is supplied to the NTS signal via the latch circuit 4 and the waveform shaping circuit 6.
It is supplied to the C-system timing generator 8 and is also used as frame cycle information for frame reset in the NTSC-system timing generator 8. Note that the latch circuit 4 and the waveform shaping circuit 6 operate according to the NTSC clock. The latch circuit 4 is enabled by the output of the 1 / N divider 14, as described later.

The NTSC clock and the MUSE clock are supplied to a 1 / N divider 14 and a 1 / M divider 1 respectively.
8, the frequency is divided by 1 / N and 1 / M to form a phase comparison pulse (a) (see FIG. 2 (a)) and a phase comparison pulse (b) (see FIG. 2 (b)). 16, the frame period: 1 / n of 1/30 Hz (n =
..) Period: 1 / fp. Here, the transition timing of the NTSC pulse (a) used for the phase comparison is defined by the NTSC clock.
The PLL itself including the NTSC clock generation VCO 20 is compared with the phase of the MUSE pulse (b).
Output from the MUSE clock, it is always defined uniformly for the MUSE clock. MU specified by MUSE clock
When the MUSE frame pulse (c) output from the SE sync separation circuit 2 is received by the NTSC timing generation circuit 8, the above-mentioned pulse (a) output from the 1 / N divider 14 is enabled. By passing through the latch circuit 4 of the NTSC clock operation described above, a frame period pulse (d) whose transition timing is uniquely defined with respect to the NTSC clock can be obtained.

In the above embodiment, the MUSE system and N
Although the present invention relates to a television signal processing device including a TSC system, the present invention is not limited to this.
-It can be applied to a television signal processing device including a MAC system and a PAL system.

The present invention can be applied not only to a television signal processing device but also to various timing circuits.

[0017]

The television signal processing according to claim 1
The device uses a clock for MUSE signals and a signal for NTSC signals.
The clock is divided by a predetermined ratio, and the phases are compared.
In this way, the clock of the NTSC signal is
Synchronize the phase with the signal clock and separate from the MUSE signal.
MUSE frame pulse, NTSC signal
Clock divided signal and phase-synchronized NTSC
The clock of the formula signal is supplied and the MUSE frame pulse is
On the other hand, the signal obtained by dividing the clock of the NTSC signal is
At a predetermined level, the phase-locked NTSC signal
Trigger using lock and output NTSC frame pulse
Input, the transition of the NTSC frame pulse
Phase synchronization with the NTSC signal clock.
As a result, it is possible to reliably transfer signals without errors.

[0018]

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of a timing circuit when the present invention is applied to a MUSE-NTSC converter.

FIG. 2 is a waveform chart showing signals of respective parts in the embodiment of FIG.

[Explanation of symbols]

 Reference Signs List 2 MUSE synchronization separation circuit 4 Latch circuit 6 Waveform shaping circuit 8 NTSC system timing generation circuit 10 Waveform shaping circuit 12 MUSE system timing generation circuit 14 1 / N divider 16 Phase comparator 18 1 / N divider 20 NTSC system VCO

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04L 7/04 H03L 7/06 H04N 7/01

Claims (1)

(57) [Claims] 1. A MUSE signal is converted to an NTSC signal.
In television signal processing apparatus for, the signals of the MUSE system clock and an NTSC signal clock
Is divided by a predetermined ratio, and the phases are compared.
Thus, the clock of the signal of the NTSC system is
A phase synchronizing circuit for synchronizing a phase with a clock of a signal, and a MUSE frame obtained by separating from the MUSE signal
Pulse, the signal obtained by dividing the clock of the NTSC signal
Signal and the phase-synchronized NTSC signal clock.
Is supplied, and the MUSE frame pulse is
A signal obtained by dividing the frequency of the NTSC signal clock is a predetermined signal.
At the time of the bell, the phase-synchronized NTSC signal
Trigger using the clock and output the NTSC frame pulse.
And a latch circuit that shifts the timing of transition of the NTSC frame pulse.
The feature is that the phase is synchronized with the clock of the SC system signal.
Television signal processing device.