JPH05327684A - Timing circuit and television signal processing unit - Google Patents

Abstract

PURPOSE:To prevent production of a transit timing established error by transmitting/receiving a signal among circuits based on phase comparison timing information specifying a phase relation of a clock of the plural circuits to be comprised of different frequency systems. CONSTITUTION:A MUSE-NTSC converter is provided with timing generating circuits 1, 2 for the MUSE system and the NTSC system and they are operated by a clock signal of a different frequency. Then a phase comparator 16 generates phase comparison timing information for both the clocks solely specifying the phase relation of the clocks of the MUSE system timing generating circuit 12 and the NTSC system timing generating circuit 8, and a MUSE frame pulse for the MUSE system timing generating circuit 12 is fed to the NTSC system timing generating circuit 8 based on the phase comparison timing information. Thus, when the signal is transmitted/received among the circuits to be comprised of different clock frequency systems, the signal is surely transmitted/received without any error.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a timing circuit suitable for processing a television signal.

[0002]

2. Description of the Related Art Conventionally, when signals are transferred between circuits composed of different clock frequency systems, both clocks are synchronized by a phase comparison circuit at a certain cycle.

[0003]

In the above-mentioned prior art, there is no stipulation for the signal transfer timing, and the phase relationship between both clocks differs depending on the state.
It was difficult for the receiving side to determine the signal transition timing.

The present invention has been made in view of such a situation, and when signals are transferred between circuits composed of different clock frequency systems, the signals are received due to a difference in clock frequency between the circuits. The purpose is to prevent a transition timing confirmation error from occurring on the side.

[0005]

According to a first aspect of the present invention, there is provided a timing circuit which comprises different clock frequency systems.
And a second circuit for transmitting and receiving signals between the second circuits, and means for generating phase comparison timing information of both clocks in which the phase relationship between the clocks of the first and second circuits is uniquely defined ( For example, the phase comparator 16) of the embodiment is provided, and a signal is delivered based on the phase comparison timing information.

According to a second aspect of the present invention, there is provided a television signal processing device in which a first television circuit (for example, the NTSC system timing generation circuit 8 of the embodiment) constituted by a first clock frequency system and a first clock circuit are used. Second different from frequency system
A television signal processing device for transmitting and receiving a signal to and from a second television circuit (for example, the MUSE system timing generation circuit 12 of the embodiment) configured by the frequency system of the first and second televisions. A means (for example, the phase comparator 16 of the embodiment) for generating the phase comparison timing information of both clocks in which the phase relation of the clock of the John circuit is uniquely defined is provided, and the signal is passed based on the phase comparison timing information. It is characterized by performing.

[0007]

In the timing circuit having the structure of claim 1,
Signals are delivered and received based on the phase comparison timing information of both clocks that uniquely defines the phase relationship between the clocks of the first and second circuits configured with different clock frequency systems. Therefore, it is possible to reliably transfer the signal without any error.

According to another aspect of the television signal processing device of the present invention, the phase comparison between the clocks of the first and second television circuits having different clock frequency systems is uniquely defined. Signals are passed and received based on the timing information. Therefore, it is possible to reliably transfer the signal without any error.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows the configuration of an embodiment in which the present invention is applied to a MUSE-NTSC converter, and FIG.
The signal waveform of each part of the Example of FIG. 1 is shown. MUSE-NT
The SC converter is a system for converting the MUSE signal into an NTSC signal, and for the signal processing, the MUSE timing generator circuit 12 for generating various MUSE timing signals and various NTSC timing signals. It has an NTSC system timing generation circuit 8, each of which has a MUSE clock and an NTS of different frequencies.
Operates with C clock.

Both timing generation circuits 8 and 12
The counter is reset at the same frame period: 1/30 Hz, but the MUSE frame pulse is used for the frame period information of this frame reset. The MUSE frame pulse is sent to the MU by the MUSE system sync separation circuit 2.
It is extracted from the SE signal and its transition timing is MUSE.
Specified by the clock.

As with the MUSE system, this frame pulse is set to N
In order to use it as frame period information for frame reset also in the TSC system timing generation circuit 8, when the same pulse is received by the NTSC clock, its transition timing is unique to the NTSC system clock phase. If not specified, there is a possibility that the reset period will vary depending on the frame.

Referring to FIG. 1, the MUS separated from the MUSE signal by the MUSE system sync separation circuit 2 is described.
The E frame pulse is transmitted to the MUS via the waveform shaping circuit 10.
It is supplied to the E-system timing generation circuit 12 and used as frame period information for frame reset in the MUSE system timing generation circuit 12.

The MUSE frame pulse separated from the MUSE signal by the MUSE system sync separation circuit 2 is passed through the latch circuit 4 and the waveform shaping circuit 6 to the NTS.
It is supplied to the C system timing generation circuit 8 and is also used in the NTSC system timing generation circuit 8 as frame period information for frame reset. The latch circuit 4 and the waveform shaping circuit 6 operate according to the NTSC clock. The latch circuit 4 is enabled by the output of the 1 / N frequency divider 14 as described later.

The NTSC clock and the MUSE clock are the 1 / N frequency divider 14 and the 1 / M frequency divider 1 respectively.
The frequency is divided into 1 / N and 1 / M by 8 to form a phase comparison pulse (a) (see FIG. 2 (a)) and a phase comparison pulse (b) (see FIG. 2 (b)). 16, frame period: 1 / n of 1/30 Hz (n =
1, 2, 3, ...) Cycles: Phase comparison is performed at 1 / fp. The transition timing of the NTSC system pulse (a) used for phase comparison is defined by the NTSC clock,
This pulse itself is a PLL including an NTSC clock generation VCO 20 by phase comparison with the MUSE system pulse (b).
Since it is output from, the MUSE clock is always specified uniformly. MU specified by MUSE clock
When the MUSE frame pulse (c) output from the SE system sync separation circuit 2 is received by the NTSC system timing generation circuit 8, the above-mentioned pulse (a) output from the 1 / N frequency divider 14 is enabled. The frame period pulse (d) whose transition timing is uniquely defined with respect to the NTSC clock can be obtained by passing through the latch circuit 4 of the NTSC clock operation.

The above embodiment is based on the MUSE type and N type.
The present invention relates to a television signal processing device including a TSC system, but the present invention is not limited to this, and for example, HD
-It can be applied to a television signal processing device including a MAC system and a PAL system.

Further, the present invention can be applied not only to the television signal processing device but also to various timing circuits.

[0017]

According to the timing circuit of the first aspect of the present invention, based on the phase comparison timing information of both clocks, the phase relationship between the clocks of the first and second circuits configured with different clock frequency systems is uniquely defined. Since the signals are delivered, it is possible to reliably deliver the signals without any error.

According to another aspect of the television signal processing device of the present invention, the phase comparison timings of the two clocks are defined so that the phase relations of the clocks of the first and second television circuits constituted by different clock frequency systems are uniquely defined. Since the signal is transferred based on the information, the signal can be transferred without error without fail.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of a timing circuit when the present invention is applied to a MUSE-NTSC converter.

FIG. 2 is a waveform diagram showing signals of various parts in the embodiment of FIG.

[Explanation of symbols]

 2 MUSE system synchronization separation circuit 4 Latch circuit 6 Waveform shaping circuit 8 NTSC system timing generation circuit 10 Waveform shaping circuit 12 MUSE system timing generation circuit 14 1 / N frequency divider 16 Phase comparator 18 1 / N frequency divider 20 NTSC system VCO

Claims (2)

[Claims] 1. In a timing circuit for transmitting and receiving a signal between first and second circuits configured by different clock frequency systems, a phase relation between clocks of the first and second circuits is uniquely defined. A timing circuit comprising means for generating phase comparison timing information of both clocks to be transmitted, and transmitting and receiving the signal based on the phase comparison timing information. 2. A signal between a first television circuit configured by a first clock frequency system and a second television circuit configured by a second frequency system different from the first clock frequency system. And a means for generating phase comparison timing information of both clocks in which the phase relationship of the clocks of the first and second television circuits is uniquely defined. A television signal processing device, characterized in that the signal is transferred based on timing information.