JP2800550B2 - Manufacturing method of printed wiring board - Google Patents
Manufacturing method of printed wiring boardInfo
- Publication number
- JP2800550B2 JP2800550B2 JP10505392A JP10505392A JP2800550B2 JP 2800550 B2 JP2800550 B2 JP 2800550B2 JP 10505392 A JP10505392 A JP 10505392A JP 10505392 A JP10505392 A JP 10505392A JP 2800550 B2 JP2800550 B2 JP 2800550B2
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- wiring board
- resin
- substrate
- components
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 229920005989 resin Polymers 0.000 claims description 20
- 239000011347 resin Substances 0.000 claims description 20
- 239000000758 substrate Substances 0.000 claims description 19
- 229910052751 metal Inorganic materials 0.000 claims description 14
- 239000002184 metal Substances 0.000 claims description 14
- 239000011888 foil Substances 0.000 claims description 12
- 239000012778 molding material Substances 0.000 claims description 9
- 238000000465 moulding Methods 0.000 claims description 7
- 229920001187 thermosetting polymer Polymers 0.000 claims description 7
- 238000000034 method Methods 0.000 description 14
- 239000000945 filler Substances 0.000 description 5
- 239000010410 layer Substances 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 239000003822 epoxy resin Substances 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 4
- 239000011889 copper foil Substances 0.000 description 3
- 239000000843 powder Substances 0.000 description 3
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 239000003086 colorant Substances 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 239000007822 coupling agent Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229920003986 novolac Polymers 0.000 description 2
- QWVGKYWNOKOFNN-UHFFFAOYSA-N o-cresol Chemical compound CC1=CC=CC=C1O QWVGKYWNOKOFNN-UHFFFAOYSA-N 0.000 description 2
- 239000005011 phenolic resin Substances 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- RIOQSEWOXXDEQQ-UHFFFAOYSA-N triphenylphosphine Chemical compound C1=CC=CC=C1P(C=1C=CC=CC=1)C1=CC=CC=C1 RIOQSEWOXXDEQQ-UHFFFAOYSA-N 0.000 description 2
- JYEUMXHLPRZUAT-UHFFFAOYSA-N 1,2,3-triazine Chemical compound C1=CN=NN=C1 JYEUMXHLPRZUAT-UHFFFAOYSA-N 0.000 description 1
- RNFJDJUURJAICM-UHFFFAOYSA-N 2,2,4,4,6,6-hexaphenoxy-1,3,5-triaza-2$l^{5},4$l^{5},6$l^{5}-triphosphacyclohexa-1,3,5-triene Chemical compound N=1P(OC=2C=CC=CC=2)(OC=2C=CC=CC=2)=NP(OC=2C=CC=CC=2)(OC=2C=CC=CC=2)=NP=1(OC=1C=CC=CC=1)OC1=CC=CC=C1 RNFJDJUURJAICM-UHFFFAOYSA-N 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 239000006087 Silane Coupling Agent Substances 0.000 description 1
- 239000004809 Teflon Substances 0.000 description 1
- 229920006362 Teflon® Polymers 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000006229 carbon black Substances 0.000 description 1
- 238000005266 casting Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 238000013329 compounding Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000000748 compression moulding Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000006071 cream Substances 0.000 description 1
- 229910002026 crystalline silica Inorganic materials 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000003063 flame retardant Substances 0.000 description 1
- 239000005350 fused silica glass Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000001746 injection moulding Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000011342 resin composition Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 239000012756 surface treatment agent Substances 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
- 229920006337 unsaturated polyester resin Polymers 0.000 description 1
- 239000002966 varnish Substances 0.000 description 1
Landscapes
- Injection Moulding Of Plastics Or The Like (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は、特に小型化、高密度化
を必要とする機器に用いられる印刷配線用基板に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board used particularly for equipment requiring miniaturization and high density.
【０００２】[0002]
【従来の技術】電子機器を小型化、高密度化するために
は、回路を構成する電子部品や基板等が占める空間をで
きるだけ小さくすることが重要である。電子部品につい
ては、表面実装型の電子部品にみられるように小型化、
薄型化が進んでいる。また、部品を搭載する基板につい
ては、フレキシブル印刷配線板が従来より用いられてい
る。フレキシブル印刷配線板は可撓性を持ったフィルム
に導体パターンを形成したもので、基板自体が薄くかつ
折り曲げることができるため狭い空間を有効に利用する
ことができる。しかし、フレキシブル印刷配線板のベー
スフィルムは耐熱性が要求されるため、ポリイミド等の
高価な樹脂が用いられている。また、可撓性を持ってい
ることにより、部品の搭載作業時や機器への組み込み後
の安定性という点で問題が残っている。一方、部品を搭
載した基板を複数枚積層して部品を内蔵した多層板とす
ることにより小型化、高密度化を図る方法（例えば、特
開平２−１６４０９６号公報、特開平４−４４２９６号
公報）や、電子機器の筐体に部品を内蔵する方法（例え
ば、特開昭５７−５０４９４号公報）がある。2. Description of the Related Art In order to reduce the size and density of electronic equipment, it is important to minimize the space occupied by electronic components and substrates constituting a circuit. As for electronic components, miniaturization, as seen in surface mount electronic components,
Thinning is progressing. Further, as a substrate on which components are mounted, a flexible printed wiring board has been conventionally used. The flexible printed wiring board is formed by forming a conductive pattern on a film having flexibility, and since the substrate itself is thin and can be bent, a narrow space can be effectively used. However, since the base film of the flexible printed wiring board needs to have heat resistance, an expensive resin such as polyimide is used. In addition, due to the flexibility, there remains a problem in terms of stability at the time of mounting parts and after being incorporated into equipment. On the other hand, a method of miniaturizing and increasing the density by laminating a plurality of substrates on which components are mounted to form a multilayer board containing the components (for example, Japanese Patent Application Laid-Open Nos. 2-164096 and 4-44296) ) And a method of incorporating components in a housing of an electronic device (for example, Japanese Patent Application Laid-Open No. 57-50494).
【０００３】[0003]
【発明が解決しようとする課題】前者の方法では、部品
を内蔵する部分の基板に穴を設けなければならず、ザグ
リ等の加工が必要となり、複雑な穴明けはコスト的に不
利である。また、内層回路に部品を接続するため、少な
くとも１層以上の内層回路が必要となり、製造工程が複
雑になる。後者の方法では、めっきにより形成した導体
パターンを基板に転写するため、このめっき工程が必要
となる。また、形成された導体層が片面のみであるた
め、回路の密度は片面印刷配線板と同等である。本発明
はかかる状況に鑑みなされたもので、小型化、高密度化
が可能な印刷配線用基板を提供するものである。In the former method, a hole must be formed in a portion of the substrate in which a component is to be built, and a counterbore or the like must be machined. Complex drilling is disadvantageous in cost. In addition, since components are connected to the inner-layer circuit, at least one or more inner-layer circuits are required, which complicates the manufacturing process. In the latter method, this plating step is required in order to transfer the conductive pattern formed by plating to the substrate. In addition, since the formed conductor layer is formed on only one side, the circuit density is equivalent to that of the single-sided printed wiring board. The present invention has been made in view of such circumstances, and provides a printed wiring board that can be reduced in size and density.
【０００４】[0004]
【課題を解決するための手段】すなわち本発明は、成形
金型のキャビティ内に、片面に電子部品を電気的に接続
した金属箔を電子部品搭載面がキャビティ内側に向くよ
うに配置し、次いで熱硬化性樹脂を用いた成形材料を注
入、硬化してなることを特徴とする印刷配線用基板の製
造方法に関する。以下、図１を用いて本発明を詳細に説
明する。That is, according to the present invention, a metal foil electrically connected to an electronic component on one side is arranged in a cavity of a molding die such that an electronic component mounting surface faces the inside of the cavity. The present invention relates to a method for manufacturing a printed wiring board, which is obtained by injecting and curing a molding material using a thermosetting resin. Hereinafter, the present invention will be described in detail with reference to FIG.
【０００５】図１（ａ）〜（ｃ）に本発明の印刷配線用
基板の製造方法の例を示す。まず、図１（ａ）に示すよ
うに、金属箔１上に電子部品２を接続材料３を用いて接
続し固定する。次に、図１（ｂ）に示すように、上型４
及び下型５から構成されるキャビティ６内に、上記金属
箔を部品搭載面がキャビティ内側に向くように配置し、
これに熱硬化性樹脂を用いた成形材料を注入硬化させ
る。このようにして、図１（ｃ）に示すような絶縁樹脂
７に部品を内挿した印刷配線用基板が得られる。金属箔
は表層回路となる導体で特に限定するものではなく、用
途に応じてどのようなものでもよいが、電気接続性や回
路形成性、価格等から考えて一般の印刷配線用基板に使
用されている銅箔が好ましい。また、その厚さは必要に
応じて適宜選択できる。金属箔の形状は特に制限はな
く、基板全体と同じ大きさでもよいし、部分的に複数箇
所配置するようなものでもよい。このような金属箔の電
子部品を搭載する面には、電子部品のリード等を接続す
る部分以外にソルダレジスト等の保護被膜を形成しても
よい。また、金属箔の絶縁樹脂と接する部分は、粗化し
たりカップリング剤や接着剤等の処理を施すことによ
り、絶縁樹脂との接着性を向上することができる。FIGS. 1A to 1C show an example of a method for manufacturing a printed wiring board according to the present invention. First, as shown in FIG. 1A, an electronic component 2 is connected and fixed on a metal foil 1 using a connection material 3. Next, as shown in FIG.
And placing the metal foil in a cavity 6 composed of a lower mold 5 such that the component mounting surface faces the inside of the cavity,
A molding material using a thermosetting resin is injected and cured. In this way, a printed wiring board in which components are inserted in the insulating resin 7 as shown in FIG. 1C is obtained. The metal foil is not particularly limited as a conductor serving as a surface layer circuit, and may be any depending on the application, but is used for a general printed wiring board in consideration of electrical connectivity, circuit formability, price, and the like. Copper foil is preferred. Further, the thickness can be appropriately selected as needed. The shape of the metal foil is not particularly limited, and may be the same size as the entire substrate, or may be such that it is partially disposed at a plurality of locations. A protective film such as a solder resist may be formed on the surface of the metal foil on which the electronic component is mounted, in addition to the portion where the lead or the like of the electronic component is connected. In addition, the portion of the metal foil that is in contact with the insulating resin can be roughened or treated with a coupling agent, an adhesive, or the like to improve the adhesiveness with the insulating resin.
【０００６】金属箔に搭載する電子部品は特に限定する
ものではないが、表面実装型の部品、例えば表面実装型
パッケージに封止されたＩＣ、トランジスタ、ダイオー
ド等の能動素子や、チップ抵抗、チップコンデンサ、チ
ップコイル等の受動素子等が好適である。また、配線の
一部となる金属線や金属板、封止されていないＩＣやト
ランジスタ等のベアチップ等を搭載してもよい。これら
の電子部品の大きさは特に制限はないが、基板の厚さよ
り薄いものを用いた場合には凹凸の無い基板を得ること
ができる。更に、基板の半分以下の厚さの部品を用いた
場合には基板の厚さ方向で重ねることができ、実装密度
を向上することができる。The electronic components mounted on the metal foil are not particularly limited, but are surface-mounted components, such as active elements such as ICs, transistors, and diodes sealed in a surface-mounted package, chip resistors, and chips. Passive elements such as capacitors and chip coils are suitable. Further, a metal wire or a metal plate serving as a part of a wiring, a bare chip such as an unsealed IC or a transistor, or the like may be mounted. Although the size of these electronic components is not particularly limited, a substrate having no irregularities can be obtained when a component having a thickness smaller than the thickness of the substrate is used. Furthermore, when components having a thickness of half or less of the substrate are used, they can be stacked in the thickness direction of the substrate, and the mounting density can be improved.
【０００７】金属箔に電子部品を接続する接続材料とし
ては、一般的なはんだ、導電性ペースト等を用いること
ができる。また、半導体素子をベアチップの状態で搭載
する場合には、金やアルミの接続線（ボンディングワイ
ア）を用いたり、金やパラジウム、はんだ等のバンプを
用いて接続することもできる。基板を成形する成形金型
のキャビティ形状は特に限定するものではなく、成形で
きるものであればどのようなものでもよい。本発明方法
で得られた基板を従来の基板と同等の工程で回路形成や
組立を行なう場合には、平板状のキャビティが好まし
い。As a connection material for connecting an electronic component to a metal foil, general solder, conductive paste, or the like can be used. When the semiconductor element is mounted in the form of a bare chip, the connection can be made by using a connection wire (bonding wire) made of gold or aluminum, or by using a bump made of gold, palladium, solder, or the like. The cavity shape of the molding die for molding the substrate is not particularly limited, and may be any shape as long as it can be molded. When a substrate obtained by the method of the present invention is to be formed or assembled in the same process as a conventional substrate, a flat cavity is preferable.
【０００８】絶縁樹脂は熱硬化性樹脂を用いた成形材料
の硬化物である。熱硬化性樹脂としては、フェノール樹
脂、エポキシ樹脂、ポリイミド樹脂、不飽和ポリエステ
ル樹脂、トリアジン樹脂等どのようなものでもよく、何
種類か併用してもよい。特に、エポキシ樹脂に硬化剤と
してフェノール樹脂を配合した系では耐熱性、電気特性
等に優れている。また、これらの樹脂には硬化反応を促
進する硬化促進剤や難燃性を付与する難燃助剤、着色
剤、離型剤などの添加剤を適宜適量配合することができ
る。The insulating resin is a cured product of a molding material using a thermosetting resin. As the thermosetting resin, any resin such as a phenol resin, an epoxy resin, a polyimide resin, an unsaturated polyester resin, and a triazine resin may be used. In particular, a system in which a phenol resin is mixed as a curing agent with an epoxy resin is excellent in heat resistance, electric characteristics, and the like. In addition, additives such as a curing accelerator for accelerating the curing reaction, a flame retardant auxiliary for imparting flame retardancy, a colorant, and a release agent can be appropriately added to these resins.
【０００９】このような樹脂系には種々の充填剤を配合
することにより、熱伝導率を向上したり熱膨張係数を内
挿部品に整合することができる。例えば溶融シリカ、結
晶シリカ、アルミナ、窒化珪素等の無機物や、シリコー
ン、テフロン等の有機物の粉末等が使用でき、単独また
は何種か併用してもよい。充填剤の粒径は成形金型のゲ
ートに詰まらない程度の大きさ以下であればよく、また
その形状はどのようなものでもよい。充填剤の配合量は
特に限定するものではないが、樹脂組成物の溶融粘度や
硬化物の熱膨張係数等から２０〜８０体積％の範囲が好
ましい。充填剤を配合する場合、樹脂との接着性を高め
るためシラン系カップリング剤に代表されるような表面
処理剤を添加してもよい。成形方法については注型、移
送成形、射出成形、圧縮成形等一般の成形材料の成形方
法を用いることができ、必要に応じて加熱、加圧しても
よい。図１（ｄ）に、本発明方法により得られた印刷配
線用基板に、めっきスルーホールと回路パターンを形成
し、部品を搭載したものの例を示す。By incorporating various fillers into such a resin system, the thermal conductivity can be improved and the coefficient of thermal expansion can be matched to the interpolated parts. For example, powders of inorganic substances such as fused silica, crystalline silica, alumina, and silicon nitride, and powders of organic substances such as silicone and Teflon can be used, and they may be used alone or in combination. The particle size of the filler may be not more than a size that does not clog the gate of the molding die, and the filler may have any shape. The blending amount of the filler is not particularly limited, but is preferably in the range of 20 to 80% by volume from the viewpoint of the melt viscosity of the resin composition and the coefficient of thermal expansion of the cured product. When compounding a filler, a surface treatment agent such as a silane coupling agent may be added to enhance the adhesiveness to the resin. As a molding method, a general molding material molding method such as casting, transfer molding, injection molding, and compression molding can be used, and heating and pressurization may be performed as necessary. FIG. 1 (d) shows an example in which a plated through hole and a circuit pattern are formed on a printed wiring board obtained by the method of the present invention, and components are mounted.
【００１０】[0010]
【作用】本発明方法で得られた印刷配線用基板は、絶縁
樹脂層に電子部品を内挿しているため、従来の基板と比
較し、最高で２倍の高い実装密度が得られる。また、絶
縁樹脂が熱硬化性樹脂を用いた成形材料の硬化物である
ため、優れた耐熱性が得られる。更に、成形材料を用い
ることで、部品を内挿するためのザグリ等の穴明けは一
切不要である。The printed wiring board obtained by the method of the present invention has a mounting density of up to twice as high as that of a conventional board because electronic components are inserted in the insulating resin layer. Further, since the insulating resin is a cured product of a molding material using a thermosetting resin, excellent heat resistance can be obtained. Furthermore, by using a molding material, it is not necessary to make a hole such as a counterbore for inserting a part.
【００１１】[0011]
【実施例】以下、実施例に基づき本発明を説明するが、
本発明はこの実施例に限定されるものではない。Hereinafter, the present invention will be described based on examples.
The present invention is not limited to this embodiment.
【００１２】実施例１ ＥＳＣＮ−１９５（住友化学(株)製オルソクレゾール ノボラック型エポキシ樹脂、商品名） ：１００重量部 ＨＰ−８００Ｎ（日立化成工業(株)製フェノールノボ ラック樹脂、商品名） ： ５０重量部 アルミナ粉 ：９５０重量部 エポキシシランカップリング剤 ： ３重量部 トリフェニルホスフィン ： ５重量部 カーボンブラック着色剤 ： １重量部 上記化合物を充分混練して熱硬化性の成形材料を得た。
一方、図１（ａ）に示すように、厚さ３５μm の銅箔の
所定の位置にクリームはんだを塗布し、厚さ１mmの表面
実装型パッケージ（型名ＴＳＯＰ、ＪＥＤＥＣ外形）に
封止されたＩＣと、厚さ０．６mmのチップ抵抗（３２１
６サイズ、ＪＩＳ外形）、厚さ０．７mmのチップコンデ
ンサ（３２１６サイズ、ＪＩＳ外形）を搭載してリフロ
ーはんだ付けを行ない、接続、固定した。このような金
属箔を２枚用意し、図１（ｂ）に示すように、上下とも
深さ０．８mmのキャビティを有する金型に部品搭載面が
キャビティ内部に向くように配置し、これに上記成形材
料を移送プレスで１７５℃、９０秒で移送、成形したも
のを１７５℃、５時間後硬化して、図１（ｃ）に示すよ
うな厚さ１．６mm、１００mm角の両面銅張基板を得た。Example 1 ESCN-195 (orthocresol novolak type epoxy resin manufactured by Sumitomo Chemical Co., Ltd., trade name): 100 parts by weight HP-800N (phenol novolak resin manufactured by Hitachi Chemical Co., Ltd., trade name): 50 parts by weight Alumina powder: 950 parts by weight Epoxysilane coupling agent: 3 parts by weight Triphenylphosphine: 5 parts by weight Carbon black colorant: 1 part by weight The above compound was sufficiently kneaded to obtain a thermosetting molding material.
On the other hand, as shown in FIG. 1 (a), a cream solder was applied to a predetermined position of a copper foil having a thickness of 35 μm and sealed in a surface-mount type package (model name: TSOP, JEDEC outer shape) having a thickness of 1 mm. IC and chip resistor of thickness 0.6mm (321
A chip capacitor (3216 size, JIS outer shape) having a size of 6 mm and JIS outer shape and a thickness of 0.7 mm was mounted, reflow soldered, connected and fixed. Two such metal foils were prepared and, as shown in FIG. 1 (b), placed in a mold having a cavity with a depth of 0.8 mm at both the top and bottom, with the component mounting surface facing the inside of the cavity. The above molding material was transferred at 175 ° C. for 90 seconds by a transfer press, and the formed material was cured at 175 ° C. for 5 hours, and was coated with a 1.6 mm thick, 100 mm square double-sided copper as shown in FIG. A substrate was obtained.
【００１３】比較例１ ジシアンジアミド硬化系エポキシ樹脂ワニスを厚さ０．
２mmのガラス布に含浸させた後、乾燥させプリプレグを
得た。これを８枚積層し両面に実施例１で用いた銅箔各
１枚を配置し、プレスにより１７０℃、９０分加熱、加
圧成形して厚さ１．６７mmの銅張積層板を得た。Comparative Example 1 A dicyandiamide-curable epoxy resin varnish having a thickness of 0.
After impregnating in a 2 mm glass cloth, it was dried to obtain a prepreg. Eight sheets of this were laminated, and each of the copper foils used in Example 1 was placed on both sides, and heated and pressed at 170 ° C. for 90 minutes to obtain a copper-clad laminate having a thickness of 1.67 mm. .
【００１４】以上のようにして得られた基板に、図１
（ｄ）に示すように回路パターンを形成し、表裏面の表
層回路上に実施例１で用いた表面実装部品を搭載して、
基板の厚さ方向での実装部品数を求めて実装密度を評価
した。結果を表１に示す。FIG. 1 shows the substrate obtained as described above.
A circuit pattern is formed as shown in (d), and the surface mount components used in Example 1 are mounted on the surface circuit on the front and back surfaces, and
The number of mounted components in the thickness direction of the substrate was obtained, and the mounting density was evaluated. Table 1 shows the results.
【００１５】[0015]
【表１】 [Table 1]
【００１６】表１から明らかなように、実施例１の部品
実装密度は１．５〜２倍と向上し、本発明の目的である
高密度化を達成することができた。As is clear from Table 1, the component mounting density of Example 1 was improved to 1.5 to 2 times, and the high density, which is the object of the present invention, could be achieved.
【００１７】[0017]
【発明の効果】以上の説明から明らかなように、本発明
の印刷配線用基板の製造方法は、基板の絶縁層内に電子
部品を内蔵することができ、電子機器の小型化、高密度
化が図れるため、その産業的価値は高い。As is apparent from the above description, the method for manufacturing a printed wiring board according to the present invention allows electronic components to be built in the insulating layer of the board, thereby reducing the size and density of electronic equipment. Therefore, its industrial value is high.
【図１】（ａ）〜（ｃ）は本発明の印刷配線用基板の製
造工程を示す断面図、（ｄ）は本発明方法により得られ
た基板の応用例を示す断面図である。1 (a) to 1 (c) are cross-sectional views showing steps for manufacturing a printed wiring board according to the present invention, and FIG. 1 (d) is a cross-sectional view showing an application example of a substrate obtained by the method of the present invention.
１…金属箔、２…電子部品、３…接続材料、４…上型、
５…下型、６…キャビティ、７…絶縁樹脂DESCRIPTION OF SYMBOLS 1 ... Metal foil, 2 ... Electronic parts, 3 ... Connection material, 4 ... Upper mold,
5 lower mold, 6 cavity, 7 insulating resin
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭57−50494（ＪＰ，Ａ) 特開 平１−143391（ＪＰ，Ａ) 特開 昭63−254790（ＪＰ，Ａ) 特開 平４−135718（ＪＰ，Ａ) 特開 平４−283987（ＪＰ，Ａ) (58)調査した分野(Int.Cl.6，ＤＢ名) H05K 3/00,3/20──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-57-50494 (JP, A) JP-A-1-143391 (JP, A) JP-A-63-254790 (JP, A) JP-A-4- 135718 (JP, A) JP-A-4-283987 (JP, A) (58) Fields investigated (Int. Cl. 6 , DB name) H05K 3/00, 3/20
Claims (1)
部品を電気的に接続した金属箔を電子部品搭載面がキャ
ビティ内側に向くように配置し、次いで熱硬化性樹脂を
用いた成形材料を注入、硬化してなることを特徴とする
印刷配線用基板の製造方法。1. A molding material using a thermosetting resin, wherein a metal foil having an electronic component electrically connected to one side thereof is disposed in a cavity of a molding die so that an electronic component mounting surface faces the inside of the cavity. A method for producing a substrate for printed wiring, characterized by being injected and cured.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10505392A JP2800550B2 (en) | 1992-04-24 | 1992-04-24 | Manufacturing method of printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10505392A JP2800550B2 (en) | 1992-04-24 | 1992-04-24 | Manufacturing method of printed wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH05299808A JPH05299808A (en) | 1993-11-12 |
| JP2800550B2 true JP2800550B2 (en) | 1998-09-21 |
Family
ID=14397249
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10505392A Expired - Fee Related JP2800550B2 (en) | 1992-04-24 | 1992-04-24 | Manufacturing method of printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2800550B2 (en) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6038133A (en) | 1997-11-25 | 2000-03-14 | Matsushita Electric Industrial Co., Ltd. | Circuit component built-in module and method for producing the same |
| KR101084525B1 (en) | 1999-09-02 | 2011-11-18 | 이비덴 가부시키가이샤 | Printed circuit board and method of manufacturing printed circuit board |
| US6876554B1 (en) | 1999-09-02 | 2005-04-05 | Ibiden Co., Ltd. | Printing wiring board and method of producing the same and capacitor to be contained in printed wiring board |
| JP4863546B2 (en) * | 2000-07-21 | 2012-01-25 | イビデン株式会社 | Capacitor-embedded printed wiring board and manufacturing method of capacitor-embedded printed wiring board |
| JP4869486B2 (en) * | 2001-03-13 | 2012-02-08 | イビデン株式会社 | Printed wiring board and printed wiring board manufacturing method |
| JP4863559B2 (en) * | 2001-03-13 | 2012-01-25 | イビデン株式会社 | Printed wiring board and printed wiring board manufacturing method |
| JP4863560B2 (en) * | 2001-03-13 | 2012-01-25 | イビデン株式会社 | Printed wiring board and printed wiring board manufacturing method |
| JP4863562B2 (en) * | 2001-03-13 | 2012-01-25 | イビデン株式会社 | Printed wiring board and printed wiring board manufacturing method |
| JP4863561B2 (en) * | 2001-03-13 | 2012-01-25 | イビデン株式会社 | Method for manufacturing printed wiring board |
| JP4863563B2 (en) * | 2001-03-13 | 2012-01-25 | イビデン株式会社 | Printed wiring board and printed wiring board manufacturing method |
| JP4863564B2 (en) * | 2001-03-13 | 2012-01-25 | イビデン株式会社 | Printed wiring board and printed wiring board manufacturing method |
| JP2008153682A (en) * | 2008-01-24 | 2008-07-03 | Tadatomo Suga | Electronic parts mounter and its manufacturing method |
| JP2010062451A (en) * | 2008-09-05 | 2010-03-18 | Fujikura Ltd | Component built-in type multilayer wiring board, and method for manufacturing the same |
| US8767408B2 (en) * | 2012-02-08 | 2014-07-01 | Apple Inc. | Three dimensional passive multi-component structures |
| JP2017063153A (en) * | 2015-09-25 | 2017-03-30 | 京セラ株式会社 | Wiring board |
-
1992
- 1992-04-24 JP JP10505392A patent/JP2800550B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH05299808A (en) | 1993-11-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3051700B2 (en) | Method of manufacturing multilayer wiring board with built-in element | |
| US7059042B2 (en) | Method of manufacturing a thermal conductive circuit board with grounding pattern connected to a heat sink | |
| US7341890B2 (en) | Circuit board with built-in electronic component and method for manufacturing the same | |
| JP2800550B2 (en) | Manufacturing method of printed wiring board | |
| JP3312723B2 (en) | Heat conductive sheet, method of manufacturing the same, heat conductive substrate using the same, and method of manufacturing the same | |
| JP3375555B2 (en) | Circuit component built-in module and method of manufacturing the same | |
| JPH11126978A (en) | Multilayered wiring board | |
| WO2002007485A1 (en) | Circuit board and method for manufacturing the same, and electronic apparatus comprising it | |
| JP2002246542A (en) | Power module and manufacturing method therefor | |
| JPH10303522A (en) | Circuit board | |
| JP3418617B2 (en) | Heat conductive substrate and semiconductor module using the same | |
| JP2004055967A (en) | Manufacturing method of board with built-in electronic component | |
| JP4283753B2 (en) | Multi-layer printed wiring board with built-in electrical components and method for manufacturing the same | |
| JP3167503B2 (en) | Manufacturing method of memory module | |
| JP2842037B2 (en) | Printed wiring board with metal core | |
| JP2005045228A (en) | Circuit board with built-in electronic component and its manufacturing method | |
| JP3505170B2 (en) | Thermal conductive substrate and method of manufacturing the same | |
| JP2970172B2 (en) | Method for manufacturing printed wiring board with metal core | |
| JP3614844B2 (en) | Thermal conductive substrate | |
| JP2004039723A (en) | Module with built-in circuit component and its manufacturing method | |
| JP2003347705A (en) | Circuit component module and manufacturing method thereof | |
| JP3199599B2 (en) | Metal-based multilayer circuit board | |
| JP2002271028A (en) | Coil-incorporated multi-layer substrate and its manufacturing method, and manufacturing method for laminated coil | |
| JPS60236280A (en) | Plate for circuit | |
| JPH0563343A (en) | Electronic parts packaging method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20070710 Year of fee payment: 9 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 10 Free format text: PAYMENT UNTIL: 20080710 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 11 Free format text: PAYMENT UNTIL: 20090710 |
|
| LAPS | Cancellation because of no payment of annual fees |