JP2740941B2 - スタティックランダムアクセスメモリ素子 - Google Patents
スタティックランダムアクセスメモリ素子Info
- Publication number
- JP2740941B2 JP2740941B2 JP7007139A JP713995A JP2740941B2 JP 2740941 B2 JP2740941 B2 JP 2740941B2 JP 7007139 A JP7007139 A JP 7007139A JP 713995 A JP713995 A JP 713995A JP 2740941 B2 JP2740941 B2 JP 2740941B2
- Authority
- JP
- Japan
- Prior art keywords
- power
- signal
- node
- random access
- access memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000003068 static effect Effects 0.000 title claims description 25
- 230000007704 transition Effects 0.000 claims description 19
- 238000001514 detection method Methods 0.000 claims description 14
- 230000004044 response Effects 0.000 claims description 11
- 239000003990 capacitor Substances 0.000 claims description 9
- 230000000087 stabilizing effect Effects 0.000 claims description 2
- 230000004913 activation Effects 0.000 description 22
- 238000010586 diagram Methods 0.000 description 6
- 102100029010 D-aminoacyl-tRNA deacylase 1 Human genes 0.000 description 4
- 101000838688 Homo sapiens D-aminoacyl-tRNA deacylase 1 Proteins 0.000 description 4
- 230000002159 abnormal effect Effects 0.000 description 4
- 201000002487 asphyxiating thoracic dystrophy 1 Diseases 0.000 description 3
- 230000003213 activating effect Effects 0.000 description 2
- HCUOEKSZWPGJIM-YBRHCDHNSA-N (e,2e)-2-hydroxyimino-6-methoxy-4-methyl-5-nitrohex-3-enamide Chemical compound COCC([N+]([O-])=O)\C(C)=C\C(=N/O)\C(N)=O HCUOEKSZWPGJIM-YBRHCDHNSA-N 0.000 description 1
- 101001109689 Homo sapiens Nuclear receptor subfamily 4 group A member 3 Proteins 0.000 description 1
- 101000598778 Homo sapiens Protein OSCP1 Proteins 0.000 description 1
- 101001067395 Mus musculus Phospholipid scramblase 1 Proteins 0.000 description 1
- 102100022673 Nuclear receptor subfamily 4 group A member 3 Human genes 0.000 description 1
- 230000007488 abnormal function Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000001808 coupling effect Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/143—Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels ; Switching between alternative supplies
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR94P26835 | 1994-10-20 | ||
| KR1019940026835A KR0141933B1 (ko) | 1994-10-20 | 1994-10-20 | 저전력의 스테이틱 랜덤 억세스 메모리장치 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08124383A JPH08124383A (ja) | 1996-05-17 |
| JP2740941B2 true JP2740941B2 (ja) | 1998-04-15 |
Family
ID=19395500
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7007139A Expired - Lifetime JP2740941B2 (ja) | 1994-10-20 | 1995-01-20 | スタティックランダムアクセスメモリ素子 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US5646902A (en, 2012) |
| JP (1) | JP2740941B2 (en, 2012) |
| KR (1) | KR0141933B1 (en, 2012) |
| TW (1) | TW276361B (en, 2012) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4198201B2 (ja) | 1995-06-02 | 2008-12-17 | 株式会社ルネサステクノロジ | 半導体装置 |
| US5724294A (en) * | 1996-12-30 | 1998-03-03 | Intel Corporation | Self-tracking sense amplifier strobing circuit and method |
| KR100253282B1 (ko) * | 1997-04-01 | 2000-05-01 | 김영환 | 메모리소자의소모전력자동감소회로 |
| FR2766594B1 (fr) * | 1997-07-24 | 2000-01-28 | Sgs Thomson Microelectronics | Dispositif de re-initialisation a commande externe pour une memoire non volatile en circuit integre |
| KR100269313B1 (ko) * | 1997-11-07 | 2000-12-01 | 윤종용 | 대기시전류소모가적은반도체메모리장치 |
| WO1999027537A1 (en) * | 1997-11-21 | 1999-06-03 | Macronix International Co., Ltd. | On chip voltage generation for low power integrated circuits |
| US6002630A (en) * | 1997-11-21 | 1999-12-14 | Macronix International Co., Ltd. | On chip voltage generation for low power integrated circuits |
| KR100272164B1 (ko) * | 1997-12-30 | 2000-11-15 | 윤종용 | 모드레지스터셋회로를갖는반도체장치 |
| US6084446A (en) * | 1998-03-30 | 2000-07-04 | Macronix International Co., Ltd. | Power on reset circuit |
| US6101143A (en) * | 1998-12-23 | 2000-08-08 | Xilinx, Inc. | SRAM shutdown circuit for FPGA to conserve power when FPGA is not in use |
| US6240030B1 (en) | 1998-12-30 | 2001-05-29 | Samsung Electronics Co., Ltd. | Integrated circuit devices having mode selection circuits that generate a mode signal based on the magnitude of a mode control signal when a power supply signal transitions from a first state to a second state |
| US6560158B2 (en) * | 2001-04-27 | 2003-05-06 | Samsung Electronics Co., Ltd. | Power down voltage control method and apparatus |
| JP3959341B2 (ja) * | 2002-02-18 | 2007-08-15 | 株式会社東芝 | 半導体集積回路装置 |
| KR100560942B1 (ko) | 2004-12-30 | 2006-03-14 | 주식회사 하이닉스반도체 | Ｐｖｔ 변화에 무관하게 안정적으로 동작하는 파워-업검출 회로 및 이를 포함하는 반도체 장치 |
| US7602222B2 (en) * | 2005-09-30 | 2009-10-13 | Mosaid Technologies Incorporated | Power up circuit with low power sleep mode operation |
| JP6050804B2 (ja) * | 2014-11-28 | 2016-12-21 | 力晶科技股▲ふん▼有限公司 | 内部電源電圧補助回路、半導体記憶装置及び半導体装置 |
| CN110060720A (zh) * | 2019-04-08 | 2019-07-26 | 苏州汇峰微电子有限公司 | 动态随机存储器的晶体管闩锁预防系统 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0812756B2 (ja) * | 1987-06-22 | 1996-02-07 | 松下電子工業株式会社 | スタチックｒａｍ回路 |
| JPH01251496A (ja) * | 1988-03-31 | 1989-10-06 | Toshiba Corp | スタティック型ランダムアクセスメモリ |
| US5247164A (en) * | 1989-01-26 | 1993-09-21 | Hitachi Maxell, Ltd. | IC card and portable terminal |
| JP3142414B2 (ja) * | 1993-05-06 | 2001-03-07 | 株式会社東芝 | 消費電流削減機能を有する半導体集積回路 |
| US5329491A (en) * | 1993-06-30 | 1994-07-12 | Intel Corporation | Nonvolatile memory card with automatic power supply configuration |
| US5363335A (en) * | 1993-09-28 | 1994-11-08 | Intel Corporation | Nonvolatile memory with automatic power supply configuration |
-
1994
- 1994-10-20 KR KR1019940026835A patent/KR0141933B1/ko not_active Expired - Fee Related
- 1994-12-22 TW TW083112062A patent/TW276361B/zh active
-
1995
- 1995-01-20 JP JP7007139A patent/JP2740941B2/ja not_active Expired - Lifetime
-
1996
- 1996-07-03 US US08/675,511 patent/US5646902A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| KR960015590A (ko) | 1996-05-22 |
| KR0141933B1 (ko) | 1998-07-15 |
| JPH08124383A (ja) | 1996-05-17 |
| US5646902A (en) | 1997-07-08 |
| TW276361B (en, 2012) | 1996-05-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100253282B1 (ko) | 메모리소자의소모전력자동감소회로 | |
| JP2740941B2 (ja) | スタティックランダムアクセスメモリ素子 | |
| US6021082A (en) | Semiconductor memory device including an internal power supply circuit having standby and activation mode | |
| US5267197A (en) | Read/write memory having an improved write driver | |
| EP0186906B1 (en) | Semiconductor memory attaining high data read speed and having high noise margin | |
| US8134874B2 (en) | Dynamic leakage control for memory arrays | |
| KR100507379B1 (ko) | 워드라인 구동 회로 | |
| JPH07109705B2 (ja) | 半導体メモリ装置 | |
| US5297090A (en) | Semiconductor memory with column decoded bit line equilibrate | |
| US6898107B2 (en) | Nonvolatile FeRAM control device | |
| US6845031B2 (en) | Nonvolatile ferroelectric memory device and method for driving the same | |
| JPH01119982A (ja) | スタティック型ランダムアクセスメモリ | |
| KR101184517B1 (ko) | 메모리 장치의 동적 리프레시를 개선하는 장치 및 방법 | |
| US6930952B2 (en) | Method of reading memory device in page mode and row decoder control circuit using the same | |
| US20070047363A1 (en) | Memory | |
| JPS5954094A (ja) | 半導体記憶装置 | |
| US6580656B2 (en) | Semiconductor memory device having memory cell block activation control circuit and method for controlling activation of memory cell blocks thereof | |
| US6240026B1 (en) | Bit line sense circuit and method for dynamic random access memories | |
| US7057952B1 (en) | Precharge control circuit of pseudo SRAM | |
| JPS60119691A (ja) | メモリ回路 | |
| KR100427033B1 (ko) | 반도체메모리장치의워드라인구동장치및그방법 | |
| KR100253285B1 (ko) | 번-인 모드를 고려한 자동 전력 감소 펄스폭 제어회로 | |
| US20150117094A1 (en) | Memory device and a method of operating the same | |
| JP2005310197A (ja) | 半導体集積回路装置及びそのデータ書き込み方法 | |
| JP2616724B2 (ja) | 半導体メモリ装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 19971202 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080130 Year of fee payment: 10 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090130 Year of fee payment: 11 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090130 Year of fee payment: 11 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100130 Year of fee payment: 12 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100130 Year of fee payment: 12 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110130 Year of fee payment: 13 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120130 Year of fee payment: 14 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120130 Year of fee payment: 14 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130130 Year of fee payment: 15 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| EXPY | Cancellation because of completion of term |