JP2712270B2 - Charge transfer device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a charge transfer device, and more particularly, to a gate electrode shape for increasing the maximum driving frequency of a charge transfer shift register.

[Conventional technology]

Conventionally, the gate electrode of the charge transfer shift register of this type of charge transfer device has a rectangular shape at least at the center.
FIG. 3 shows a conventional example. The charges converted in the photoelectric conversion region 1 are transferred to the first charge transfer shift register 3 or the second charge transfer shift register 4 through the transfer gate 2. The first charge transfer shift register 3 and the second charge transfer shift register 4 are driven by a three-phase driving clock φ.
₁ (5), charges are sequentially transferred to the output side by φ ₂ (6) and φ ₃ (7). The charges transferred by the first charge transfer shift register 3 or the second charge transfer shift register 4 are alternately transferred to the output circuit 9 by the output gate 8.

FIG. 4A is a partially enlarged view of the central portion 3-1 of the first charge transfer shift register of FIG. As is clear from FIG. 4A, the shape of the gate electrode is rectangular. FIG. 4 (b) is a partially enlarged view of a portion 3-2 near the output gate 5 of the first charge transfer shift register 3 of FIG. As is clear from FIG. 4 (b), the shape of the gate electrode is trapezoidal. However, the trapezoidal portion 3-2 near the output gate 5 of the first charge transfer shift register 3 is simply the charge from the first charge transfer shift register 3 and the charge from the second charge transfer shift register 4. Is output to the output circuit 9 by the output gate 5 alternately, and is not intended to increase the maximum driving frequency of the charge transfer shift register. This can be easily determined from the fact that the gate electrode shape of the portion 3-1 of the first charge transfer shift register 3 is rectangular.

[Problems to be solved by the invention]

The above-described conventional charge transfer device has a drawback that the maximum driving frequency is determined by the pitch L between the electrodes of the charge transfer shift register, since at least the central portion of the gate electrode of the charge transfer shift register has a rectangular shape.

[Means for solving the problem]

A charge transfer device according to the present invention includes a shift register including a plurality of photoelectric conversion regions on a semiconductor substrate, a transfer gate for reading signal charges in the plurality of photoelectric conversion regions, and a two-layer electrode for sequentially transferring the signal charges. Wherein the electrodes constituting the shift register are linearly arranged, and the shape of each electrode is a parallelogram having an internal angle exceeding 90 °.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

FIG. 1 is a partially enlarged view of a central portion of a charge transfer shift register showing one embodiment of the present invention. The first charge transfer shift register 3 is driven by the three-phase clocks φ ₁ , φ ₂ , φ ₃ and charges are sequentially transferred to the output side. The three-phase clocks φ ₁ , φ ₂ , and φ ₃ are connected to the φ ₁ gate electrode 15, the φ ₂ gate electrode 16, and the φ ₃ gate electrode 17, respectively. phi ₁ gate electrode 15 is formed in the lower layer of polysilicon, the gate electrode 16, 17 for a phi ₂ and phi ₃ are formed in the upper layer of polysilicon. The pitch between the electrodes is L, and the shape of each electrode is a trapezoid. Since the charge transferred by the charge transfer shift register 13 can pass under the electrode as the electrode width is shorter, it passes through a region closer to the short side of the gate electrode than half the width W of the charge transfer shift register 13. I do. Accordingly, the path through which the charges pass is indicated by the broken line in FIG. 1, and the distance over which the charges move under each gate electrode is L ', which is shorter than the pitch L between the electrodes. Since the time required for the charge to move becomes shorter in proportion to the distance traveled, the maximum drive frequency becomes faster.

FIG. 2 is a diagram showing an electrode shape of a charge transfer register according to another embodiment of the present invention. The electrode shape for each bit corresponding to φ ₁ , φ ₂ , and φ ₃ is a parallelogram, and the effective movement distance of the charge is L ″ (the distance that passes under one gate electrode along the path indicated by the dashed line). 1), and the moving distance of the electric charge is shorter than that of the embodiment of Fig. 1. That is, there is an advantage that the maximum driving frequency of the electric charge transfer shift register becomes faster.

〔The invention's effect〕

As described above, the present invention provides a charge transfer shift register having at least a central gate electrode having a shape in which at least one of the inner corners of a rectangle such as a trapezoid or a parallelogram exceeds 90 °. This has the effect of accelerating the maximum drive frequency.

In each of the embodiments, an example of a three-phase clock has been described.
Needless to say, it is not limited to the phase.

[Brief description of the drawings]

FIG. 1 is a plan view showing one embodiment of the present invention, FIG. 2 is a plan view showing another embodiment of the present invention, FIG. 3 is a block diagram showing a conventional charge transfer device, and FIG. 4) is a partially enlarged view of the charge transfer shift register of FIG. 3, and FIG. 4 (b) is another partially enlarged view of the charge transfer shift register of FIG. Reference numeral 1 denotes a photoelectric conversion region, 2 denotes a transfer gate, 3 denotes a charge transfer shift register of one stage, 4 ... a second charge transfer shift register, 5 denotes a drive clock φ ₁ , and 6 denotes a drive clock φ _2. , 7... Drive clock φ ₃ , 8.
9 ...... output circuit, 15 ...... phi ₁ for a gate electrode, 16 ...... phi ₂
Use gate electrode, 17 ...... φ ₃ for the gate electrode.

Claims (1)

(57) [Claims] 1. A semiconductor device comprising: a plurality of photoelectric conversion regions on a semiconductor substrate; a transfer gate for reading signal charges in the plurality of photoelectric conversion regions; and a shift register including two-layer electrodes for sequentially transferring the signal charges. In the charge transfer device, the electrodes constituting the shift register are linearly arranged, and the shape of each electrode is a parallelogram having an inner angle exceeding 90 °.