JP2734042B2 - Charge transfer solid-state imaging device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a charge transfer solid-state imaging device, and more particularly, to a structure of a unit pixel.

[Conventional technology]

Conventionally, in a charge transfer solid-state imaging device, a layout is designed so that signal charges can be completely transferred. For example, a charge transfer vertical shift register (hereinafter VC
In the case of (CD), when the transfer gate electrode has a two-layer structure, not only does the upper layer gate electrode and the lower layer gate electrode overlap each other so as not to form a gap between them,
VCCD and VCCD on the channel stoppers of the photodiodes adjacent to each other in the vertical direction (hereinafter referred to as photodiode stoppers)
Between the gate electrodes of the same layer between them, and a decrease in transfer efficiency has been prevented. However, in recent years, as pattern miniaturization progresses, even if the gate electrode itself is undesired due to exposure, etching, oxidation, and the like during the formation of the gate electrode, the photo yield is not reduced due to poor transfer efficiency. The connecting portion between the upper and lower gates on the channel stopper of the diode isolation had to have a width that would not cause disconnection. That is, as shown in FIG. 5 in the plan view of FIG. 4 and the cross-sectional view taken along the line BB 'of FIG.
06 and the lower gate electrode 205 are also provided on the channel stopper 204 for separating the photodiodes.
They are connected as upper and lower gate electrodes 208 and 207 between D.

[Problems to be solved by the invention]

In the unit pixel of the conventional electrode transfer device described above, the upper gate electrode and the lower gate electrode overlap on the VCCD 202 and the channel stopper 204 of the photodiode isolation as shown in FIG. 4 so as not to deteriorate the transfer efficiency. .
Therefore, the connecting portion 208 between the upper gate electrode VCCD and the VCCD has a gate capacitance with the connecting portion 207 of the lower gate electrode and a gate capacitance via an oxide film on the silicon substrate. Further, a connection portion 207 between the lower gate electrode VCCD and the VCCD has a gate capacitance of the connection portion 208 between the upper power supply VCCD and the VCCD and a gate capacitance via an oxide film on the silicon substrate.

As the density of solid-state imaging devices increases, the number of transfer stages increases, and high-speed transfer is required. Therefore, in order to prevent the transfer efficiency from deteriorating and to reduce the load of power consumption of the driving system, it is preferable that the gate capacity is smaller.

However, the gate electrode of the conventional unit pixel has both the gate-to-gate capacitance and the gate capacitance via the oxide film on the silicon substrate, and the overlapping and connecting parts cannot be reduced. There is a drawback that the load of power consumption of the system increases.

[Means for solving the problem]

According to the present invention, a charge transfer vertical CCD having a photoelectric conversion region, a first channel stopper separating a photoelectric conversion region adjacent to the photoelectric conversion region, and a plurality of gate electrodes is provided.
And the second for separating the photoelectric conversion region and the charge transfer vertical CCD
And a transfer region for controlling the transfer of signal charges from the photoelectric conversion region to the charge transfer vertical CCD, wherein the charge transfer vertical CCD includes a gate electrode of a first layer and a second layer. A gate electrode of the first layer of the charge transfer vertical CCD and a horizontally adjacent charge transfer vertical CCD separates the photoelectric conversion region from the adjacent photoelectric conversion region. The gate electrodes of the other plurality of layers which are provided on the first channel stopper to be shifted to one side of the photoelectric conversion region side and which constitute the charge transfer vertical CCD are adjacent to the charge transfer vertical CCD in the horizontal direction. A portion of the vertical CCD connecting the gate electrodes of the plurality of layers is on the first channel stopper adjacent to the photoelectric conversion region and is opposite to the portion of the connection of the gate electrodes of the first layer. Beside Closer and, and obtain the first charge transfer solid-state imaging device is provided as mutually weight part and connecting part of the gate electrode layer.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

FIG. 1 is a plan view of one embodiment of the present invention, and FIG. 2 is a cross-sectional view of FIG. 1 cut along AA '. The configuration of the unit pixel includes a photodiode 101, a VCCD 102, and two layers of polysilicon gate electrodes 105 and 106. The lower polysilicon gate electrode 105 plays a role as a via gate of the VCCD 102. VCC of lower polysilicon gate electrode 105
The connecting portion between D and VCCD (hereinafter, connecting portion of the lower gate electrode) 107 is a channel stopper 1 for separating the photodiode.
It is made lean on 04, and partly overhangs the photodiode. Upper polysilicon gate electrode 10
6 is formed with a partial area as a transfer gate 111 and a VC
It plays a role as a storage gate of CD102.
A portion where the upper polysilicon gate electrode 106 is connected to VCCD (hereinafter referred to as a portion where the upper gate electrode is connected) 108
Overlaps with the lower gate electrode connection portion 107 on the photodiode isolation channel stopper, and partially overlaps the lower gate electrode connection portion with the photodiode opposite to the photodiode overhanging the photodiode. It is overhanging. Since the layout is performed in this manner, the number of overlapping portions between the connecting portion 107 of the lower gate electrode and the connecting portion 108 of the upper gate electrode is reduced. Referring to FIG. 2, the connection portion of the lower gate electrode is different from the conventional case.
The capacitance of 107 decreases with the portion of the upper gate electrode that completely covers the upper portion, and as a result, the sum of the decreased capacitance and the capacitance with the oxide film of the photodiode is reduced by about 1/7.

Therefore, the overlap capacitance between the upper gate electrode and the lower gate electrode on the channel stopper for separating the photodiode is reduced, the gate electrode capacitance is reduced, and power consumption of the drive circuit system can be reduced.

FIG. 3 is a sectional view of another embodiment of the present invention. As shown in FIG. 3, when the channel stopper for separating the photodiode can be made sufficiently wide, the connecting portions 307 and 308 of the lower and upper gate electrodes are located on the channel stopper 304 for separating the photodiode. With such a layout, not only the overlap capacitance of the gate electrode is reduced, but also the blue sensitivity is not reduced due to the protrusion of the connecting portion of the gate electrode to the photodiode portion.

〔The invention's effect〕

As described above, according to the present invention, the connection part of the gate electrode of one layer of the VCCD is made to protrude above the photodiode and is offset on the channel stopper of the photodiode separation, and the connection of the gate electrode of the other layer is By offsetting the portion on the opposite side on the photodiode-separated channel stopper, there is an effect that the inter-gate capacitance at the junction of the gate electrodes can be reduced and the power consumption of the drive circuit system can be reduced.

[Brief description of the drawings]

FIG. 1 is a plan view of a unit pixel according to one embodiment of the present invention, FIG. 2 is a cross-sectional view taken along line AA 'of FIG. 1, FIG. 3 is a cross-sectional view of another embodiment of the present invention. FIG. 4 is a plan view of a conventional unit pixel, and FIG. 5 is a sectional view taken along line BB 'of FIG. 101,201,301 …… Photodiode, 102,202,… VCC
D, 103, 203 …… Channel stopper, 104,204,304 ……
Photodiode-separated channel stopper, 105,205
...... Lower gate electrode, 106, 206 ... Upper gate electrode, 10
7,207,307 …… the connecting part of the lower gate electrode, 108,208,3
08 ... Connected portion of upper gate electrode, 111,211 ... Transfer gate.

Claims (3)

(57) [Claims] 1. A photoelectric conversion region, a first channel stopper for separating the photoelectric conversion region from an adjacent photoelectric conversion region, a charge transfer vertical CCD having a plurality of gate electrodes, and the photoelectric conversion region and the charge transfer vertical CCD. Second to separate from CCD
A channel stopper, and a transfer region for controlling transmission of signal charges from the photoelectric conversion region to the charge transfer vertical CCD. The charge transfer vertical CCD includes gate electrodes of a first layer and a second layer. A gate electrode of the first layer includes a charge conversion vertical CCD and a portion where the first gate electrode of the charge transfer vertical CCD is horizontally adjacent to the first gate electrode is connected to the photoelectric conversion region and the photoelectric conversion region adjacent to the charge transfer vertical CCD. The gate electrode of the second layer, which is provided on the first channel stopper to be separated and is offset to one of the photoelectric conversion regions and forms the charge transfer vertical CCD, is horizontal to the charge transfer vertical CCD. A portion of the connection of the gate electrodes of the plurality of layers of the charge transfer vertical CCD adjacent in the direction is on the first channel stopper adjacent to the photoelectric conversion region,
And it is provided so as to be offset toward the photoelectric conversion region side opposite to the connecting portion of the gate electrode of the first layer, and further to partially overlap the connecting portion of the gate electrode of the first layer. A charge transfer solid-state imaging device. 2. A connection portion between the gate electrodes of the first layer protrudes above the photoelectric conversion region, and a connection portion between the gate electrodes of the second layer is adjacent to the photoelectric conversion region. 2. The charge-transfer solid-state imaging device according to claim 1, wherein the charge-transfer solid-state imaging device extends over the photoelectric conversion region. 3. The device according to claim 1, wherein a portion where the gate electrode of the first layer is connected and a portion where the gate electrode of the second layer overlaps are separated from the photoelectric conversion region. Charge transfer solid-state imaging device.