JPS607390B2 - Drive pulse power supply method for charge-coupled semiconductor devices - Google Patents

Drive pulse power supply method for charge-coupled semiconductor devices

Info

Publication number
JPS607390B2
JPS607390B2 JP51112038A JP11203876A JPS607390B2 JP S607390 B2 JPS607390 B2 JP S607390B2 JP 51112038 A JP51112038 A JP 51112038A JP 11203876 A JP11203876 A JP 11203876A JP S607390 B2 JPS607390 B2 JP S607390B2
Authority
JP
Japan
Prior art keywords
power supply
charge
drive pulse
transfer
coupled semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP51112038A
Other languages
Japanese (ja)
Other versions
JPS5337392A (en
Inventor
靖紀 西村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP51112038A priority Critical patent/JPS607390B2/en
Publication of JPS5337392A publication Critical patent/JPS5337392A/en
Publication of JPS607390B2 publication Critical patent/JPS607390B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/148Charge coupled imagers
    • H01L27/14831Area CCD imagers

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Description

【発明の詳細な説明】 この発明は、電荷結合型半導体装置(以下CCDという
)、特に大規模CCD固体撮像装置の駆動パルス給電方
法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a drive pulse power supply method for a charge-coupled semiconductor device (hereinafter referred to as a CCD), particularly a large-scale CCD solid-state imaging device.

近年、CCDは光検出機能と信号転送機能とを持つ機能
デバイスとして撮像装置に応用されつつある。
In recent years, CCDs are being applied to imaging devices as functional devices having a light detection function and a signal transfer function.

一般にCCD固体撮像装置においては、微細パターンの
実現による集積度の向上と受光効率の向上のために、ポ
リシリコン層を転送電極として用いているものが多い。
そしてポリシリコン層を転送電極とする3相クロツクの
CCDは、酸化膜の下部に電荷転送方向の複数の帯状チ
ャネルストップが前記転送方向の直交方向に配列される
とともに、絶縁膜を介して前記酸化膜の上部に前記直交
方向の複数の帯状の前述の転送電極が前記転送方向に配
列され、前記各ストップ間のャャネルそれぞれの電荷が
各チャネルそれぞれに割当てられた3相それぞれの転送
電極に給電される駆動パルスにより転送される。
In general, many CCD solid-state imaging devices use a polysilicon layer as a transfer electrode in order to improve the degree of integration and light receiving efficiency by realizing fine patterns.
In a three-phase clock CCD using a polysilicon layer as a transfer electrode, a plurality of band-shaped channel stops in the charge transfer direction are arranged under an oxide film in a direction perpendicular to the transfer direction, and the oxide A plurality of band-shaped transfer electrodes in the orthogonal direction are arranged on the top of the film in the transfer direction, and the charge of each channel between the stops is supplied to each of the three-phase transfer electrodes assigned to each channel. It is transferred by the drive pulse.

しかし、今後テレビジョン用に用いられるような大規模
なアレーのCCD撮像装置においては、転送電極が非常
に細長くなり、抵抗値が300/口のポリシリコン層で
はその抵抗値が無視できなくなる。ところで前述の3相
CCDは、第2図に示すように容量Cと抵抗Rとインダ
クタンスLの分布定数回路の等価回路で書き表わされ、
第1図の駆動パルスの1対の3相外部給電線L1,L2
のうち、給電線LIに近いAの部分では、第3図aに示
すように転送波はパルス発生器のパルス波と同じ矩形波
を示すが、給電線LIより遠く、給電線L2に近いBの
部分では、第3図bのように転送波は非常に歪んだもの
となる。
However, in a large-scale array CCD imaging device that will be used for television in the future, the transfer electrodes will become extremely long and thin, and the resistance value of the polysilicon layer, which has a resistance value of 300/hole, will no longer be negligible. By the way, the aforementioned three-phase CCD is expressed as an equivalent circuit of a distributed constant circuit of capacitance C, resistance R, and inductance L, as shown in FIG.
A pair of three-phase external power supply lines L1 and L2 for the drive pulse in Fig. 1
In the part A near the feeder line LI, the transferred wave shows the same rectangular wave as the pulse wave of the pulse generator, as shown in Figure 3a, but in the part B, which is farther away than the feeder line LI and closer to the feeder line L2 In the part shown in FIG. 3b, the transferred wave becomes extremely distorted.

なお、図中P1,P2,P3は3相の各相を示す。また
CCDの転送効率は駆動パルス波形に大きく影響され、
中央部では転送効率が低下して解像度が低下する。
In addition, in the figure, P1, P2, and P3 indicate each of the three phases. Furthermore, the transfer efficiency of CCD is greatly influenced by the drive pulse waveform.
In the center, the transfer efficiency decreases and the resolution decreases.

この発明は、以上のような従来の欠点を解消するため、
CCDの駆動パルスの給電方法を改善したものであり、
つぎにこの発明をその1実施例を示した第4図以下の図
面とともに詳細に説明する。第4図ないし第6図はこの
発明の給電方法を採用した3相CCD固体撮像装置を示
し、従来通り装置の一端、他端の1対の外部給電線L1
,L2から給電を行なうとともに、装置の内部の内部給
電線Li,Ljからも給電を行なうものであり、各内部
給電線Li,LjはCCDの各構成のチャネル1を形成
するチャネルストップ2上のポリシリコン転送電極3と
は絶縁膜4で絶縁されたアルミニウム等の低抵抗の金属
給電線5からなる。
In order to solve the above-mentioned conventional drawbacks, this invention
This is an improved method of feeding CCD drive pulses,
Next, this invention will be explained in detail with reference to the drawings from FIG. 4 showing one embodiment thereof. 4 to 6 show a three-phase CCD solid-state imaging device adopting the power feeding method of the present invention, in which a pair of external power feeding lines L1 at one end of the device and a pair at the other end are conventionally shown.
, L2, and also from internal feed lines Li, Lj inside the device. The polysilicon transfer electrode 3 is composed of a low-resistance metal feed line 5 made of aluminum or the like and insulated by an insulating film 4 .

そして、該金属給電線5と同一位相の駆動パルスが給電
される転送電極3とがコンタクトホール6で選択的に接
続され、外部給電線L1,L2と各内部給電線Li,L
iを用いて駆動パルスを給電する。
Then, the metal feed line 5 and the transfer electrode 3 to which a drive pulse of the same phase is fed are selectively connected through the contact hole 6, and the external feed lines L1, L2 and the internal feed lines Li, L
i is used to supply the drive pulse.

なお電荷は構成チャネルー上を紙面の上端から下端方向
に転送される。7はシリコン半導体、8は2酸化シリコ
ンの酸化膜層である。
Note that the charge is transferred on the constituent channels from the top to the bottom of the page. 7 is a silicon semiconductor, and 8 is an oxide film layer of silicon dioxide.

このような方法によると、CCDの中央部でも転送電極
3は低抵抗の金属給電線5で駆動パルスが給電されるの
で、転送電極3が細長くなってもCCDの全面にわたっ
て均一に正常なパルスが与えられ、全面にわたって均一
な良い解像度が得られる。
According to this method, drive pulses are supplied to the transfer electrode 3 through the low-resistance metal feed line 5 even in the center of the CCD, so even if the transfer electrode 3 becomes elongated, normal pulses can be uniformly distributed over the entire surface of the CCD. A good uniform resolution can be obtained over the entire surface.

また低抵抗の金属給電線5はチャネルストップ3に配置
されるので集積度の低下もない。以上のように、この発
明の電荷結合型半導体装置の駆動パルス給電方法による
と、酸化膜の下部に電荷転送方向の複数の帯状チャネル
ストップを前記転送方向の直交方向に配列するとともに
、絶縁膜を介して前記酸化膜の上部に前記直交方向の複
数の帯状の転送電極を前記転送方向に配列し、前記各ス
トップ間のチャネルそれぞれの電荷を前記転送電極に給
電される駆動パルスにより転送する電荷結合型半導体装
置の駆動パルス給電方法において、前記各チャネルの同
一位相の駆動パルスが給電される転送電極の一端,他端
を当該駆動パルスの1対の外部給電線にそれぞれ接続す
るとともに、前記絶縁膜の上部の前記各ストップの位置
に内部給電線をそれぞれ設け、かつ該各内部給電線をコ
ンタクトホールを介して前記同一位相の駆動パルスが供
給される転送電極それぞれに選択に接続し、前記入,出
力給電線および前記各内部給電線により駆動パルスを給
電することにより、外部給電線だけでなく内部給電線を
用いて駆動パルスの給電を行なうことができ、転送効率
を向上して良い解像度を得ることができ、そのうえ集積
度の低下を来たすこともないものである。
Furthermore, since the low-resistance metal feed line 5 is arranged at the channel stop 3, there is no reduction in the degree of integration. As described above, according to the drive pulse power supply method for a charge-coupled semiconductor device of the present invention, a plurality of band-shaped channel stops in the charge transfer direction are arranged under an oxide film in a direction perpendicular to the transfer direction, and an insulating film is arranged in a direction perpendicular to the transfer direction. A plurality of band-shaped transfer electrodes in the orthogonal direction are arranged in the transfer direction on the top of the oxide film through the charge coupling, and charge in each channel between the stops is transferred by a driving pulse supplied to the transfer electrodes. In the drive pulse power supply method for a type semiconductor device, one end and the other end of the transfer electrodes to which drive pulses of the same phase of each channel are supplied are respectively connected to a pair of external power supply lines for the drive pulses, and the insulating film An internal power supply line is provided at each stop position on the upper part of the input line, and each internal power supply line is selectively connected to each of the transfer electrodes to which the drive pulses of the same phase are supplied through a contact hole. By feeding the drive pulses through the output feed line and each of the internal feed lines, it is possible to feed the drive pulses using not only the external feed line but also the internal feed line, improving transfer efficiency and obtaining good resolution. Moreover, it does not cause a decrease in the degree of integration.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の電荷結合型半導体装置の駆動パルス給電
方法による半導体装置の平面図、第2図は第1図の等価
回路図、第3図a,bは第1図の半導体装置のA,Bの
部分の転送波形図、第4図はこの発明の電荷結合型半導
体装置の駆動パルス給電方法を採用した半導体装置の平
面図、第5図は第4図の拡大図、第6図は第5図のA−
A′線断面部分図である。 1・・・構成チャネル、2・・・チャネルストップ、3
…転送電極、4・・・絶縁膜、6…金属給電線、6・・
・コンタクトホール、7・・・シリコン半導体、8・・
・酸化膜層、L1,L2…外部給電線「Li,Li・・
・内部給電線。 第1図 第2図 第3図 第4図 第5図 第6図
FIG. 1 is a plan view of a semiconductor device using a conventional charge-coupled semiconductor device drive pulse power supply method, FIG. 2 is an equivalent circuit diagram of FIG. 1, and FIGS. 3a and 3b are A of the semiconductor device of FIG. 1. , FIG. 4 is a plan view of a semiconductor device employing the drive pulse power feeding method for a charge-coupled semiconductor device of the present invention, FIG. 5 is an enlarged view of FIG. 4, and FIG. A- in Figure 5
FIG. 3 is a partial cross-sectional view taken along line A'. 1...Configuration channel, 2...Channel stop, 3
...Transfer electrode, 4...Insulating film, 6...Metal feeder line, 6...
・Contact hole, 7...Silicon semiconductor, 8...
・Oxide film layer, L1, L2...external power supply line "Li, Li...
・Internal power supply line. Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6

Claims (1)

【特許請求の範囲】[Claims] 1 酸化膜の下部に電荷転送方向の複数の帯状のチヤネ
ルストツプを前記転送方向の直交方向に配列するととも
に、絶縁膜を介して前記酸化膜の上部に前記直交方向の
複数の帯状の転送電極を前記転送方向に配列し、前記各
ストツプ間のチヤネルそれぞれの電荷を前記転送電極に
給電される駆動パルスにより転送する電荷結合型半導体
装置の駆動パルス給電方法において、前記各チヤネルの
同一位相の駆動パルスが給電される転送電極の一端,他
端を当該駆動パルスの1対の外部給電線にそれぞれ接続
するとともに、前記絶縁膜の上部の前記各ストツプの位
置に内部給電線をそれぞれ設け、かつ該各内部給電線を
コンタクトホールを介して前記同一位相の駆動パルスが
供給される転送電極それぞれに選択的に接続し、前記両
外部給電線および前記各内部給電線により駆動パルスを
給電することを特徴とする電荷結合型半導体装置の駆動
パルス給電方法。
1. A plurality of band-shaped channel stops extending in the charge transfer direction are arranged under the oxide film in a direction perpendicular to the charge transfer direction, and a plurality of band-shaped transfer electrodes in the orthogonal direction are arranged on the upper part of the oxide film via an insulating film. In a drive pulse feeding method for a charge-coupled semiconductor device, in which the charges of the channels arranged in the transfer direction and between the respective stops are transferred by the drive pulses supplied to the transfer electrodes, the drive pulses of the same phase of the respective channels are arranged. One end and the other end of the transfer electrodes to be powered are connected to a pair of external power supply lines for the drive pulse, and internal power supply lines are respectively provided at the positions of the respective stops on the upper part of the insulating film, and A power supply line is selectively connected to each of the transfer electrodes to which the drive pulses of the same phase are supplied through contact holes, and the drive pulses are supplied by both the external power supply lines and each of the internal power supply lines. Drive pulse power supply method for charge-coupled semiconductor devices.
JP51112038A 1976-09-17 1976-09-17 Drive pulse power supply method for charge-coupled semiconductor devices Expired JPS607390B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP51112038A JPS607390B2 (en) 1976-09-17 1976-09-17 Drive pulse power supply method for charge-coupled semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP51112038A JPS607390B2 (en) 1976-09-17 1976-09-17 Drive pulse power supply method for charge-coupled semiconductor devices

Publications (2)

Publication Number Publication Date
JPS5337392A JPS5337392A (en) 1978-04-06
JPS607390B2 true JPS607390B2 (en) 1985-02-23

Family

ID=14576445

Family Applications (1)

Application Number Title Priority Date Filing Date
JP51112038A Expired JPS607390B2 (en) 1976-09-17 1976-09-17 Drive pulse power supply method for charge-coupled semiconductor devices

Country Status (1)

Country Link
JP (1) JPS607390B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0578716B2 (en) * 1986-02-17 1993-10-29 Tatsuno Mechatronics Kk

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5619667A (en) * 1979-07-27 1981-02-24 Nec Corp Charge coupled device
JPS5687379A (en) * 1979-12-17 1981-07-15 Matsushita Electric Ind Co Ltd Solid image pickup device
JPS5861661A (en) * 1981-10-08 1983-04-12 Toshiba Corp Charge transfer device
US4375652A (en) * 1981-10-22 1983-03-01 International Business Machines Corporation High-speed time delay and integration solid state scanner
JPS5898961A (en) * 1981-12-09 1983-06-13 Toshiba Corp Charge transfer device
JPH061829B2 (en) * 1983-08-11 1994-01-05 日本電気株式会社 Two-dimensional CCD image sensor
JPS6059543U (en) * 1983-09-29 1985-04-25 ソニー株式会社 solid-state image sensor
JPS6080272A (en) * 1983-10-07 1985-05-08 Canon Inc Charge transfer element
JPS60137064A (en) * 1983-12-26 1985-07-20 Toshiba Corp Charge transfer device
JPH079387Y2 (en) * 1986-08-14 1995-03-06 日本電気株式会社 Charge coupled device
FR2616990A1 (en) * 1987-06-19 1988-12-23 Thomson Csf Charge-transfer matrix device tolerant to high vertical-transfer frequencies, and use of such a device in an image pick-up
JP5000258B2 (en) * 2006-10-18 2012-08-15 浜松ホトニクス株式会社 Solid-state imaging device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0578716B2 (en) * 1986-02-17 1993-10-29 Tatsuno Mechatronics Kk

Also Published As

Publication number Publication date
JPS5337392A (en) 1978-04-06

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