JP2538245Y2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention will be described in the following order.

A. Industrial applications B. Overview of the invention C. Conventional technology [Fig. 3] D. Problems to be solved by the invention E. Means to solve the problems F. Action G. Example [ 1 and 2] H. Effect of the Invention (A. Industrial Application Field) The invention relates to a semiconductor device, particularly to a semiconductor device in which disconnection due to distortion in a peripheral portion is hardly caused.

(B. Outline of Invention) In the present invention, in a semiconductor device, wiring is formed in a first concave portion formed on a surface of an insulating film in order to prevent wiring from being generated due to distortion in a peripheral portion,
Further, a second concave portion for a dummy is formed on the surface of the insulating film at an interval substantially equal to the width of the wiring.

(C. Prior Art) [FIG. 3] FIG. 3 shows a conventional example of a sectional structure in a pad portion of an LSI chip. In the drawings, 1 is a silicon semiconductor substrate, 2 is a field insulating film formed by selectively heating and oxidizing the semiconductor substrate 1, and 3 is a surface planarizing insulating film (reflow film) covering the field insulating film 2. ), 4 is the first-layer aluminum wiring film, and the portion shown in the drawing is the base of the pad. Reference numeral 5 denotes an interlayer insulating film (interlayer) covering the first aluminum wiring film 4, reference numeral 6 denotes a contact hole formed in the interlayer insulating film 5, and reference numeral 7 denotes a second aluminum wiring film. 6 through the first layer aluminum wiring film 4
Is connected to Reference numeral 8 denotes a protective insulating film for protecting the second-layer aluminum wiring film 7, and reference numeral 9 denotes a pad window opening formed in the insulating film.

(D. Problems to be Solved by the Invention) By the way, the size of the LSI chip tends to be large. However, when the LSI chip becomes large, a large distortion is applied to the periphery of the LSI chip. As a result, the aluminum wiring film 4, 7 has a problem that the rate of occurrence of an accident of disconnection due to the stress of the interlayer insulating film 5 or the like is increased.

The inventor of the present application has studied to solve this problem. As a result, the total thickness h of the films formed on the semiconductor substrate 1 such as the interlayer insulating film is unnecessarily thick at the peripheral portion of the LSI chip, and It has been found that this is a factor that increases the stress applied to the aluminum wiring film. That is, an insulating film such as an interlayer insulating film is grown in accordance with a fine rule at the center of an LSI chip in order to sufficiently secure a withstand voltage against a voltage applied between wirings. But originally LS
Unlike the central part, the peripheral part of the I chip incorporates a variety of circuits and is not a fine rule. Nevertheless, since the interlayer insulating film is grown in accordance with the fine rules also in the peripheral portion of the LSI chip, the thickness of the interlayer insulating film is more than necessary, The total thickness h of the films becomes large, and as a result, the stress applied to the aluminum wiring films 4 and 7 becomes extremely large.

Therefore, the inventor of the present application has obtained the idea that the insulating film is appropriately cut in the peripheral portion of the semiconductor device before the wiring is formed, whereby the insulating film is substantially thinned, and the stress applied to the wiring is reduced. This led to the invention.

Accordingly, an object of the present invention is to prevent the wiring from being disconnected due to distortion in the peripheral portion.

(E. Means for Solving the Problems) In order to solve the above problems, the semiconductor device of the present invention includes a planarizing insulating film on a field insulating film covering the surface of a semiconductor substrate, and A first concave portion occupying each position where a pad electrode composed of a wiring is to be formed is formed, and a lower layer wiring serving as a base of an electrode pad is formed substantially at the center of the first concave portion. At least one second concave portion for dummy is formed in a portion outside the first concave portion at an interval substantially equal to the width of the lower wiring, and covers the lower wiring on the flattening insulating film. An interlayer insulating film that fills the recess and insulates between the lower wiring and the upper wiring is formed.

(F. Function) According to the semiconductor device of the present invention, since the first concave portion is formed in the insulating film and the wiring is formed in the first concave portion, the semiconductor device is formed on the semiconductor substrate by the depth of the first concave portion. Thus, the total thickness of the films to be formed is reduced, and the stress applied to the wiring can be reduced.

Then, a second dummy portion is formed outside the first concave portion of the insulating film.
When the interlayer insulating film on the wiring is formed by bias CVD, bias sputtering, or Ar reverse sputtering, the interlayer insulating film is relatively thin even on the periphery of the semiconductor device, which is sparse in circuit. In addition, it can be flattened. Therefore, this point also causes a reduction in the sum of the thicknesses of the respective films formed on the semiconductor substrate, so that the stress applied to the wiring can be further reduced.

(G. Embodiment) [FIGS. 1 and 2] Hereinafter, the semiconductor device of the present invention will be described in detail with reference to the illustrated embodiments.

FIG. 1 is a sectional view of a peripheral portion showing one embodiment of the semiconductor device of the present invention. In the figure, 1 is a semiconductor substrate, 2
Is a field insulating film formed by selectively heating and oxidizing the semiconductor substrate 1, 3 is a planarizing insulating film (reflow film) formed on the field insulating film, and 10 is formed on the insulating film 3. In the first recess thus formed, a portion serving as a base of a pad of the first-layer aluminum wiring film 4 is formed substantially in the center of the first recess 10. Numerals 11 and 11 denote gaps between the pad base portion of the aluminum wiring film 4 and the inner side surface of the first recess 10. 12 and 12 are the first of the planarization insulating film 3.
A second concave portion for dummy formed outside the concave portion 10 of
At least one, preferably several to several tens, are formed from the first recess 10 at an interval equal to the width W of the pad base portion. The width of the dummy second concave portions 12 is substantially equal to the width of the gap portions 11. The formation of the first concave portion 10, the wiring film 4, and the second concave portions 12 for dummy are formed in accordance with a fine rule in the center of the semiconductor device.

Reference numeral 5 denotes an interlayer insulating film made of SiO ₂ which covers the planarizing insulating film 3 and the aluminum wiring film 4, and reference numeral 6 denotes a contact hole for exposing a pad base portion of the aluminum wiring film 4 formed on the interlayer insulating film 5. Reference numeral 7 denotes a second-layer aluminum wiring film, which is in contact with the surface of the pad base portion of the first-layer aluminum wiring film 4 through the contact hole 6. 8 is a protective insulating film for protecting the second-layer aluminum wiring film 7, and 9 is the protective insulating film 8.
Aluminum wiring film 7 in the pad opening formed in
The portion exposed to the window opening 9 becomes a bonding pad.

According to such a semiconductor device, a portion of the flattening insulating film 3 where the pad base portion of the aluminum wiring film 4 is to be formed is cut into the first concave portion 10, and the first concave portion 10 is formed.
In 10, a pad base portion of the aluminum wiring film 4 is formed. Accordingly, as compared with the conventional semiconductor device shown in FIG. 3, the sum h of the thicknesses of the respective films formed on the semiconductor substrate 1 in the peripheral portion of the chip is thereby reduced by the depth of the first concave portion 10 ( In the present embodiment, the substantially planarizing insulating film 3 is used.
Thickness).

A gap portion 11 is provided between the inner surface of the first concave portion 10 of the insulating film and the pad base portion of the aluminum wiring film 4, and is substantially equal to the width W of the pad base portion outside the first concave portion 10. The second recesses 12, 12,... For the dummy are spaced apart.
Since it is formed, the film thickness of the interlayer insulating film 5 covering the insulating film 3 and the aluminum wiring film 4 can be further reduced.

This is because it is preferable that the interlayer insulating film 5 is formed of SiO ₂ by the bias sputtering method or the bias ECR method in order to flatten the surface. There is a tendency that the thickness of the upper interlayer insulating film becomes thicker than that of the dense portion. Therefore, as in the prior art, the interlayer insulating film 5
If the underlayer is not sparse in the peripheral portion, the film thickness of the interlayer insulating film 5 in the peripheral portion tends to be slightly thicker than that in the central portion, and the film thickness in the peripheral portion of the interlayer insulating film 5 is reduced. It was difficult to do. In the present semiconductor device shown in FIG. 1, however, the second recesses 12 and 12 for dummy are provided in the insulating film 3, and a gap is provided between the first recess 10 and the pad base portion of the aluminum wiring film 4. Parts 11, 11
Is provided so that the underlayer of the interlayer insulating film 5 has irregularities in accordance with the same rule as the fine rule in the central portion of the semiconductor device. It can be made as thin as the film thickness. As described above, the thickness of the interlayer insulating film 5 at the peripheral portion of the semiconductor device can be reduced as compared with the related art. This also becomes a factor that makes it possible to reduce the total thickness of each film formed on the semiconductor substrate 1.

As described above, since the total thickness of the films on the semiconductor substrate 1 can be reduced, the stress applied to the aluminum wiring films 4 and 7 due to the strain, particularly at the portions existing around the semiconductor device, can be reduced. In addition, disconnection of the semiconductor device can be prevented. Further, it is also possible to prevent insulation failure due to cracking of the interlayer insulating film 5 interposed between the first and second aluminum wiring films 7 and 4 due to stress.

2 (A) to 2 (F) are cross-sectional views of a pad portion and its vicinity showing a method of manufacturing the semiconductor device shown in FIG. 1 in the order of steps.

(A) The state shown in FIG. 2 (A) in which the flattening insulating film (reflow film) 3 has been formed by the ordinary manufacturing process.

(B) Next, in an etching step for forming a contact hole in the insulating film 3, a first concave portion 10 is formed in a portion where a first aluminum wiring film is to be formed, and a dummy concave portion 10 is formed in the vicinity thereof. Two concave portions 12 are also formed. That is, in the related art, an etching process for forming a contact hole is performed on the insulating film 3 after the insulating film 3 is formed.
A portion where an aluminum wiring film is to be formed is later etched to form a first concave portion 10 or a second concave portion for a dummy.
No formation of 12, 12, ... was made. However, when manufacturing the semiconductor device of the present invention, it is performed. This can be realized only by changing the pattern of the photomask for etching, and does not require additional steps. FIG. 2B shows a state after the etching step for the planarizing insulating film is completed.

(C) Next, as shown in FIG. 3C, an aluminum wiring film 4 is formed by sputtering. The thickness of the aluminum wiring film 4 is preferably about the same as the thickness of the planarizing insulating film 3.

(D) Next, the aluminum wiring film 4 is patterned by etching as shown in FIG.

(E) Next, as shown in FIG. 7E, the interlayer insulating film 5 made of, for example, SiO _{2 is} formed by bias sputtering or bias.
It is formed by ECRCVD or Ar reverse sputtering. Then, the film thickness of the interlayer insulating film 5 can be made relatively thin even on the peripheral portion of the semiconductor device 5. This is because, as described above, fine irregularities are formed in the peripheral portion of the semiconductor device as in the central portion, and the interlayer insulating film 5 is formed using the fine irregularities as a base.

(F) Next, as shown in FIG. 2F, the contact hole 6 is formed by etching the interlayer insulating film 5.

Thereafter, when a second-layer aluminum wiring film is formed, a semiconductor device having a peripheral portion having a cross-sectional structure as shown in FIG. 1 is obtained.

(H. Effect of the Invention) As described above, the semiconductor device of the present invention includes a pad electrode formed of an upper layer wiring at a peripheral portion of the semiconductor substrate on the flattening insulating film on the field insulating film covering the surface of the semiconductor substrate. A first recess occupying each position to be formed is formed,
A lower layer wiring serving as a base of the electrode pad is formed at a substantially central portion of the first recess, and an interval substantially equal to the width of the lower layer wiring is provided on a portion of the planarization insulating film outside the first recess. At least one dummy second recess is formed, and an interlayer insulating film that covers the lower wiring and fills each recess and that insulates between the lower wiring and the wiring is formed on the planarization insulating film. It is characterized by the following.

Therefore, according to the semiconductor device of the present invention, the first recess is formed in the insulating film, and the wiring is formed in the first recess.
The sum of the thicknesses of the films formed on the semiconductor substrate is reduced by the depth of the first concave portion, so that the stress applied to the wiring can be reduced.

Then, a second dummy portion is formed outside the first concave portion of the insulating film.
When the interlayer insulating film on the wiring is formed by bias CVD, bias sputtering, or Ar reverse sputtering, dense unevenness is formed on the underlayer of the interlayer insulating film even on the peripheral portion, which is sparse in circuit. Can be formed. Therefore, the interlayer insulating film wiring can be made relatively thin and flat. Therefore, this point also causes a reduction in the sum of the film thicknesses of the films formed on the semiconductor substrate, and thus can reduce the stress applied to the wiring.

[Brief description of the drawings]

FIG. 1 is a sectional view of a peripheral portion showing one embodiment of the semiconductor device of the present invention, and FIGS. 2 (A) to 2 (F) are diagrams showing a method of manufacturing the semiconductor device shown in FIG. FIG. 3 is a sectional view of a peripheral portion of a semiconductor device showing a conventional example. Reference numerals 2, 3,..., Insulating film, 4,.
... First recess, 11 gap, 12 second recess.

Claims (1)

(57) [Scope of request for utility model registration] A first concave portion which occupies a peripheral portion of the semiconductor substrate and occupies a position where a pad electrode composed of an upper wiring is to be formed in a planarizing insulating film on a field insulating film covering a surface of the semiconductor substrate; A lower layer wiring serving as a base of the electrode pad is formed substantially at the center of the first recess, and a gap substantially equal to the width of the lower layer wiring is formed at a portion of the planarizing insulating film outside the first recess. At least one dummy second concave portion is formed, and the interlayer insulating film covers the lower wiring and fills each concave portion on the planarization insulating film, and insulates between the lower wiring and the upper wiring. Semiconductor device characterized by forming