JP2025506486A5 - - Google Patents

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Publication number
JP2025506486A5
JP2025506486A5 JP2024547490A JP2024547490A JP2025506486A5 JP 2025506486 A5 JP2025506486 A5 JP 2025506486A5 JP 2024547490 A JP2024547490 A JP 2024547490A JP 2024547490 A JP2024547490 A JP 2024547490A JP 2025506486 A5 JP2025506486 A5 JP 2025506486A5
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JP
Japan
Prior art keywords
silicon
insulator structure
ozone
bath
treated
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Granted
Application number
JP2024547490A
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English (en)
Japanese (ja)
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JP2025506486A (ja
JP7825725B2 (ja
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Priority claimed from US17/670,167 external-priority patent/US11798802B2/en
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Publication of JP2025506486A publication Critical patent/JP2025506486A/ja
Publication of JP2025506486A5 publication Critical patent/JP2025506486A5/ja
Application granted granted Critical
Publication of JP7825725B2 publication Critical patent/JP7825725B2/ja
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JP2024547490A 2022-02-11 2023-01-31 半導体構造体の剥離および洗浄方法 Active JP7825725B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US17/670,167 US11798802B2 (en) 2022-02-11 2022-02-11 Methods for stripping and cleaning semiconductor structures
US17/670,167 2022-02-11
PCT/US2023/061670 WO2023154644A1 (en) 2022-02-11 2023-01-31 Methods for stripping and cleaning semiconductor structures

Publications (3)

Publication Number Publication Date
JP2025506486A JP2025506486A (ja) 2025-03-11
JP2025506486A5 true JP2025506486A5 (https=) 2026-01-16
JP7825725B2 JP7825725B2 (ja) 2026-03-06

Family

ID=85410106

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2024547490A Active JP7825725B2 (ja) 2022-02-11 2023-01-31 半導体構造体の剥離および洗浄方法

Country Status (7)

Country Link
US (1) US11798802B2 (https=)
EP (1) EP4476761B1 (https=)
JP (1) JP7825725B2 (https=)
KR (1) KR20240151781A (https=)
CN (1) CN118843923B (https=)
TW (1) TW202349491A (https=)
WO (1) WO2023154644A1 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2026015619A1 (en) * 2024-07-10 2026-01-15 Globalwafers Co., Ltd. Methods of processing semiconductor-on-insulator structures using clean-and-etch operation
US20260018407A1 (en) 2024-07-11 2026-01-15 Globalwafers Co., Ltd. Methods for tunable dielectric thickness of a semiconductor substrate using back surface heating
WO2026015773A1 (en) 2024-07-11 2026-01-15 Globalwafers Co., Ltd. Methods for semiconductor substrate processing by densifying a dielectric layer

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020157686A1 (en) 1997-05-09 2002-10-31 Semitool, Inc. Process and apparatus for treating a workpiece such as a semiconductor wafer
US7456113B2 (en) * 2000-06-26 2008-11-25 Applied Materials, Inc. Cleaning method and solution for cleaning a wafer in a single wafer process
US6927176B2 (en) * 2000-06-26 2005-08-09 Applied Materials, Inc. Cleaning method and solution for cleaning a wafer in a single wafer process
JP2002329691A (ja) 2001-04-27 2002-11-15 Shin Etsu Handotai Co Ltd シリコンウェーハの洗浄方法
JP2005217312A (ja) 2004-01-30 2005-08-11 Sumitomo Mitsubishi Silicon Corp Simoxウェーハの製造方法及びその方法で製造されたsimoxウェーハ
US7479460B2 (en) * 2005-08-23 2009-01-20 Asm America, Inc. Silicon surface preparation
JP5365057B2 (ja) 2008-04-11 2013-12-11 株式会社Sumco 貼り合わせウェーハの製造方法
FR2944645B1 (fr) * 2009-04-21 2011-09-16 Soitec Silicon On Insulator Procede d'amincissement d'un substrat silicium sur isolant
US8796116B2 (en) * 2011-01-31 2014-08-05 Sunedison Semiconductor Limited Methods for reducing the metal content in the device layer of SOI structures and SOI structures produced by such methods
US20150357180A1 (en) 2014-06-10 2015-12-10 Sunedison Semiconductor Limited (Uen201334164H) Methods for cleaning semiconductor substrates
FR3085603B1 (fr) 2018-09-11 2020-08-14 Soitec Silicon On Insulator Procede pour le traitement d'un susbtrat soi dans un equipement de nettoyage monoplaque
US11282739B2 (en) 2019-12-13 2022-03-22 Globalwafers Co., Ltd. Methods for removing an oxide film from a SOI structure and methods for preparing a SOI structure

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