JP2022536792A - パワーエレクトロニクス用のパッケージ - Google Patents
パワーエレクトロニクス用のパッケージ Download PDFInfo
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- JP2022536792A JP2022536792A JP2021574783A JP2021574783A JP2022536792A JP 2022536792 A JP2022536792 A JP 2022536792A JP 2021574783 A JP2021574783 A JP 2021574783A JP 2021574783 A JP2021574783 A JP 2021574783A JP 2022536792 A JP2022536792 A JP 2022536792A
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- 239000004065 semiconductor Substances 0.000 claims abstract description 171
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 230000005669 field effect Effects 0.000 claims description 3
- 229910044991 metal oxide Inorganic materials 0.000 claims description 3
- 150000004706 metal oxides Chemical class 0.000 claims description 3
- 230000008878 coupling Effects 0.000 description 8
- 238000010168 coupling process Methods 0.000 description 8
- 238000005859 coupling reaction Methods 0.000 description 8
- 239000002184 metal Substances 0.000 description 8
- 238000009499 grossing Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 230000009024 positive feedback mechanism Effects 0.000 description 1
- 230000007480 spreading Effects 0.000 description 1
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Abstract
Description
[0008]本明細書に組み込まれ、その一部を形成する添付の図面は、本開示のいくつかの態様を示しており、説明とともに、本開示の原理を説明するのに役立つ。
Claims (23)
- パワーエレクトロニクス用のパッケージであって、
パワー基板と、
前記パワー基板上の少なくとも2つのパワー半導体ダイであって、前記少なくとも2つのパワー半導体ダイのおのおのは、
第1のパワースイッチングパッドおよび第2のパワースイッチングパッドと、
制御パッドと、
前記第1のパワースイッチングパッド、前記第2のパワースイッチングパッド、および前記制御パッドの間の半導体構造であって、前記第1のパワースイッチングパッドと前記第2のパワースイッチングパッドとの間のパワースイッチング経路の抵抗が、前記制御パッドにおいて提供される制御信号に基づくように構成された、半導体構造と、
前記パワー半導体ダイ上の前記第2のパワースイッチングパッドに結合されるケルビン接続パッドとを備える、少なくとも2つのパワー半導体ダイと、
前記パワー基板上のケルビン導電性トレースを介して、前記少なくとも2つのパワー半導体ダイのおのおのの前記ケルビン接続パッドに結合される、ケルビン接続接点とを備える、パッケージ。 - 前記少なくとも2つのパワー半導体ダイのおのおのの前記ケルビン接続パッドは、1つまたは複数のワイヤボンドを介して前記ケルビン導電性トレースに結合され、
前記ケルビン導電性トレースは、1つまたは複数のワイヤボンドを介して前記ケルビン接続接点に結合される、請求項1に記載のパッケージ。 - 前記少なくとも2つのパワー半導体ダイのおのおのは、パワー金属酸化膜半導体電界効果トランジスタ(MOSFET)半導体ダイであり、
前記第1のパワースイッチングパッドは、前記半導体構造のドレイン領域に結合され、
前記第2のパワースイッチングパッドおよび前記ケルビン接続パッドは、前記半導体構造のソース領域に結合され、
前記制御パッドは、前記半導体構造のゲート領域に結合される、請求項1に記載のパッケージ。 - 前記少なくとも2つのパワー半導体ダイのおのおのは、パワー絶縁ゲートバイポーラトランジスタ(IGBT)半導体ダイであり、
前記第1のパワースイッチングパッドは、前記半導体構造のコレクタ領域に結合され、
前記第2のパワースイッチングパッドおよび前記ケルビン接続パッドは、前記半導体構造のエミッタ領域に結合され、
前記制御パッドは、前記半導体構造のゲート領域に結合される、請求項1に記載のパッケージ。 - 前記パワー基板は、長方形であり、
前記ケルビン導電性トレースは、前記パワー基板のエッジに平行ではない少なくとも1つのエッジを含む、請求項1に記載のパッケージ。 - 前記少なくとも2つのパワー半導体ダイのおのおのは、前記パワー基板上のパワースイッチング導電性トレース上に提供され、
前記パワースイッチング導電性トレースは、前記パワー基板のエッジに平行ではない少なくとも1つのエッジを含み、
前記パワースイッチング導電性トレースの前記少なくとも1つのエッジは、前記ケルビン導電性トレースの前記少なくとも1つのエッジと平行である、請求項5に記載のパッケージ。 - 前記少なくとも2つのパワー半導体ダイのおのおのの前記第2のパワースイッチングパッドは、ともに結合される、請求項1に記載のパッケージ。
- 前記少なくとも2つのパワー半導体ダイのおのおのの前記第2のパワースイッチングパッドは、1つまたは複数のワイヤボンドを介して結合される、請求項7に記載のパッケージ。
- 前記少なくとも2つのパワー半導体ダイのおのおのの前記第2のパワースイッチングパッドは、リードフレーム接点構造を介して結合される、請求項7に記載のパッケージ。
- 前記少なくとも2つのパワー半導体ダイのおのおのの前記第1のパワースイッチングパッドに結合された第1のパワースイッチング接点と、
前記少なくとも2つのパワー半導体ダイのおのおのの前記第2のパワースイッチングパッドに結合された第2のパワースイッチング接点と、
前記少なくとも2つのパワー半導体ダイのおのおのの前記制御パッドに結合された制御接点とをさらに備える、請求項1に記載のパッケージ。 - 前記第1のパワースイッチング接点、前記第2のパワースイッチング接点、前記制御接点、および前記ケルビン接続接点は、前記パッケージの同じ側に配置される、請求項10に記載のパッケージ。
- 前記パッケージは、リードフレームパッケージである、請求項11に記載のパッケージ。
- 前記第1のパワースイッチング接点、前記第2のパワースイッチング接点、前記制御接点、および前記ケルビン接続接点のうちの少なくとも1つは、前記パッケージの異なる側に配置される、請求項10に記載のパッケージ。
- 前記パワー基板上のパワースイッチング導電性トレースと、
前記パワー基板上の制御トレースとをさらに備え、
前記少なくとも2つのパワー半導体ダイのおのおのの前記第1のパワースイッチングパッドが、前記パワースイッチング導電性トレースに直接結合されるように、前記少なくとも2つのパワー半導体ダイは、前記パワースイッチング導電性トレース上に提供され、
前記パワースイッチング導電性トレースは、1つまたは複数のワイヤボンドを介して前記第1のパワースイッチング接点に結合され、
前記少なくとも2つのパワー半導体ダイのおのおのの前記制御パッドは、1つまたは複数のワイヤボンドを介して前記制御トレースに結合され、
前記制御トレースは、1つまたは複数のワイヤボンドを介して前記制御接点に結合され、
前記少なくとも2つのパワー半導体ダイのおのおのの前記ケルビン接続パッドは、1つまたは複数のワイヤボンドを介して前記ケルビン導電性トレースに結合され、
前記ケルビン導電性トレースは、1つまたは複数のワイヤボンドを介して前記ケルビン接続接点に結合され、
前記第2のパワースイッチング接点は、1つまたは複数のワイヤボンドを介して、前記少なくとも2つのパワー半導体ダイのおのおのの前記第2のパワースイッチングパッドに結合される、請求項10に記載のパッケージ。 - 前記パワー基板上のパワースイッチング導電性トレースと、
前記パワー基板上の制御トレースとをさらに備え、
前記少なくとも2つのパワー半導体ダイのおのおのの前記第1のパワースイッチングパッドが、前記パワースイッチング導電性トレースに直接結合されるように、前記少なくとも2つのパワー半導体ダイは、前記パワースイッチング導電性トレース上に提供され、
前記第1のパワースイッチング接点は、前記パワースイッチング導電性トレースに直接取り付けられ、
前記少なくとも2つのパワー半導体ダイのおのおのの前記制御パッドは、1つまたは複数のワイヤボンドを介して前記制御トレースに結合され、
前記制御トレースは、1つまたは複数のワイヤボンドを介して前記制御接点に結合され、
前記少なくとも2つのパワー半導体ダイのおのおのの前記ケルビン接続パッドは、1つまたは複数のワイヤボンドを介して前記ケルビン導電性トレースに結合され、
前記ケルビン導電性トレースは、1つまたは複数のワイヤボンドを介して前記ケルビン接続接点に結合され、
前記第2のパワースイッチング接点は、前記少なくとも2つのパワー半導体ダイのおのおのの前記第2のパワースイッチングパッドに直接取り付けられる、請求項10に記載のパッケージ。 - 前記パワー基板上の制御導電性トレースを介して、前記少なくとも2つのパワー半導体ダイのおのおのの前記制御パッドに結合された制御接点をさらに備える、請求項1に記載のパッケージ。
- 前記少なくとも2つのパワー半導体ダイのおのおのの前記ケルビン接続パッドは、1つまたは複数のワイヤボンドを介して前記ケルビン導電性トレースに結合され、
前記ケルビン導電性トレースは、1つまたは複数のワイヤボンドを介して前記ケルビン接続接点に結合され、
前記少なくとも2つのパワー半導体ダイのおのおのの前記制御パッドは、1つまたは複数のワイヤボンドを介して前記制御導電性トレースに結合され、
前記制御導電性トレースは、1つまたは複数のワイヤボンドを介して前記制御接点に結合される、請求項16に記載のパッケージ。 - 前記少なくとも2つのパワー半導体ダイは、少なくとも4つのパワー半導体ダイを含む、請求項1に記載のパッケージ。
- パワーエレクトロニクス用のパッケージであって、
パワー基板と、
前記パワー基板上の少なくとも2つのパワー半導体ダイであって、前記少なくとも2つのパワー半導体ダイのおのおのは、
第1のパワースイッチングパッドおよび第2のパワースイッチングパッドと、
制御パッドと、
前記第1のパワースイッチングパッド、前記第2のパワースイッチングパッド、および前記制御パッドの間の半導体構造であって、前記第1のパワースイッチングパッドと前記第2のパワースイッチングパッドとの間のパワースイッチング経路の抵抗が、前記制御パッドにおいて提供される制御信号に基づくように構成された、半導体構造とを備える、少なくとも2つのパワー半導体ダイと、
前記少なくとも2つのパワー半導体ダイのおのおのの前記第2のパワースイッチングパッド間に結合された1つまたは複数のパワースイッチング平準化ワイヤボンドとを備える、パッケージ。 - 前記少なくとも2つのパワー半導体ダイのおのおのは、パワー金属酸化膜半導体電界効果トランジスタ(MOSFET)半導体ダイであり、
前記第1のパワースイッチングパッドは、前記半導体構造のドレイン領域に結合され、
前記第2のパワースイッチングパッドは、前記半導体構造のソース領域に結合され、
前記制御パッドは、前記半導体構造のゲート領域に結合される、請求項19に記載のパッケージ。 - 前記少なくとも2つのパワー半導体ダイのおのおのは、パワー絶縁ゲートバイポーラトランジスタ(IGBT)半導体ダイであり、
前記第1のパワースイッチングパッドは、前記半導体構造のコレクタ領域に結合され、
前記第2のパワースイッチングパッドは、前記半導体構造のエミッタ領域に結合され、
前記制御パッドは、前記半導体構造のゲート領域に結合される、請求項19に記載のパッケージ。 - パワーエレクトロニクス用のパッケージであって、
パワー基板と、
前記パワー基板上の少なくとも2つのパワー半導体ダイであって、前記少なくとも2つのパワー半導体ダイのおのおのは、
第1のパワースイッチングパッドおよび第2のパワースイッチングパッドと、
制御パッドと、
前記第1のパワースイッチングパッド、前記第2のパワースイッチングパッド、および前記制御パッドの間の半導体構造であって、前記第1のパワースイッチングパッドと前記第2のパワースイッチングパッドとの間のパワースイッチング経路の抵抗が、前記制御パッドにおいて提供される制御信号に基づくように構成された、半導体構造とを備える、少なくとも2つのパワー半導体ダイと、
前記少なくとも2つのパワー半導体ダイのおのおのの前記第1のパワースイッチングパッドに結合された第1のパワースイッチング接点と、
前記少なくとも2つのパワー半導体ダイのおのおのの前記第2のパワースイッチングパッドに結合された第2のパワースイッチング接点と、
前記第2のパワースイッチングパッドとは別に前記少なくとも2つのパワー半導体ダイのおのおのの前記第2のパワースイッチングパッドに結合されたケルビン接続接点とを備える、パッケージ。 - 前記第2のパワースイッチング接点は、第1の相互接続によって前記少なくとも2つのパワー半導体ダイのおのおのの前記第2のパワースイッチングパッドに結合され、前記ケルビン接続接点は、前記第1の相互接続から離れた第2の相互接続によって前記第2のパワースイッチングパッドに結合される、請求項22に記載のパッケージ。
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US20200395322A1 (en) | 2020-12-17 |
JP2023134790A (ja) | 2023-09-27 |
EP3984063A1 (en) | 2022-04-20 |
US20220115346A1 (en) | 2022-04-14 |
WO2020251842A1 (en) | 2020-12-17 |
CN114342071A (zh) | 2022-04-12 |
US20210313289A1 (en) | 2021-10-07 |
US20240105651A1 (en) | 2024-03-28 |
US11887953B2 (en) | 2024-01-30 |
US11756910B2 (en) | 2023-09-12 |
US11069640B2 (en) | 2021-07-20 |
JP7320083B2 (ja) | 2023-08-02 |
KR20220047563A (ko) | 2022-04-18 |
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