JP2022536515A5 - - Google Patents

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Publication number
JP2022536515A5
JP2022536515A5 JP2021573729A JP2021573729A JP2022536515A5 JP 2022536515 A5 JP2022536515 A5 JP 2022536515A5 JP 2021573729 A JP2021573729 A JP 2021573729A JP 2021573729 A JP2021573729 A JP 2021573729A JP 2022536515 A5 JP2022536515 A5 JP 2022536515A5
Authority
JP
Japan
Prior art keywords
die
metal pad
package
layer
protective overcoat
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2021573729A
Other languages
English (en)
Japanese (ja)
Other versions
JP2022536515A (ja
JP7618594B2 (ja
Filing date
Publication date
Priority claimed from US16/897,996 external-priority patent/US11616048B2/en
Application filed filed Critical
Publication of JP2022536515A publication Critical patent/JP2022536515A/ja
Publication of JP2022536515A5 publication Critical patent/JP2022536515A5/ja
Priority to JP2025002826A priority Critical patent/JP7741340B2/ja
Application granted granted Critical
Publication of JP7618594B2 publication Critical patent/JP7618594B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2021573729A 2019-06-12 2020-06-12 複数ダイを備えるicパッケージ Active JP7618594B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2025002826A JP7741340B2 (ja) 2019-06-12 2025-01-08 複数ダイを備えるicパッケージ

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201962860593P 2019-06-12 2019-06-12
US62/860,593 2019-06-12
US16/897,996 US11616048B2 (en) 2019-06-12 2020-06-10 IC package with multiple dies
US16/897,996 2020-06-10
PCT/US2020/037482 WO2020252299A1 (en) 2019-06-12 2020-06-12 Ic package with multiple dies

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2025002826A Division JP7741340B2 (ja) 2019-06-12 2025-01-08 複数ダイを備えるicパッケージ

Publications (3)

Publication Number Publication Date
JP2022536515A JP2022536515A (ja) 2022-08-17
JP2022536515A5 true JP2022536515A5 (https=) 2023-06-16
JP7618594B2 JP7618594B2 (ja) 2025-01-21

Family

ID=73782257

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2021573729A Active JP7618594B2 (ja) 2019-06-12 2020-06-12 複数ダイを備えるicパッケージ
JP2025002826A Active JP7741340B2 (ja) 2019-06-12 2025-01-08 複数ダイを備えるicパッケージ

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2025002826A Active JP7741340B2 (ja) 2019-06-12 2025-01-08 複数ダイを備えるicパッケージ

Country Status (4)

Country Link
US (2) US11616048B2 (https=)
JP (2) JP7618594B2 (https=)
CN (2) CN117059500A (https=)
WO (1) WO2020252299A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12278206B2 (en) * 2022-01-27 2025-04-15 Airoha Technology (HK) Limited Semiconductor package with conductive adhesive that overflows for return path reduction and associated method
WO2025240564A1 (en) * 2024-05-17 2025-11-20 Micron Technology, Inc. Self-aligned patterning on package substrate

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0583011A (ja) * 1991-09-25 1993-04-02 Sumitomo Electric Ind Ltd 半導体装置用パツケージの入出力結合デバイス
US6728113B1 (en) * 1993-06-24 2004-04-27 Polychip, Inc. Method and apparatus for non-conductively interconnecting integrated circuits
US7288940B2 (en) 2004-12-06 2007-10-30 Analog Devices, Inc. Galvanically isolated signal conditioning system
JP2006253330A (ja) 2005-03-09 2006-09-21 Sharp Corp 半導体装置およびその製造方法
US7535105B2 (en) * 2005-08-02 2009-05-19 International Business Machines Corporation Inter-chip ESD protection structure for high speed and high frequency devices
US20080157316A1 (en) 2007-01-03 2008-07-03 Advanced Chip Engineering Technology Inc. Multi-chips package and method of forming the same
CN102460686B (zh) 2009-06-30 2016-01-06 日本电气株式会社 半导体器件、用于半导体器件的安装基板以及制造安装基板的方法
KR101532816B1 (ko) * 2011-11-14 2015-06-30 유나이티드 테스트 엔드 어셈블리 센터 엘티디 반도체 패키지 및 반도체 소자 패키징 방법
US9318274B2 (en) 2012-07-13 2016-04-19 Empire Technology Development Llc Fabrication of nano-structure electrodes for ultra-capacitor
US8890223B1 (en) 2013-08-06 2014-11-18 Texas Instruments Incorporated High voltage hybrid polymeric-ceramic dielectric capacitor
JP6271221B2 (ja) * 2013-11-08 2018-01-31 ルネサスエレクトロニクス株式会社 半導体装置
US9685425B2 (en) 2014-01-28 2017-06-20 Apple Inc. Integrated circuit package
US20180175741A1 (en) 2015-06-16 2018-06-21 Npc Tech Aps A galvanically isolated resonant power converter assembly
US20170025388A1 (en) * 2015-07-22 2017-01-26 Microchip Technology Incorporated Backside Stacked Die In An Integrated Circuit (IC) Package
JP6524986B2 (ja) * 2016-09-16 2019-06-05 株式会社村田製作所 高周波モジュール、アンテナ付き基板、及び高周波回路基板
US10523175B2 (en) 2017-03-23 2019-12-31 Texas Instruments Incorporated Low loss galvanic isolation circuitry
CN109524364B (zh) 2017-09-19 2023-09-26 恩智浦美国有限公司 具有堆叠管芯的封装式集成电路和其方法
US10444432B2 (en) 2017-10-31 2019-10-15 Texas Instruments Incorporated Galvanic signal path isolation in an encapsulated package using a photonic structure
US10790757B2 (en) 2017-12-08 2020-09-29 Texas Instruments Incorporated Galvanic isolation devices to provide power and data between subsystems
EP3598409B1 (en) * 2018-07-16 2021-03-10 Melexis Technologies NV Transceiver with galvanic isolation means

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