JP2022533104A - ハイブリッド接合構造およびハイブリッド接合方法 - Google Patents
ハイブリッド接合構造およびハイブリッド接合方法 Download PDFInfo
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- JP2022533104A JP2022533104A JP2021568089A JP2021568089A JP2022533104A JP 2022533104 A JP2022533104 A JP 2022533104A JP 2021568089 A JP2021568089 A JP 2021568089A JP 2021568089 A JP2021568089 A JP 2021568089A JP 2022533104 A JP2022533104 A JP 2022533104A
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- 238000000034 method Methods 0.000 title claims abstract description 88
- 229910052751 metal Inorganic materials 0.000 claims abstract description 597
- 239000002184 metal Substances 0.000 claims abstract description 597
- 229910052710 silicon Inorganic materials 0.000 claims description 40
- 239000010703 silicon Substances 0.000 claims description 40
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 37
- 230000008569 process Effects 0.000 claims description 37
- 229920000620 organic polymer Polymers 0.000 claims description 30
- 238000005304 joining Methods 0.000 claims description 24
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 20
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 20
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 18
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 18
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 18
- 239000010949 copper Substances 0.000 claims description 16
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 16
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 16
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 15
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 14
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 14
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 14
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 13
- 229910052802 copper Inorganic materials 0.000 claims description 13
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 10
- 229910052782 aluminium Inorganic materials 0.000 claims description 10
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 10
- 229910052718 tin Inorganic materials 0.000 claims description 10
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 9
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 9
- 239000002041 carbon nanotube Substances 0.000 claims description 9
- 229910021393 carbon nanotube Inorganic materials 0.000 claims description 9
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 9
- 229910052737 gold Inorganic materials 0.000 claims description 9
- 239000010931 gold Substances 0.000 claims description 9
- 229910021389 graphene Inorganic materials 0.000 claims description 9
- 229910052759 nickel Inorganic materials 0.000 claims description 9
- 229910052709 silver Inorganic materials 0.000 claims description 9
- 239000004332 silver Substances 0.000 claims description 9
- 239000011135 tin Substances 0.000 claims description 9
- 239000010936 titanium Substances 0.000 claims description 9
- 229910052719 titanium Inorganic materials 0.000 claims description 9
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 9
- 229910052721 tungsten Inorganic materials 0.000 claims description 9
- 239000010937 tungsten Substances 0.000 claims description 9
- MWOZJZDNRDLJMG-UHFFFAOYSA-N [Si].O=C=O Chemical compound [Si].O=C=O MWOZJZDNRDLJMG-UHFFFAOYSA-N 0.000 claims description 4
- HMDDXIMCDZRSNE-UHFFFAOYSA-N [C].[Si] Chemical compound [C].[Si] HMDDXIMCDZRSNE-UHFFFAOYSA-N 0.000 claims 3
- ZZUFCTLCJUWOSV-UHFFFAOYSA-N furosemide Chemical compound C1=C(Cl)C(S(=O)(=O)N)=CC(C(O)=O)=C1NCC1=CC=CO1 ZZUFCTLCJUWOSV-UHFFFAOYSA-N 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 abstract description 13
- 230000007774 longterm Effects 0.000 abstract description 4
- 239000010410 layer Substances 0.000 description 69
- 235000012431 wafers Nutrition 0.000 description 53
- 230000000149 penetrating effect Effects 0.000 description 17
- 150000002739 metals Chemical class 0.000 description 16
- 239000003989 dielectric material Substances 0.000 description 11
- 239000011521 glass Substances 0.000 description 11
- 238000005516 engineering process Methods 0.000 description 10
- 238000000465 moulding Methods 0.000 description 9
- 238000012545 processing Methods 0.000 description 8
- 238000009413 insulation Methods 0.000 description 7
- 239000000463 material Substances 0.000 description 7
- 239000004698 Polyethylene Substances 0.000 description 6
- -1 polyethylene Polymers 0.000 description 6
- 229920000573 polyethylene Polymers 0.000 description 6
- 229920000915 polyvinyl chloride Polymers 0.000 description 6
- 239000004800 polyvinyl chloride Substances 0.000 description 6
- 229920003051 synthetic elastomer Polymers 0.000 description 6
- 229920002994 synthetic fiber Polymers 0.000 description 6
- 239000012209 synthetic fiber Substances 0.000 description 6
- 239000005061 synthetic rubber Substances 0.000 description 6
- 230000007547 defect Effects 0.000 description 5
- 229920000642 polymer Polymers 0.000 description 5
- 239000002356 single layer Substances 0.000 description 5
- 238000013517 stratification Methods 0.000 description 5
- 239000000956 alloy Substances 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 4
- 230000009977 dual effect Effects 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- 230000006835 compression Effects 0.000 description 3
- 238000007906 compression Methods 0.000 description 3
- 238000005520 cutting process Methods 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 230000017525 heat dissipation Effects 0.000 description 3
- 230000010354 integration Effects 0.000 description 3
- 238000005498 polishing Methods 0.000 description 3
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 238000003754 machining Methods 0.000 description 2
- 229920003023 plastic Polymers 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000004381 surface treatment Methods 0.000 description 2
- 230000003685 thermal hair damage Effects 0.000 description 2
- 239000002699 waste material Substances 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 230000004913 activation Effects 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000004590 computer program Methods 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000010884 ion-beam technique Methods 0.000 description 1
- 238000012804 iterative process Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
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- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H01L23/00—Details of semiconductor or other solid state devices
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L24/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
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- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
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- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
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- H—ELECTRICITY
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- H01L2224/0554—External layer
- H01L2224/0556—Disposition
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- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
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- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05601—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/05611—Tin [Sn] as principal constituent
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- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05624—Aluminium [Al] as principal constituent
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- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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Abstract
Description
図4Aを参照する。図4Aは、本出願の実施形態による接合される構造の概略的な上面図である。図4Aに示されるように、接合される構造は、第1のチップ10および第2のチップ20を含む。第1のチップ10の表面上には第1の絶縁誘電体11および第1の金属12があり、第1の絶縁誘電体11と第1の金属12との間に第1の間隙領域13がある。第2のチップ20の表面上には第2の絶縁誘電体21および第2の金属22があり、第2の絶縁誘電体21は第2の金属22と緊密に組み合わされる。図4Bを参照する。図4Bは、接合される構造の断面の概略図である。図4Bに示されるように、第1の金属12の一端は、第1のチップ10の内部回路につなげられ、第1の金属12の他端は、金属接合(bonding)を行うために第2の金属22と接触するように構成される。第1の金属12は、第1の絶縁誘電体11を貫通し、第1の金属12の表面は、第1の絶縁誘電体11の表面よりも高い。第1の絶縁誘電体11と第1の金属12との間には第1の間隙領域13があり、第1の間隙領域13は第1の絶縁誘電体11を第1の金属12から完全に隔離する。第2の金属22の一端は、第2のチップ20の内部回路につなげられ、第2の金属22の他端は金属接合を行うために第1の金属12と接触するように構成される。第2の金属22は、第2の絶縁誘電体21を貫通し、第2の金属22の表面は、第2の絶縁誘電体21の表面よりも高くない。
この実施形態および実施形態1は、同じ発明概念に基づく。違いは、実施形態1においては、第1の間隙領域13が第1の絶縁誘電体11を完全に貫通するが、この実施形態においては、第1の間隙領域13が第1の絶縁誘電体を完全に貫通しない、言い換えると、第1の絶縁誘電体11が第1の金属12と完全に隔離されないことにある。
この実施形態は、実施形態1および実施形態2と同じ発明概念に基づく。違いは、実施形態1および実施形態2においては、第1の金属12の表面が第1の絶縁誘電体11の表面よりも高く、第2の金属22の表面が第2の絶縁誘電体21の表面よりも高くないが、この実施形態においては、第1の金属12の表面が第1の絶縁誘電体11の表面よりも高くなく、第2の金属22の表面が第2の絶縁誘電体21の表面よりも高いことにある。
この実施形態は、実施形態1から実施形態3と同じ発明概念に基づく。違いは、実施形態1および実施形態2においては、第1の金属12の表面が第1の絶縁誘電体11の表面よりも高く、第2の金属22の表面が第2の絶縁誘電体21の表面よりも高くないが、この実施形態においては、第1の金属12の表面が第1の絶縁誘電体11の表面より高く、第2の金属22の表面が第2の絶縁誘電体21の表面よりも高いことにある。
この実施形態は、すべての上述の実施形態と同じ発明概念に基づく。違いは、実施形態2においては、第1の金属12の断面が長方形であるが、この実施形態においては、第1の金属12がデュアルダマシンプロセスを使用することによる処理によって取得されるので、第1の金属12の断面がT字形であることにある。
この実施形態は、すべての上述の実施形態と同じ発明概念に基づく。違いは、実施形態1においては、第1の間隙領域13がいかなる物質によっても満たされないが、この実施形態においては、第1の間隙領域13が有機ポリマーによって満たされることにある。
この実施形態は、すべての上述の実施形態と同じ発明概念に基づく。違いは、実施形態1においては、第2の絶縁誘電体21が第2の金属22と緊密に組み合わされるが、この実施形態においては、第2の絶縁誘電体21と第2の金属22との間に第2の間隙領域23があることにある。
この実施形態は、すべての上述の実施形態と同じ発明概念に基づく。違いは、実施形態1においては、第1のチップ10の表面が単層絶縁誘電体(たとえば、第1の絶縁誘電体11)のみを含み、第2のチップ20の表面が単層絶縁誘電体(たとえば、第2の絶縁誘電体21)のみを含むが、この実施形態においては、第1のチップ10の表面上に絶縁誘電体の複数の層(たとえば、第1の絶縁誘電体11および第3の絶縁誘電体14)があり、第2のチップ20の表面上に絶縁誘電体の複数の層(たとえば、第2の絶縁誘電体21および第4の絶縁誘電体24)があることにある。加えて、第3の絶縁誘電体14と第1の金属12との間に第1の間隙領域13がさらにあり、第1の間隙領域13は、第1の絶縁誘電体11と第3の絶縁誘電体14との両方を貫通する。
この実施形態は、すべての上述の実施形態と同じ発明概念に基づく。違いは、実施形態8においては、第1の間隙領域13が絶縁誘電体の複数の層を貫通し、たとえば、第1の間隙領域13が第1の絶縁誘電体11と第3の絶縁誘電体14との両方を貫通するが、この実施形態においては、第1の間隙領域13が第1のチップ10の表面上の絶縁誘電体の複数の層内の絶縁誘電体の1つの層のみを貫通し、たとえば、第1の間隙領域13が第1のチップ10の表面上の第3の絶縁誘電体14のみを貫通することにある。
この実施形態は、すべての上述の実施形態と同じ発明概念に基づく。違いは、実施形態8においては、第1の間隙領域13がいかなる物質によっても満たされないが、この実施形態においては、第1の間隙領域13が有機ポリマーによって満たされることにある。
この実施形態は、すべての上述の実施形態と同じ発明概念に基づく。違いは、実施形態9においては、第1の金属12の断面が長方形であるが、この実施形態においては、第1の金属12がデュアルダマシンプロセスを使用することによる処理によって取得されるので、第1の金属12の断面がT字形であることにある。
この実施形態は、すべての上述の実施形態と同じ発明概念に基づく。違いは、実施形態1においては、第1の金属12の断面が長方形であるが、この実施形態においては、第1の金属12の断面が逆の台形であることにある。
11 第1の絶縁誘電体
12 第1の金属
13 第1の間隙領域
14 第3の絶縁誘電体
20 第2のチップ
21 第2の絶縁誘電体
22 第2の金属
23 第2の間隙領域
24 第4の絶縁誘電体
100 上ウェハ
110 誘電体層
120 金属
200 下ウェハ
210 誘電体層
220 金属
Claims (24)
- 第1のチップおよび第2のチップを備えるハイブリッド接合構造であって、
前記第1のチップの表面は、第1の誘電体層および第1の金属層を含み、前記第1の誘電体層は、第1の絶縁誘電体を含み、前記第1の金属層は、第1の金属を含み、前記第1の金属の縁と前記第1の絶縁誘電体との間に第1の間隙領域があり、
前記第2のチップの表面は、第2の誘電体層および第2の金属層を含み、前記第2の誘電体層は、第2の絶縁誘電体を含み、前記第2の金属層は、第2の金属を含み、
前記第1の金属の表面は、前記第1の絶縁誘電体の表面よりも高く、
金属接合は、前記第1の金属が前記第2の金属と接触した後に形成され、前記第1の金属は、前記第1の間隙領域内で縦方向および横方向に変形され、
絶縁誘電体接合は、前記第1の絶縁誘電体が前記第2の絶縁誘電体と接触した後に形成される、ハイブリッド接合構造。 - 前記第2の金属の表面は、前記第2の絶縁誘電体の表面よりも高い、請求項1に記載のハイブリッド接合構造。
- 前記第1の金属の前記表面および/または前記第2の金属の前記表面に円盤状の凹みがある、請求項1または2に記載のハイブリッド接合構造。
- 前記第1の金属の前記表面と前記第1の絶縁誘電体の前記表面との間の高さの差は、前記第1の金属の前記表面の前記円盤状の凹みの深さおよび前記第2の金属の前記表面の前記円盤状の凹みの深さの合計よりも大きい請求項3に記載のハイブリッド接合構造。
- 前記高さの差は、前記金属接合が接合プロセスにおいて前記絶縁誘電体接合の前に形成されることを確実にするために使用される、請求項4に記載のハイブリッド接合構造。
- 前記第2の金属の縁と前記第2の絶縁誘電体との間に第2の間隙領域がある、請求項1または2に記載のハイブリッド接合構造。
- 前記第1の間隙領域および/または前記第2の間隙領域の幅の範囲は、10ナノメートルから1000ナノメートルまでの間である、請求項6に記載のハイブリッド接合構造。
- 前記第1の誘電体層は、第3の絶縁誘電体をさらに含み、前記第1の金属の前記縁と前記第3の絶縁誘電体との間に前記第1の間隙領域がある、請求項1または2に記載のハイブリッド接合構造。
- 前記第1の間隙領域は、有機ポリマーによって満たされる、請求項1または2に記載のハイブリッド接合構造。
- 前記第1の絶縁誘電体は、酸化ケイ素、窒化ケイ素、酸窒化ケイ素、炭窒化ケイ素、酸化アルミニウム、アモルファスシリコン、炭化ケイ素、または窒化アルミニウムのうちの1つであり、前記第2の絶縁誘電体は、酸化ケイ素、窒化ケイ素、酸窒化ケイ素、炭窒化ケイ素、酸化アルミニウム、アモルファスシリコン、炭化ケイ素、または窒化アルミニウムのうちの1つであり、前記第1の金属は、銅、金、銀、アルミニウム、ニッケル、タングステン、チタン、錫、導電性グラフェン、またはカーボンナノチューブのうちの1つであり、前記第2の金属は、銅、金、銀、アルミニウム、ニッケル、タングステン、チタン、錫、導電性グラフェン、またはカーボンナノチューブのうちの1つであり、前記第3の絶縁誘電体は、窒化ケイ素、炭窒化ケイ素、酸化アルミニウム、アモルファスシリコン、炭化ケイ素、または窒化アルミニウムのうちの1つである、請求項8に記載のハイブリッド接合構造。
- 前記第1の絶縁誘電体は、前記第2の絶縁誘電体と同じであり、前記第1の金属は、前記第2の金属と同じである、請求項10に記載のハイブリッド接合構造。
- 前記第1の金属および/または前記第2の金属の断面は、長方形、正方形、通常の台形、逆の台形、円錐形、またはT字形である、請求項1または2に記載のハイブリッド接合構造。
- 第1のチップを提供するステップであって、前記第1のチップの表面は、第1の誘電体層および第1の金属層を含み、前記第1の誘電体層は、第1の絶縁誘電体を含み、前記第1の金属層は、第1の金属を含み、前記第1の金属の縁と前記第1の絶縁誘電体との間に第1の間隙領域があり、前記第1の金属の表面は、前記第1の絶縁誘電体の表面よりも高い、ステップと、
第2のチップを提供するステップであって、前記第2のチップの表面は、第2の誘電体層および第2の金属層を含み、前記第2の誘電体層は、第2の絶縁誘電体を含み、前記第2の金属層は、第2の金属を含む、ステップと、
前記第1の金属が前記第2の金属と接触した後に金属接合を形成するステップと、
前記第1の絶縁誘電体が前記第2の絶縁誘電体と接触した後に絶縁誘電体接合を形成するために、前記第1の間隙領域内で前記第1の金属を縦方向および横方向に変形するステップと
を含む、ハイブリッド接合方法。 - 前記第2の金属の表面は、前記第2の絶縁誘電体の表面よりも高い、請求項13に記載の方法。
- 前記第1の金属の前記表面および/または前記第2の金属の前記表面に円盤状の凹みがある、請求項13または14に記載の方法。
- 前記第1の金属の前記表面と前記第1の絶縁誘電体の前記表面との間の高さの差は、前記第1の金属の前記表面の前記円盤状の凹みの深さおよび前記第2の金属の前記表面の前記円盤状の凹みの深さの合計よりも大きい、請求項15に記載の方法。
- 前記高さの差は、前記金属接合が接合プロセスにおいて前記絶縁誘電体接合の前に形成されることを確実にするために使用される、請求項16に記載の方法。
- 前記第2の金属の縁と前記第2の絶縁誘電体との間に第2の間隙領域がある、請求項13または14に記載の方法。
- 前記第1の間隙領域および/または前記第2の間隙領域の幅の範囲は、10ナノメートルから1000ナノメートルまでの間である、請求項18に記載の方法。
- 前記第1の誘電体層は、第3の絶縁誘電体をさらに含み、前記第1の金属の前記縁と前記第3の絶縁誘電体との間に前記第1の間隙領域がある、請求項13または14に記載の方法。
- 前記第1の間隙領域は、有機ポリマーによって満たされる、請求項13または14に記載の方法。
- 前記第1の絶縁誘電体は、酸化ケイ素、窒化ケイ素、酸窒化ケイ素、炭窒化ケイ素、酸化アルミニウム、アモルファスシリコン、炭化ケイ素、または窒化アルミニウムのうちの1つであり、前記第2の絶縁誘電体は、酸化ケイ素、窒化ケイ素、酸窒化ケイ素、炭窒化ケイ素、酸化アルミニウム、アモルファスシリコン、炭化ケイ素、または窒化アルミニウムのうちの1つであり、前記第1の金属は、銅、金、銀、アルミニウム、ニッケル、タングステン、チタン、錫、導電性グラフェン、またはカーボンナノチューブのうちの1つであり、前記第2の金属は、銅、金、銀、アルミニウム、ニッケル、タングステン、チタン、錫、導電性グラフェン、またはカーボンナノチューブのうちの1つであり、前記第3の絶縁誘電体は、窒化ケイ素、炭窒化ケイ素、酸化アルミニウム、アモルファスシリコン、炭化ケイ素、または窒化アルミニウムのうちの1つである、請求項19に記載の方法。
- 前記第1の絶縁誘電体は、前記第2の絶縁誘電体と同じであり、前記第1の金属は、前記第2の金属と同じである、請求項21に記載の方法。
- 前記第1の金属および/または前記第2の金属の断面は、長方形、正方形、通常の台形、逆の台形、円錐形、またはT字形である、請求項13または14に記載の方法。
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