JP2022516625A5 - - Google Patents
Info
- Publication number
- JP2022516625A5 JP2022516625A5 JP2021538684A JP2021538684A JP2022516625A5 JP 2022516625 A5 JP2022516625 A5 JP 2022516625A5 JP 2021538684 A JP2021538684 A JP 2021538684A JP 2021538684 A JP2021538684 A JP 2021538684A JP 2022516625 A5 JP2022516625 A5 JP 2022516625A5
- Authority
- JP
- Japan
- Prior art keywords
- catalyst
- layer
- circuit board
- multilayer circuit
- board according
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2024174325A JP2024177400A (ja) | 2019-01-01 | 2024-10-03 | 回路板層より厚いトレースを有する多層回路板 |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US16/237,702 | 2019-01-01 | ||
| US16/237,702 US11039540B2 (en) | 2019-01-01 | 2019-01-01 | Multi-layer circuit board with traces thicker than a circuit board layer |
| PCT/US2019/066990 WO2020142209A1 (en) | 2019-01-01 | 2019-12-17 | Multi-layer circuit board with traces thicker than a circuit board layer |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2024174325A Division JP2024177400A (ja) | 2019-01-01 | 2024-10-03 | 回路板層より厚いトレースを有する多層回路板 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2022516625A JP2022516625A (ja) | 2022-03-01 |
| JP2022516625A5 true JP2022516625A5 (https=) | 2022-11-07 |
| JP7676309B2 JP7676309B2 (ja) | 2025-05-14 |
Family
ID=71124513
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2021538684A Active JP7676309B2 (ja) | 2019-01-01 | 2019-12-17 | 回路板層より厚いトレースを有する多層回路板 |
| JP2024174325A Pending JP2024177400A (ja) | 2019-01-01 | 2024-10-03 | 回路板層より厚いトレースを有する多層回路板 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2024174325A Pending JP2024177400A (ja) | 2019-01-01 | 2024-10-03 | 回路板層より厚いトレースを有する多層回路板 |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US11039540B2 (https=) |
| EP (1) | EP3906329B1 (https=) |
| JP (2) | JP7676309B2 (https=) |
| KR (1) | KR102803528B1 (https=) |
| CN (1) | CN113544311B (https=) |
| WO (1) | WO2020142209A1 (https=) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023043196A1 (ko) | 2021-09-14 | 2023-03-23 | 주식회사 엘지에너지솔루션 | 전극조립체, 이를 포함하는 이차전지, 이를 제조하는 이차전지 제조방법 및 이에 이용되는 이차전지 제조장치 |
| CN114980566B (zh) * | 2022-07-27 | 2022-10-28 | 四川英创力电子科技股份有限公司 | 一种阶梯线路制作方法 |
Family Cites Families (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0936522A (ja) * | 1995-07-14 | 1997-02-07 | Fuji Kiko Denshi Kk | プリント配線板における回路形成方法 |
| KR100906931B1 (ko) * | 1998-02-26 | 2009-07-10 | 이비덴 가부시키가이샤 | 필드 바이어 구조를 갖는 다층프린트 배선판 |
| TW512653B (en) * | 1999-11-26 | 2002-12-01 | Ibiden Co Ltd | Multilayer circuit board and semiconductor device |
| JP2001291721A (ja) * | 2000-04-06 | 2001-10-19 | Nec Corp | 配線構造、導電パターンの形成方法、半導体装置および半導体装置の製造方法 |
| US10198908B2 (en) * | 2002-09-30 | 2019-02-05 | Stanley P. Dabrowski | Method and apparatus for integrated customer tracking and browsing |
| US20050233555A1 (en) * | 2004-04-19 | 2005-10-20 | Nagarajan Rajagopalan | Adhesion improvement for low k dielectrics to conductive materials |
| US20060113675A1 (en) * | 2004-12-01 | 2006-06-01 | Chung-Liang Chang | Barrier material and process for Cu interconnect |
| EP2255601B1 (en) * | 2008-04-30 | 2012-05-16 | Panasonic Corporation | Method of producing circuit board by additive method |
| US8240036B2 (en) * | 2008-04-30 | 2012-08-14 | Panasonic Corporation | Method of producing a circuit board |
| CN103929903A (zh) * | 2013-01-15 | 2014-07-16 | 日本特殊陶业株式会社 | 布线基板的制造方法 |
| US8916469B2 (en) * | 2013-03-12 | 2014-12-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabricating copper damascene |
| US20160278206A1 (en) * | 2014-05-19 | 2016-09-22 | Sierra Circuits, Inc. | Printed circuit board |
| US9631279B2 (en) | 2014-05-19 | 2017-04-25 | Sierra Circuits, Inc. | Methods for forming embedded traces |
| US9398703B2 (en) | 2014-05-19 | 2016-07-19 | Sierra Circuits, Inc. | Via in a printed circuit board |
| US9380700B2 (en) | 2014-05-19 | 2016-06-28 | Sierra Circuits, Inc. | Method for forming traces of a printed circuit board |
| US9405419B2 (en) * | 2014-11-11 | 2016-08-02 | Eastman Kodak Company | Electrically-conductive articles with electrically-conductive metallic connectors |
| US20160240419A1 (en) * | 2015-02-13 | 2016-08-18 | Eastman Kodak Company | Atomic-layer deposition substrate |
| US9706650B1 (en) * | 2016-08-18 | 2017-07-11 | Sierra Circuits, Inc. | Catalytic laminate apparatus and method |
| US9922951B1 (en) * | 2016-11-12 | 2018-03-20 | Sierra Circuits, Inc. | Integrated circuit wafer integration with catalytic laminate or adhesive |
| US10765012B2 (en) * | 2017-07-10 | 2020-09-01 | Catlam, Llc | Process for printed circuit boards using backing foil |
-
2019
- 2019-01-01 US US16/237,702 patent/US11039540B2/en active Active
- 2019-12-17 CN CN201980093241.6A patent/CN113544311B/zh active Active
- 2019-12-17 WO PCT/US2019/066990 patent/WO2020142209A1/en not_active Ceased
- 2019-12-17 JP JP2021538684A patent/JP7676309B2/ja active Active
- 2019-12-17 KR KR1020217024423A patent/KR102803528B1/ko active Active
- 2019-12-17 EP EP19907701.7A patent/EP3906329B1/en active Active
-
2021
- 2021-05-11 US US17/317,203 patent/US11406024B2/en active Active
-
2024
- 2024-10-03 JP JP2024174325A patent/JP2024177400A/ja active Pending
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