JP2022101596A - 積層基板の製造方法および製造装置 - Google Patents
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- 239000000758 substrate Substances 0.000 title claims abstract description 638
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 78
- 238000012937 correction Methods 0.000 claims abstract description 334
- 238000012545 processing Methods 0.000 claims abstract description 89
- 238000010030 laminating Methods 0.000 claims abstract description 41
- 238000000034 method Methods 0.000 claims description 73
- 230000008569 process Effects 0.000 claims description 43
- 238000005304 joining Methods 0.000 description 99
- 239000010408 film Substances 0.000 description 31
- 238000005259 measurement Methods 0.000 description 26
- 235000012431 wafers Nutrition 0.000 description 18
- 238000010586 diagram Methods 0.000 description 17
- 230000008859 change Effects 0.000 description 13
- 238000013461 design Methods 0.000 description 13
- 238000006073 displacement reaction Methods 0.000 description 13
- 238000000059 patterning Methods 0.000 description 10
- 238000009826 distribution Methods 0.000 description 8
- 239000007789 gas Substances 0.000 description 8
- 230000004913 activation Effects 0.000 description 7
- 230000003287 optical effect Effects 0.000 description 7
- 239000002994 raw material Substances 0.000 description 7
- 239000013078 crystal Substances 0.000 description 6
- 230000003028 elevating effect Effects 0.000 description 6
- 230000001965 increasing effect Effects 0.000 description 6
- 239000010410 layer Substances 0.000 description 6
- 230000009467 reduction Effects 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 5
- 239000002346 layers by function Substances 0.000 description 5
- 230000002093 peripheral effect Effects 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 4
- 230000003213 activating effect Effects 0.000 description 3
- 238000000137 annealing Methods 0.000 description 3
- 238000005452 bending Methods 0.000 description 3
- 230000008602 contraction Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000003754 machining Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 230000001681 protective effect Effects 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 238000010894 electron beam technology Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 230000005484 gravity Effects 0.000 description 2
- 238000010884 ion-beam technique Methods 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 239000012190 activator Substances 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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Abstract
Description
特許文献1 特開2014-216496号公報
(A)積層部13における接合の過程で生じた歪み。
(B)接合前の加工により基板510に生じた歪み。
(C)接合前の加工により基板520に生じた歪み。
Claims (14)
- 複数の基板の少なくとも一つを加工する加工段階と、
前記複数の基板を積層して積層基板を製造する積層段階と、
複数の前記積層基板のそれぞれの前記複数の基板間の位置ずれ量に基づいて補正量を決定する決定段階と、
を含み、
前記加工段階および前記積層段階の少なくとも一方は、前記決定段階の後に積層する複数の基板の少なくとも一つを前記補正量で補正する補正段階を含む製造方法。 - 前記加工段階および前記積層段階の少なくとも一方は、前記決定段階の後に積層する前記複数の基板間に生じる位置ずれと、前記決定段階で決定した補正量との差分を補正する第2の補正段階を含む請求項1に記載の製造方法。
- 前記加工段階および前記積層段階の少なくとも一方は、前記第2の補正段階で前記差分を補正すべきか否かを判断する判断段階を含む請求項2に記載の製造方法。
- 前記決定段階は、前記複数の積層基板における位置ずれ量の平均値および最小値のいずれかを前記補正量として決定する請求項1から3のいずれか一項に記載の製造方法。
- 前記決定段階は、前記複数の積層基板のそれぞれにおける位置ずれ量の3σ(σは標準偏差)を算出し、前記3σの値が予め定めた閾値よりも低い位置ずれ成分を補正する前記補正量を決定する請求項1から4のいずれか一項に記載の製造方法。
- 前記補正段階は、前記加工段階における、前記複数の基板の少なくとも一つに回路形成する段階で補正を行う請求項1から5のいずれか一項に記載の製造方法。
- 前記補正段階は、前記加工段階における、前記複数の基板の少なくとも一つに成膜する段階で補正を行う請求項1から6のいずれか一項に記載の製造方法。
- 前記補正段階は、前記積層段階において、前記複数の基板の少なくとも一つを変形させることにより補正を行う請求項1から6のいずれか一項に記載の製造方法。
- 前記決定段階における前記位置ずれは、前記積層段階における、前記積層基板を薄化する場合に生じる位置ずれを含む請求項1から8のいずれか一項に記載の製造方法。
- 複数の基板の少なくとも一つを加工する加工段階を含み、
前記加工段階は、積層された複数の基板をそれぞれが有する複数の積層基板のそれぞれにおける前記複数の基板間の位置ずれ量に基づいて決定された補正量で、前記決定の後に積層する複数の基板の少なくとも一つを補正する補正段階を含む製造方法。 - 複数の基板を積層することにより積層基板を製造する積層段階を含み、
前記積層段階は、複数の前記積層基板のそれぞれの前記複数の基板間の位置ずれ量に基づいて決定された補正量で、前記決定の後に積層する複数の基板の少なくとも一つを補正する補正段階を含む製造方法。 - 複数の基板の少なくとも一つを加工する加工部と、
前記複数の基板を積層して積層基板を製造する積層部と、
を備え、
前記加工部および前記積層部の少なくとも一方は、複数の前記積層基板のそれぞれの前記複数の基板間の位置ずれ量に基づいて決定された補正量で、前記決定の後に積層する複数の基板の少なくとも一つを補正する製造装置。 - 複数の基板の少なくとも一つを加工する加工部を備え、
前記加工部は、互いに積層された複数の基板をそれぞれが有する複数の積層基板のそれぞれにおける前記複数の基板間の位置ずれ量に基づいて決定された補正量で、前記決定の後に積層する複数の基板の少なくとも一つを補正する製造装置。 - 複数の基板を積層することにより積層基板を製造する積層部を備え、
前記積層部は、複数の前記積層基板のそれぞれの前記複数の基板間の位置ずれ量に基づいて決定された補正量で、前記決定の後に積層する複数の基板の少なくとも一つを補正する製造装置。
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JP2007158200A (ja) * | 2005-12-08 | 2007-06-21 | Nikon Corp | 貼り合わせ半導体装置製造用の露光方法 |
WO2016093284A1 (ja) * | 2014-12-10 | 2016-06-16 | 株式会社ニコン | 基板重ね合わせ装置および基板重ね合わせ方法 |
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WO2016093284A1 (ja) * | 2014-12-10 | 2016-06-16 | 株式会社ニコン | 基板重ね合わせ装置および基板重ね合わせ方法 |
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