JP2021526736A - 多層回路基板およびその製造方法 - Google Patents
多層回路基板およびその製造方法 Download PDFInfo
- Publication number
- JP2021526736A JP2021526736A JP2020567603A JP2020567603A JP2021526736A JP 2021526736 A JP2021526736 A JP 2021526736A JP 2020567603 A JP2020567603 A JP 2020567603A JP 2020567603 A JP2020567603 A JP 2020567603A JP 2021526736 A JP2021526736 A JP 2021526736A
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- Prior art keywords
- layer
- pattern
- pattern layer
- circuit board
- interlayer insulating
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
- H05K3/4655—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern by using a laminate characterized by the insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4673—Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0154—Polyimide
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/0959—Plated through-holes or plated blind vias filled with insulating material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/282—Applying non-metallic protective coatings for inhibiting the corrosion of the circuit, e.g. for preserving the solderability
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
Claims (11)
- 基材層と、
前記基材層の一面に形成される第2パターン層と、
前記第2パターン層上に形成される第1パターン層と、
前記第1パターン層と前記第2パターン層との間に形成され、前記第1パターン層が形成される領域に対応するように前記第2パターン層上に部分的に形成される層間絶縁層と、
を含む、多層回路基板。 - 前記層間絶縁層は、前記基材層の全体面積に対して1%〜50%の面積で形成される、請求項1に記載の多層回路基板。
- 前記層間絶縁層が少なくとも2個以上の層で形成されると、上部層間絶縁層の面積が下部層間絶縁層の面積より小さいか同じである、請求項1に記載の多層回路基板。
- 前記層間絶縁層は、前記基材層上にパターン層が追加される度に隣接する二つのパターン層の間に形成され、隣接する二つのパターン層のうち上位に位置するパターン層の形成領域に対応して形成される、請求項1に記載の多層回路基板。
- 前記層間絶縁層は、液状形態のポリイミド(polyimide)成分を隣接する二つのパターン層の間に印刷または塗布した後、硬化させて形成される、請求項1に記載の多層回路基板。
- 前記基材層の他面に形成される第3パターン層
をさらに含み、
前記第3パターン層は前記基材層に形成される導通穴および前記層間絶縁層に形成される導通穴を介して前記第1パターン層および前記第2パターン層と電気的に接続され、
前記第1パターン層は前記層間絶縁層に形成される導通穴を介して前記第2パターン層と電気的に接続される、請求項1に記載の多層回路基板。 - 前記第1パターン層と前記第2パターン層で端子部を除いた残りの領域に形成される保護層
をさらに含む、請求項1に記載の多層回路基板。 - 基材層の一面に第2パターン層を形成してベース回路基板を形成する段階と、
第1パターン層が形成される領域に対応するように前記第2パターン層上部に部分的に層間絶縁層を形成する段階と、
前記層間絶縁層上に前記第1パターン層を形成する段階と、
前記第1パターン層と前記第2パターン層の端子部領域を除いた残りの領域に保護層を形成する段階
を含む、多層回路基板の製造方法。 - 前記基材層は他面に第3パターン層をさらに形成することができ、
前記基材層に前記第2パターン層と前記第3パターン層を形成する前に、
前記基材層に導通穴を形成する段階
をさらに含む、請求項8に記載の多層回路基板の製造方法。 - 前記第1パターン層を形成する段階は、
前記層間絶縁層上に金属層を形成する段階と、
前記層間絶縁層に導通穴を形成する段階と、
前記金属層上に感光性フィルムをラミネートする段階と、
ラミネートされた前記感光性フィルムでメッキレジストパターンを形成する段階と、
メッキ工法を利用して前記層間絶縁層上に前記第1パターン層を形成し、前記層間絶縁層に形成された導通穴と前記基材層に形成された導通穴を介して前記第1パターン層および前記第2パターン層を電気的に接続させる段階と、
前記メッキレジストパターンを除去する段階と、
前記第2パターン層のパターンの間に露出した金属層を除去する段階と、
を含む、請求項9に記載の多層回路基板の製造方法。 - 前記端子部領域に素子を実装させて多層回路基板を製造する段階
をさらに含む、請求項9に記載の多層回路基板の製造方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020180083891A KR102173615B1 (ko) | 2018-07-19 | 2018-07-19 | 다층 회로 기판 및 그 제조 방법 |
KR10-2018-0083891 | 2018-07-19 | ||
PCT/KR2019/008818 WO2020017881A1 (ko) | 2018-07-19 | 2019-07-17 | 다층 회로 기판 및 그 제조 방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2021526736A true JP2021526736A (ja) | 2021-10-07 |
JP7136930B2 JP7136930B2 (ja) | 2022-09-13 |
Family
ID=69164122
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2020567603A Active JP7136930B2 (ja) | 2018-07-19 | 2019-07-17 | 多層回路基板およびその製造方法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US11956904B2 (ja) |
JP (1) | JP7136930B2 (ja) |
KR (1) | KR102173615B1 (ja) |
CN (1) | CN112262618A (ja) |
TW (1) | TWI747008B (ja) |
WO (1) | WO2020017881A1 (ja) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS547171A (en) * | 1977-06-17 | 1979-01-19 | Dainippon Printing Co Ltd | Method of making print wiring board |
JP2004228165A (ja) * | 2003-01-20 | 2004-08-12 | Fujikura Ltd | 多層配線板およびその製造方法 |
US20160374196A1 (en) * | 2015-06-18 | 2016-12-22 | Samsung Electro-Mechanics Co., Ltd. | Printed circuit board and method of manufacturing the same |
Family Cites Families (19)
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JP3166611B2 (ja) * | 1996-04-19 | 2001-05-14 | 富士ゼロックス株式会社 | プリント配線板及びその製造方法 |
JPH11145621A (ja) * | 1997-11-04 | 1999-05-28 | Sumitomo Metal Ind Ltd | 多層配線基板とその製造方法 |
JP2003298232A (ja) * | 2002-04-02 | 2003-10-17 | Sony Corp | 多層配線基板の製造方法および多層配線基板 |
US20060180344A1 (en) * | 2003-01-20 | 2006-08-17 | Shoji Ito | Multilayer printed wiring board and process for producing the same |
US20050057906A1 (en) * | 2003-09-12 | 2005-03-17 | Seiichi Nakatani | Connector sheet and wiring board, and production processes of the same |
JP2005268505A (ja) * | 2004-03-18 | 2005-09-29 | Fujikura Ltd | 多層配線板およびその製造方法 |
KR100630684B1 (ko) * | 2004-06-08 | 2006-10-02 | 삼성전자주식회사 | 솔더 접합 신뢰도(sjr)를 높일 수 있는 인쇄회로기판및 이를 이용한 반도체 패키지 모듈 |
US7897877B2 (en) * | 2006-05-23 | 2011-03-01 | Endicott Interconnect Technologies, Inc. | Capacitive substrate |
JP5306634B2 (ja) * | 2007-11-22 | 2013-10-02 | 新光電気工業株式会社 | 配線基板及び半導体装置及び配線基板の製造方法 |
JP4538513B2 (ja) * | 2008-07-29 | 2010-09-08 | 株式会社フジクラ | 多層配線板の製造方法 |
JP4730426B2 (ja) * | 2008-11-19 | 2011-07-20 | ソニー株式会社 | 実装基板及び半導体モジュール |
CN102461350A (zh) | 2009-06-02 | 2012-05-16 | 索尼化学&信息部件株式会社 | 多层印刷布线板的制造方法 |
JP5649490B2 (ja) * | 2011-03-16 | 2015-01-07 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
TWI447864B (zh) * | 2011-06-09 | 2014-08-01 | Unimicron Technology Corp | 封裝基板及其製法 |
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JP6233524B2 (ja) * | 2014-09-04 | 2017-11-22 | 株式会社村田製作所 | 部品内蔵基板 |
US9775246B2 (en) * | 2015-08-07 | 2017-09-26 | Unimicron Technology Corp. | Circuit board and manufacturing method thereof |
KR101811940B1 (ko) | 2016-01-20 | 2018-01-25 | 주식회사 코리아써키트 | 미세 비아가 형성된 다층 회로기판 제조방법 |
-
2018
- 2018-07-19 KR KR1020180083891A patent/KR102173615B1/ko active IP Right Grant
-
2019
- 2019-07-17 WO PCT/KR2019/008818 patent/WO2020017881A1/ko active Application Filing
- 2019-07-17 JP JP2020567603A patent/JP7136930B2/ja active Active
- 2019-07-17 CN CN201980039240.3A patent/CN112262618A/zh active Pending
- 2019-07-19 TW TW108125558A patent/TWI747008B/zh active
-
2020
- 2020-11-18 US US16/952,021 patent/US11956904B2/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS547171A (en) * | 1977-06-17 | 1979-01-19 | Dainippon Printing Co Ltd | Method of making print wiring board |
JP2004228165A (ja) * | 2003-01-20 | 2004-08-12 | Fujikura Ltd | 多層配線板およびその製造方法 |
US20160374196A1 (en) * | 2015-06-18 | 2016-12-22 | Samsung Electro-Mechanics Co., Ltd. | Printed circuit board and method of manufacturing the same |
Also Published As
Publication number | Publication date |
---|---|
US11956904B2 (en) | 2024-04-09 |
US20210076507A1 (en) | 2021-03-11 |
KR20200009473A (ko) | 2020-01-30 |
JP7136930B2 (ja) | 2022-09-13 |
TW202008865A (zh) | 2020-02-16 |
CN112262618A (zh) | 2021-01-22 |
TWI747008B (zh) | 2021-11-21 |
KR102173615B1 (ko) | 2020-11-03 |
WO2020017881A1 (ko) | 2020-01-23 |
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