JP2021515983A5 - - Google Patents

Info

Publication number
JP2021515983A5
JP2021515983A5 JP2020546450A JP2020546450A JP2021515983A5 JP 2021515983 A5 JP2021515983 A5 JP 2021515983A5 JP 2020546450 A JP2020546450 A JP 2020546450A JP 2020546450 A JP2020546450 A JP 2020546450A JP 2021515983 A5 JP2021515983 A5 JP 2021515983A5
Authority
JP
Japan
Prior art keywords
circuit die
channels
solid circuit
channel
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2020546450A
Other languages
English (en)
Japanese (ja)
Other versions
JP2021515983A (ja
Filing date
Publication date
Application filed filed Critical
Priority claimed from PCT/IB2019/051585 external-priority patent/WO2019171214A1/en
Publication of JP2021515983A publication Critical patent/JP2021515983A/ja
Publication of JP2021515983A5 publication Critical patent/JP2021515983A5/ja
Pending legal-status Critical Current

Links

JP2020546450A 2018-03-06 2019-02-27 回路ダイと相互接続部との間の自動位置合わせ Pending JP2021515983A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201862639234P 2018-03-06 2018-03-06
US62/639,234 2018-03-06
PCT/IB2019/051585 WO2019171214A1 (en) 2018-03-06 2019-02-27 Automatic registration between circuit dies and interconnects

Publications (2)

Publication Number Publication Date
JP2021515983A JP2021515983A (ja) 2021-06-24
JP2021515983A5 true JP2021515983A5 (https=) 2022-03-10

Family

ID=67846934

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2020546450A Pending JP2021515983A (ja) 2018-03-06 2019-02-27 回路ダイと相互接続部との間の自動位置合わせ

Country Status (6)

Country Link
US (1) US20210035875A1 (https=)
EP (1) EP3762965A1 (https=)
JP (1) JP2021515983A (https=)
CN (1) CN111819686A (https=)
TW (1) TW201943010A (https=)
WO (1) WO2019171214A1 (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11503720B2 (en) 2018-09-17 2022-11-15 3M Innovative Properties Company Flexible device including conductive traces with enhanced stretchability
WO2020141445A1 (en) 2018-12-31 2020-07-09 3M Innovative Properties Company Forming electrical interconnections using capillary microfluidics
WO2020141407A1 (en) 2018-12-31 2020-07-09 3M Innovative Properties Company Flexible circuits on soft substrates
WO2020222060A1 (en) 2019-04-29 2020-11-05 3M Innovative Properties Company Methods for registration of circuit dies and electrical interconnects
US12237292B2 (en) 2019-12-04 2025-02-25 3M Innovative Properties Company Circuits including micropatterns and using partial curing to adhere dies
CN115023807B (zh) 2020-01-24 2026-01-30 3M创新有限公司 与嵌入式电子部件的电气连接

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5454161A (en) * 1993-04-29 1995-10-03 Fujitsu Limited Through hole interconnect substrate fabrication process
JPH06350233A (ja) * 1993-06-10 1994-12-22 Sankyo Seiki Mfg Co Ltd 回路基板
WO2006100790A1 (ja) * 2005-03-22 2006-09-28 Cluster Technology Co., Ltd. 配線基板の製造方法及び配線基板
JP2006332615A (ja) * 2005-04-25 2006-12-07 Brother Ind Ltd パターン形成方法
JP2008211150A (ja) * 2007-02-28 2008-09-11 Seiko Instruments Inc 3次元構造体部品、及びその製造方法
CN101755493A (zh) * 2007-07-19 2010-06-23 拜尔材料科学股份公司 在表面上制备精细导电结构的方法
CN102157510B (zh) * 2010-02-12 2013-11-06 亿光电子工业股份有限公司 近接传感器封装结构及其制作方法
JP2011249357A (ja) * 2010-05-21 2011-12-08 Panasonic Electric Works Co Ltd 回路基板および回路基板の製造方法
KR20130143061A (ko) * 2010-11-03 2013-12-30 쓰리엠 이노베이티브 프로퍼티즈 컴파니 와이어 본드 프리 다이를 사용한 가요성 led 디바이스
KR101968635B1 (ko) * 2012-11-22 2019-04-12 삼성전자주식회사 잉크젯 프린팅을 이용한 배선 형성 방법
JP2017147269A (ja) * 2016-02-15 2017-08-24 株式会社デンソー 車両用電装部品の製造方法

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